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541 lines
12 KiB
541 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* w83627hf/thf WDT driver |
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* |
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* (c) Copyright 2013 Guenter Roeck |
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* converted to watchdog infrastructure |
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* |
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* (c) Copyright 2007 Vlad Drukker <[email protected]> |
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* added support for W83627THF. |
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* |
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* (c) Copyright 2003,2007 Pádraig Brady <[email protected]> |
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* |
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* Based on advantechwdt.c which is based on wdt.c. |
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* Original copyright messages: |
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* |
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* (c) Copyright 2000-2001 Marek Michalkiewicz <[email protected]> |
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* |
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* (c) Copyright 1996 Alan Cox <[email protected]>, |
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* All Rights Reserved. |
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* |
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* Neither Alan Cox nor CymruNet Ltd. admit liability nor provide |
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* warranty for any of this software. This material is provided |
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* "AS-IS" and at no charge. |
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* |
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* (c) Copyright 1995 Alan Cox <[email protected]> |
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*/ |
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
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#include <linux/module.h> |
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#include <linux/moduleparam.h> |
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#include <linux/types.h> |
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#include <linux/watchdog.h> |
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#include <linux/ioport.h> |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/dmi.h> |
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#define WATCHDOG_NAME "w83627hf/thf/hg/dhg WDT" |
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#define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */ |
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|
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static int wdt_io; |
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static int cr_wdt_timeout; /* WDT timeout register */ |
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static int cr_wdt_control; /* WDT control register */ |
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static int cr_wdt_csr; /* WDT control & status register */ |
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static int wdt_cfg_enter = 0x87;/* key to unlock configuration space */ |
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static int wdt_cfg_leave = 0xAA;/* key to lock configuration space */ |
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enum chips { w83627hf, w83627s, w83697hf, w83697ug, w83637hf, w83627thf, |
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w83687thf, w83627ehf, w83627dhg, w83627uhg, w83667hg, w83627dhg_p, |
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w83667hg_b, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793, |
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nct6795, nct6796, nct6102, nct6116 }; |
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static int timeout; /* in seconds */ |
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module_param(timeout, int, 0); |
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MODULE_PARM_DESC(timeout, |
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"Watchdog timeout in seconds. 1 <= timeout <= 255, default=" |
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__MODULE_STRING(WATCHDOG_TIMEOUT) "."); |
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static bool nowayout = WATCHDOG_NOWAYOUT; |
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module_param(nowayout, bool, 0); |
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MODULE_PARM_DESC(nowayout, |
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"Watchdog cannot be stopped once started (default=" |
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
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static int early_disable; |
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module_param(early_disable, int, 0); |
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MODULE_PARM_DESC(early_disable, "Disable watchdog at boot time (default=0)"); |
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/* |
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* Kernel methods. |
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*/ |
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#define WDT_EFER (wdt_io+0) /* Extended Function Enable Registers */ |
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#define WDT_EFIR (wdt_io+0) /* Extended Function Index Register |
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(same as EFER) */ |
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#define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */ |
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#define W83627HF_LD_WDT 0x08 |
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#define W83627HF_ID 0x52 |
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#define W83627S_ID 0x59 |
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#define W83697HF_ID 0x60 |
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#define W83697UG_ID 0x68 |
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#define W83637HF_ID 0x70 |
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#define W83627THF_ID 0x82 |
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#define W83687THF_ID 0x85 |
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#define W83627EHF_ID 0x88 |
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#define W83627DHG_ID 0xa0 |
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#define W83627UHG_ID 0xa2 |
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#define W83667HG_ID 0xa5 |
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#define W83627DHG_P_ID 0xb0 |
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#define W83667HG_B_ID 0xb3 |
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#define NCT6775_ID 0xb4 |
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#define NCT6776_ID 0xc3 |
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#define NCT6102_ID 0xc4 |
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#define NCT6116_ID 0xd2 |
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#define NCT6779_ID 0xc5 |
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#define NCT6791_ID 0xc8 |
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#define NCT6792_ID 0xc9 |
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#define NCT6793_ID 0xd1 |
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#define NCT6795_ID 0xd3 |
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#define NCT6796_ID 0xd4 /* also NCT9697D, NCT9698D */ |
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#define W83627HF_WDT_TIMEOUT 0xf6 |
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#define W83697HF_WDT_TIMEOUT 0xf4 |
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#define NCT6102D_WDT_TIMEOUT 0xf1 |
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#define W83627HF_WDT_CONTROL 0xf5 |
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#define W83697HF_WDT_CONTROL 0xf3 |
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#define NCT6102D_WDT_CONTROL 0xf0 |
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#define W836X7HF_WDT_CSR 0xf7 |
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#define NCT6102D_WDT_CSR 0xf2 |
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static void superio_outb(int reg, int val) |
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{ |
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outb(reg, WDT_EFER); |
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outb(val, WDT_EFDR); |
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} |
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static inline int superio_inb(int reg) |
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{ |
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outb(reg, WDT_EFER); |
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return inb(WDT_EFDR); |
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} |
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static int superio_enter(void) |
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{ |
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if (!request_muxed_region(wdt_io, 2, WATCHDOG_NAME)) |
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return -EBUSY; |
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outb_p(wdt_cfg_enter, WDT_EFER); /* Enter extended function mode */ |
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outb_p(wdt_cfg_enter, WDT_EFER); /* Again according to manual */ |
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return 0; |
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} |
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static void superio_select(int ld) |
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{ |
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superio_outb(0x07, ld); |
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} |
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static void superio_exit(void) |
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{ |
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outb_p(wdt_cfg_leave, WDT_EFER); /* Leave extended function mode */ |
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release_region(wdt_io, 2); |
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} |
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static int w83627hf_init(struct watchdog_device *wdog, enum chips chip) |
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{ |
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int ret; |
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unsigned char t; |
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ret = superio_enter(); |
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if (ret) |
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return ret; |
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superio_select(W83627HF_LD_WDT); |
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/* set CR30 bit 0 to activate GPIO2 */ |
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t = superio_inb(0x30); |
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if (!(t & 0x01)) |
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superio_outb(0x30, t | 0x01); |
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switch (chip) { |
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case w83627hf: |
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case w83627s: |
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t = superio_inb(0x2B) & ~0x10; |
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superio_outb(0x2B, t); /* set GPIO24 to WDT0 */ |
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break; |
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case w83697hf: |
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/* Set pin 119 to WDTO# mode (= CR29, WDT0) */ |
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t = superio_inb(0x29) & ~0x60; |
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t |= 0x20; |
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superio_outb(0x29, t); |
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break; |
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case w83697ug: |
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/* Set pin 118 to WDTO# mode */ |
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t = superio_inb(0x2b) & ~0x04; |
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superio_outb(0x2b, t); |
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break; |
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case w83627thf: |
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t = (superio_inb(0x2B) & ~0x08) | 0x04; |
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superio_outb(0x2B, t); /* set GPIO3 to WDT0 */ |
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break; |
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case w83627dhg: |
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case w83627dhg_p: |
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t = superio_inb(0x2D) & ~0x01; /* PIN77 -> WDT0# */ |
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superio_outb(0x2D, t); /* set GPIO5 to WDT0 */ |
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t = superio_inb(cr_wdt_control); |
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t |= 0x02; /* enable the WDTO# output low pulse |
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* to the KBRST# pin */ |
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superio_outb(cr_wdt_control, t); |
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break; |
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case w83637hf: |
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break; |
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case w83687thf: |
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t = superio_inb(0x2C) & ~0x80; /* PIN47 -> WDT0# */ |
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superio_outb(0x2C, t); |
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break; |
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case w83627ehf: |
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case w83627uhg: |
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case w83667hg: |
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case w83667hg_b: |
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case nct6775: |
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case nct6776: |
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case nct6779: |
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case nct6791: |
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case nct6792: |
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case nct6793: |
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case nct6795: |
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case nct6796: |
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case nct6102: |
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case nct6116: |
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/* |
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* These chips have a fixed WDTO# output pin (W83627UHG), |
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* or support more than one WDTO# output pin. |
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* Don't touch its configuration, and hope the BIOS |
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* does the right thing. |
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*/ |
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t = superio_inb(cr_wdt_control); |
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t |= 0x02; /* enable the WDTO# output low pulse |
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* to the KBRST# pin */ |
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superio_outb(cr_wdt_control, t); |
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break; |
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default: |
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break; |
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} |
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t = superio_inb(cr_wdt_timeout); |
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if (t != 0) { |
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if (early_disable) { |
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pr_warn("Stopping previously enabled watchdog until userland kicks in\n"); |
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superio_outb(cr_wdt_timeout, 0); |
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} else { |
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pr_info("Watchdog already running. Resetting timeout to %d sec\n", |
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wdog->timeout); |
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superio_outb(cr_wdt_timeout, wdog->timeout); |
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} |
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} |
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/* set second mode & disable keyboard turning off watchdog */ |
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t = superio_inb(cr_wdt_control) & ~0x0C; |
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superio_outb(cr_wdt_control, t); |
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/* reset trigger, disable keyboard & mouse turning off watchdog */ |
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t = superio_inb(cr_wdt_csr) & ~0xD0; |
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superio_outb(cr_wdt_csr, t); |
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superio_exit(); |
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return 0; |
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} |
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static int wdt_set_time(unsigned int timeout) |
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{ |
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int ret; |
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ret = superio_enter(); |
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if (ret) |
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return ret; |
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superio_select(W83627HF_LD_WDT); |
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superio_outb(cr_wdt_timeout, timeout); |
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superio_exit(); |
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return 0; |
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} |
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static int wdt_start(struct watchdog_device *wdog) |
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{ |
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return wdt_set_time(wdog->timeout); |
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} |
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static int wdt_stop(struct watchdog_device *wdog) |
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{ |
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return wdt_set_time(0); |
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} |
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static int wdt_set_timeout(struct watchdog_device *wdog, unsigned int timeout) |
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{ |
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wdog->timeout = timeout; |
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return 0; |
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} |
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static unsigned int wdt_get_time(struct watchdog_device *wdog) |
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{ |
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unsigned int timeleft; |
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int ret; |
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ret = superio_enter(); |
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if (ret) |
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return 0; |
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superio_select(W83627HF_LD_WDT); |
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timeleft = superio_inb(cr_wdt_timeout); |
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superio_exit(); |
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return timeleft; |
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} |
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/* |
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* Kernel Interfaces |
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*/ |
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static const struct watchdog_info wdt_info = { |
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, |
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.identity = "W83627HF Watchdog", |
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}; |
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static const struct watchdog_ops wdt_ops = { |
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.owner = THIS_MODULE, |
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.start = wdt_start, |
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.stop = wdt_stop, |
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.set_timeout = wdt_set_timeout, |
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.get_timeleft = wdt_get_time, |
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}; |
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static struct watchdog_device wdt_dev = { |
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.info = &wdt_info, |
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.ops = &wdt_ops, |
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.timeout = WATCHDOG_TIMEOUT, |
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.min_timeout = 1, |
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.max_timeout = 255, |
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}; |
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/* |
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* The WDT needs to learn about soft shutdowns in order to |
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* turn the timebomb registers off. |
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*/ |
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static int wdt_find(int addr) |
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{ |
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u8 val; |
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int ret; |
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cr_wdt_timeout = W83627HF_WDT_TIMEOUT; |
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cr_wdt_control = W83627HF_WDT_CONTROL; |
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cr_wdt_csr = W836X7HF_WDT_CSR; |
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ret = superio_enter(); |
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if (ret) |
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return ret; |
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superio_select(W83627HF_LD_WDT); |
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val = superio_inb(0x20); |
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switch (val) { |
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case W83627HF_ID: |
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ret = w83627hf; |
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break; |
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case W83627S_ID: |
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ret = w83627s; |
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break; |
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case W83697HF_ID: |
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ret = w83697hf; |
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cr_wdt_timeout = W83697HF_WDT_TIMEOUT; |
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cr_wdt_control = W83697HF_WDT_CONTROL; |
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break; |
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case W83697UG_ID: |
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ret = w83697ug; |
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cr_wdt_timeout = W83697HF_WDT_TIMEOUT; |
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cr_wdt_control = W83697HF_WDT_CONTROL; |
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break; |
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case W83637HF_ID: |
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ret = w83637hf; |
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break; |
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case W83627THF_ID: |
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ret = w83627thf; |
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break; |
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case W83687THF_ID: |
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ret = w83687thf; |
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break; |
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case W83627EHF_ID: |
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ret = w83627ehf; |
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break; |
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case W83627DHG_ID: |
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ret = w83627dhg; |
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break; |
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case W83627DHG_P_ID: |
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ret = w83627dhg_p; |
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break; |
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case W83627UHG_ID: |
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ret = w83627uhg; |
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break; |
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case W83667HG_ID: |
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ret = w83667hg; |
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break; |
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case W83667HG_B_ID: |
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ret = w83667hg_b; |
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break; |
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case NCT6775_ID: |
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ret = nct6775; |
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break; |
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case NCT6776_ID: |
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ret = nct6776; |
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break; |
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case NCT6779_ID: |
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ret = nct6779; |
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break; |
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case NCT6791_ID: |
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ret = nct6791; |
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break; |
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case NCT6792_ID: |
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ret = nct6792; |
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break; |
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case NCT6793_ID: |
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ret = nct6793; |
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break; |
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case NCT6795_ID: |
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ret = nct6795; |
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break; |
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case NCT6796_ID: |
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ret = nct6796; |
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break; |
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case NCT6102_ID: |
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ret = nct6102; |
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cr_wdt_timeout = NCT6102D_WDT_TIMEOUT; |
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cr_wdt_control = NCT6102D_WDT_CONTROL; |
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cr_wdt_csr = NCT6102D_WDT_CSR; |
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break; |
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case NCT6116_ID: |
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ret = nct6116; |
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cr_wdt_timeout = NCT6102D_WDT_TIMEOUT; |
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cr_wdt_control = NCT6102D_WDT_CONTROL; |
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cr_wdt_csr = NCT6102D_WDT_CSR; |
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break; |
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case 0xff: |
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ret = -ENODEV; |
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break; |
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default: |
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ret = -ENODEV; |
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pr_err("Unsupported chip ID: 0x%02x\n", val); |
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break; |
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} |
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superio_exit(); |
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return ret; |
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} |
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/* |
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* On some systems, the NCT6791D comes with a companion chip and the |
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* watchdog function is in this companion chip. We must use a different |
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* unlocking sequence to access the companion chip. |
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*/ |
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static int __init wdt_use_alt_key(const struct dmi_system_id *d) |
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{ |
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wdt_cfg_enter = 0x88; |
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wdt_cfg_leave = 0xBB; |
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return 0; |
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} |
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static const struct dmi_system_id wdt_dmi_table[] __initconst = { |
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{ |
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.matches = { |
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DMI_EXACT_MATCH(DMI_SYS_VENDOR, "INVES"), |
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DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CTS"), |
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DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "INVES"), |
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DMI_EXACT_MATCH(DMI_BOARD_NAME, "SHARKBAY"), |
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}, |
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.callback = wdt_use_alt_key, |
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}, |
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{} |
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}; |
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static int __init wdt_init(void) |
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{ |
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int ret; |
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int chip; |
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static const char * const chip_name[] = { |
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"W83627HF", |
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"W83627S", |
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"W83697HF", |
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"W83697UG", |
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"W83637HF", |
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"W83627THF", |
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"W83687THF", |
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"W83627EHF", |
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"W83627DHG", |
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"W83627UHG", |
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"W83667HG", |
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"W83667DHG-P", |
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"W83667HG-B", |
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"NCT6775", |
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"NCT6776", |
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"NCT6779", |
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"NCT6791", |
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"NCT6792", |
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"NCT6793", |
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"NCT6795", |
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"NCT6796", |
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"NCT6102", |
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"NCT6116", |
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}; |
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|
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/* Apply system-specific quirks */ |
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dmi_check_system(wdt_dmi_table); |
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wdt_io = 0x2e; |
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chip = wdt_find(0x2e); |
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if (chip < 0) { |
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wdt_io = 0x4e; |
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chip = wdt_find(0x4e); |
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if (chip < 0) |
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return chip; |
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} |
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pr_info("WDT driver for %s Super I/O chip initialising\n", |
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chip_name[chip]); |
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watchdog_init_timeout(&wdt_dev, timeout, NULL); |
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watchdog_set_nowayout(&wdt_dev, nowayout); |
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watchdog_stop_on_reboot(&wdt_dev); |
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ret = w83627hf_init(&wdt_dev, chip); |
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if (ret) { |
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pr_err("failed to initialize watchdog (err=%d)\n", ret); |
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return ret; |
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} |
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ret = watchdog_register_device(&wdt_dev); |
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if (ret) |
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return ret; |
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pr_info("initialized. timeout=%d sec (nowayout=%d)\n", |
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wdt_dev.timeout, nowayout); |
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|
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return ret; |
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} |
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static void __exit wdt_exit(void) |
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{ |
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watchdog_unregister_device(&wdt_dev); |
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} |
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module_init(wdt_init); |
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module_exit(wdt_exit); |
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MODULE_LICENSE("GPL"); |
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MODULE_AUTHOR("Pádraig Brady <[email protected]>"); |
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MODULE_DESCRIPTION("w83627hf/thf WDT driver");
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