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90 lines
2.0 KiB
90 lines
2.0 KiB
/* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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* |
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* Copyright (C) 2007-2017 Cavium, Inc. |
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*/ |
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#include <asm/asm.h> |
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#include <asm/regdef.h> |
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#define CVMSEG_BASE -32768 |
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#define CVMSEG_SIZE 6912 |
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#define SAVE_REG(r) sd $r, CVMSEG_BASE + CVMSEG_SIZE - ((32 - r) * 8)($0) |
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NESTED(octeon_wdt_nmi_stage2, 0, sp) |
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.set push |
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.set noreorder |
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.set noat |
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/* Clear Dcache so cvmseg works right. */ |
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cache 1,0($0) |
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/* Use K0 to do a read/modify/write of CVMMEMCTL */ |
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dmfc0 k0, $11, 7 |
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/* Clear out the size of CVMSEG */ |
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dins k0, $0, 0, 6 |
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/* Set CVMSEG to its largest value */ |
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ori k0, k0, 0x1c0 | 54 |
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/* Store the CVMMEMCTL value */ |
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dmtc0 k0, $11, 7 |
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/* |
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* Restore K0 from the debug scratch register, it was saved in |
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* the boot-vector code. |
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*/ |
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dmfc0 k0, $31 |
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/* |
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* Save all registers to the top CVMSEG. This shouldn't |
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* corrupt any state used by the kernel. Also all registers |
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* should have the value right before the NMI. |
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*/ |
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SAVE_REG(0) |
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SAVE_REG(1) |
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SAVE_REG(2) |
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SAVE_REG(3) |
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SAVE_REG(4) |
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SAVE_REG(5) |
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SAVE_REG(6) |
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SAVE_REG(7) |
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SAVE_REG(8) |
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SAVE_REG(9) |
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SAVE_REG(10) |
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SAVE_REG(11) |
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SAVE_REG(12) |
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SAVE_REG(13) |
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SAVE_REG(14) |
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SAVE_REG(15) |
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SAVE_REG(16) |
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SAVE_REG(17) |
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SAVE_REG(18) |
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SAVE_REG(19) |
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SAVE_REG(20) |
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SAVE_REG(21) |
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SAVE_REG(22) |
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SAVE_REG(23) |
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SAVE_REG(24) |
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SAVE_REG(25) |
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SAVE_REG(26) |
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SAVE_REG(27) |
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SAVE_REG(28) |
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SAVE_REG(29) |
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SAVE_REG(30) |
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SAVE_REG(31) |
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/* Write zero to all CVMSEG locations per Core-15169 */ |
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dli a0, CVMSEG_SIZE - (33 * 8) |
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1: sd zero, CVMSEG_BASE(a0) |
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daddiu a0, a0, -8 |
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bgez a0, 1b |
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nop |
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/* Set the stack to begin right below the registers */ |
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dli sp, CVMSEG_BASE + CVMSEG_SIZE - (32 * 8) |
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/* Load the address of the third stage handler */ |
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dla $25, octeon_wdt_nmi_stage3 |
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/* Call the third stage handler */ |
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jal $25 |
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/* a0 is the address of the saved registers */ |
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move a0, sp |
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/* Loop forvever if we get here. */ |
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2: b 2b |
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nop |
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.set pop |
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END(octeon_wdt_nmi_stage2)
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