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778 lines
20 KiB
778 lines
20 KiB
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
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/* |
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* platform.c - DesignWare HS OTG Controller platform driver |
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* |
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* Copyright (C) Matthijs Kooijman <[email protected]> |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions, and the following disclaimer, |
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* without modification. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The names of the above-listed copyright holders may not be used |
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* to endorse or promote products derived from this software without |
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* specific prior written permission. |
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* |
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* ALTERNATIVELY, this software may be distributed under the terms of the |
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* GNU General Public License ("GPL") as published by the Free Software |
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* Foundation; either version 2 of the License, or (at your option) any |
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* later version. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS |
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* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/slab.h> |
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#include <linux/clk.h> |
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#include <linux/device.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/of_device.h> |
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#include <linux/mutex.h> |
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#include <linux/platform_device.h> |
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#include <linux/phy/phy.h> |
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#include <linux/platform_data/s3c-hsotg.h> |
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#include <linux/reset.h> |
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#include <linux/usb/of.h> |
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#include "core.h" |
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#include "hcd.h" |
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#include "debug.h" |
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static const char dwc2_driver_name[] = "dwc2"; |
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|
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/* |
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* Check the dr_mode against the module configuration and hardware |
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* capabilities. |
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* |
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* The hardware, module, and dr_mode, can each be set to host, device, |
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* or otg. Check that all these values are compatible and adjust the |
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* value of dr_mode if possible. |
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* |
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* actual |
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* HW MOD dr_mode dr_mode |
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* ------------------------------ |
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* HST HST any : HST |
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* HST DEV any : --- |
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* HST OTG any : HST |
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* |
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* DEV HST any : --- |
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* DEV DEV any : DEV |
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* DEV OTG any : DEV |
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* |
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* OTG HST any : HST |
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* OTG DEV any : DEV |
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* OTG OTG any : dr_mode |
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*/ |
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static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg) |
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{ |
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enum usb_dr_mode mode; |
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hsotg->dr_mode = usb_get_dr_mode(hsotg->dev); |
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if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN) |
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hsotg->dr_mode = USB_DR_MODE_OTG; |
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mode = hsotg->dr_mode; |
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if (dwc2_hw_is_device(hsotg)) { |
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if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) { |
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dev_err(hsotg->dev, |
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"Controller does not support host mode.\n"); |
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return -EINVAL; |
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} |
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mode = USB_DR_MODE_PERIPHERAL; |
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} else if (dwc2_hw_is_host(hsotg)) { |
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if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) { |
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dev_err(hsotg->dev, |
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"Controller does not support device mode.\n"); |
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return -EINVAL; |
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} |
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mode = USB_DR_MODE_HOST; |
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} else { |
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if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) |
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mode = USB_DR_MODE_HOST; |
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else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) |
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mode = USB_DR_MODE_PERIPHERAL; |
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} |
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if (mode != hsotg->dr_mode) { |
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dev_warn(hsotg->dev, |
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"Configuration mismatch. dr_mode forced to %s\n", |
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mode == USB_DR_MODE_HOST ? "host" : "device"); |
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hsotg->dr_mode = mode; |
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} |
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return 0; |
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} |
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static void __dwc2_disable_regulators(void *data) |
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{ |
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struct dwc2_hsotg *hsotg = data; |
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regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); |
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} |
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static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) |
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{ |
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struct platform_device *pdev = to_platform_device(hsotg->dev); |
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int ret; |
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ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies), |
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hsotg->supplies); |
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if (ret) |
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return ret; |
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ret = devm_add_action_or_reset(&pdev->dev, |
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__dwc2_disable_regulators, hsotg); |
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if (ret) |
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return ret; |
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if (hsotg->clk) { |
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ret = clk_prepare_enable(hsotg->clk); |
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if (ret) |
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return ret; |
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} |
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if (hsotg->uphy) { |
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ret = usb_phy_init(hsotg->uphy); |
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} else if (hsotg->plat && hsotg->plat->phy_init) { |
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ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type); |
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} else { |
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ret = phy_power_on(hsotg->phy); |
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if (ret == 0) |
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ret = phy_init(hsotg->phy); |
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} |
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return ret; |
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} |
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/** |
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* dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources |
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* @hsotg: The driver state |
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* |
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* A wrapper for platform code responsible for controlling |
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* low-level USB platform resources (phy, clock, regulators) |
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*/ |
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int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) |
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{ |
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int ret = __dwc2_lowlevel_hw_enable(hsotg); |
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if (ret == 0) |
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hsotg->ll_hw_enabled = true; |
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return ret; |
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} |
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static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) |
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{ |
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struct platform_device *pdev = to_platform_device(hsotg->dev); |
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int ret = 0; |
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if (hsotg->uphy) { |
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usb_phy_shutdown(hsotg->uphy); |
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} else if (hsotg->plat && hsotg->plat->phy_exit) { |
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ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type); |
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} else { |
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ret = phy_exit(hsotg->phy); |
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if (ret == 0) |
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ret = phy_power_off(hsotg->phy); |
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} |
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if (ret) |
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return ret; |
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if (hsotg->clk) |
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clk_disable_unprepare(hsotg->clk); |
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return 0; |
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} |
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/** |
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* dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources |
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* @hsotg: The driver state |
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* |
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* A wrapper for platform code responsible for controlling |
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* low-level USB platform resources (phy, clock, regulators) |
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*/ |
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int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) |
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{ |
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int ret = __dwc2_lowlevel_hw_disable(hsotg); |
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if (ret == 0) |
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hsotg->ll_hw_enabled = false; |
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return ret; |
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} |
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static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) |
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{ |
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int i, ret; |
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hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2"); |
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if (IS_ERR(hsotg->reset)) { |
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ret = PTR_ERR(hsotg->reset); |
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dev_err(hsotg->dev, "error getting reset control %d\n", ret); |
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return ret; |
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} |
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reset_control_deassert(hsotg->reset); |
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hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, "dwc2-ecc"); |
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if (IS_ERR(hsotg->reset_ecc)) { |
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ret = PTR_ERR(hsotg->reset_ecc); |
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dev_err(hsotg->dev, "error getting reset control for ecc %d\n", ret); |
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return ret; |
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} |
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reset_control_deassert(hsotg->reset_ecc); |
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/* |
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* Attempt to find a generic PHY, then look for an old style |
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* USB PHY and then fall back to pdata |
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*/ |
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hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy"); |
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if (IS_ERR(hsotg->phy)) { |
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ret = PTR_ERR(hsotg->phy); |
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switch (ret) { |
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case -ENODEV: |
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case -ENOSYS: |
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hsotg->phy = NULL; |
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break; |
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case -EPROBE_DEFER: |
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return ret; |
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default: |
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dev_err(hsotg->dev, "error getting phy %d\n", ret); |
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return ret; |
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} |
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} |
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if (!hsotg->phy) { |
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hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2); |
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if (IS_ERR(hsotg->uphy)) { |
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ret = PTR_ERR(hsotg->uphy); |
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switch (ret) { |
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case -ENODEV: |
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case -ENXIO: |
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hsotg->uphy = NULL; |
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break; |
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case -EPROBE_DEFER: |
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return ret; |
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default: |
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dev_err(hsotg->dev, "error getting usb phy %d\n", |
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ret); |
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return ret; |
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} |
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} |
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} |
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hsotg->plat = dev_get_platdata(hsotg->dev); |
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/* Clock */ |
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hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg"); |
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if (IS_ERR(hsotg->clk)) { |
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dev_err(hsotg->dev, "cannot get otg clock\n"); |
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return PTR_ERR(hsotg->clk); |
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} |
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/* Regulators */ |
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for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++) |
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hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i]; |
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ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies), |
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hsotg->supplies); |
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if (ret) { |
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if (ret != -EPROBE_DEFER) |
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dev_err(hsotg->dev, "failed to request supplies: %d\n", |
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ret); |
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return ret; |
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} |
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return 0; |
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} |
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/** |
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* dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the |
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* DWC_otg driver |
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* |
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* @dev: Platform device |
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* |
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* This routine is called, for example, when the rmmod command is executed. The |
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* device may or may not be electrically present. If it is present, the driver |
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* stops device processing. Any resources used on behalf of this device are |
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* freed. |
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*/ |
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static int dwc2_driver_remove(struct platform_device *dev) |
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{ |
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struct dwc2_hsotg *hsotg = platform_get_drvdata(dev); |
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struct dwc2_gregs_backup *gr; |
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int ret = 0; |
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gr = &hsotg->gr_backup; |
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/* Exit Hibernation when driver is removed. */ |
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if (hsotg->hibernated) { |
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if (gr->gotgctl & GOTGCTL_CURMODE_HOST) |
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ret = dwc2_exit_hibernation(hsotg, 0, 0, 1); |
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else |
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ret = dwc2_exit_hibernation(hsotg, 0, 0, 0); |
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if (ret) |
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dev_err(hsotg->dev, |
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"exit hibernation failed.\n"); |
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} |
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/* Exit Partial Power Down when driver is removed. */ |
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if (hsotg->in_ppd) { |
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ret = dwc2_exit_partial_power_down(hsotg, 0, true); |
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if (ret) |
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dev_err(hsotg->dev, |
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"exit partial_power_down failed\n"); |
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} |
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/* Exit clock gating when driver is removed. */ |
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if (hsotg->params.power_down == DWC2_POWER_DOWN_PARAM_NONE && |
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hsotg->bus_suspended) { |
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if (dwc2_is_device_mode(hsotg)) |
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dwc2_gadget_exit_clock_gating(hsotg, 0); |
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else |
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dwc2_host_exit_clock_gating(hsotg, 0); |
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} |
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dwc2_debugfs_exit(hsotg); |
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if (hsotg->hcd_enabled) |
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dwc2_hcd_remove(hsotg); |
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if (hsotg->gadget_enabled) |
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dwc2_hsotg_remove(hsotg); |
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dwc2_drd_exit(hsotg); |
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if (hsotg->params.activate_stm_id_vb_detection) |
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regulator_disable(hsotg->usb33d); |
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if (hsotg->ll_hw_enabled) |
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dwc2_lowlevel_hw_disable(hsotg); |
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reset_control_assert(hsotg->reset); |
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reset_control_assert(hsotg->reset_ecc); |
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return ret; |
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} |
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/** |
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* dwc2_driver_shutdown() - Called on device shutdown |
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* |
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* @dev: Platform device |
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* |
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* In specific conditions (involving usb hubs) dwc2 devices can create a |
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* lot of interrupts, even to the point of overwhelming devices running |
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* at low frequencies. Some devices need to do special clock handling |
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* at shutdown-time which may bring the system clock below the threshold |
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* of being able to handle the dwc2 interrupts. Disabling dwc2-irqs |
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* prevents reboots/poweroffs from getting stuck in such cases. |
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*/ |
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static void dwc2_driver_shutdown(struct platform_device *dev) |
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{ |
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struct dwc2_hsotg *hsotg = platform_get_drvdata(dev); |
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dwc2_disable_global_interrupts(hsotg); |
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synchronize_irq(hsotg->irq); |
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} |
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|
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/** |
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* dwc2_check_core_endianness() - Returns true if core and AHB have |
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* opposite endianness. |
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* @hsotg: Programming view of the DWC_otg controller. |
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*/ |
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static bool dwc2_check_core_endianness(struct dwc2_hsotg *hsotg) |
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{ |
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u32 snpsid; |
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snpsid = ioread32(hsotg->regs + GSNPSID); |
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if ((snpsid & GSNPSID_ID_MASK) == DWC2_OTG_ID || |
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(snpsid & GSNPSID_ID_MASK) == DWC2_FS_IOT_ID || |
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(snpsid & GSNPSID_ID_MASK) == DWC2_HS_IOT_ID) |
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return false; |
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return true; |
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} |
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/** |
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* dwc2_check_core_version() - Check core version |
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* |
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* @hsotg: Programming view of the DWC_otg controller |
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* |
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*/ |
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int dwc2_check_core_version(struct dwc2_hsotg *hsotg) |
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{ |
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struct dwc2_hw_params *hw = &hsotg->hw_params; |
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|
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/* |
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* Attempt to ensure this device is really a DWC_otg Controller. |
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* Read and verify the GSNPSID register contents. The value should be |
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* 0x45f4xxxx, 0x5531xxxx or 0x5532xxxx |
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*/ |
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hw->snpsid = dwc2_readl(hsotg, GSNPSID); |
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if ((hw->snpsid & GSNPSID_ID_MASK) != DWC2_OTG_ID && |
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(hw->snpsid & GSNPSID_ID_MASK) != DWC2_FS_IOT_ID && |
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(hw->snpsid & GSNPSID_ID_MASK) != DWC2_HS_IOT_ID) { |
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dev_err(hsotg->dev, "Bad value for GSNPSID: 0x%08x\n", |
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hw->snpsid); |
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return -ENODEV; |
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} |
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dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n", |
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hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf, |
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hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid); |
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return 0; |
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} |
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|
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/** |
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* dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg |
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* driver |
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* |
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* @dev: Platform device |
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* |
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* This routine creates the driver components required to control the device |
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* (core, HCD, and PCD) and initializes the device. The driver components are |
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* stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved |
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* in the device private data. This allows the driver to access the dwc2_hsotg |
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* structure on subsequent calls to driver methods for this device. |
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*/ |
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static int dwc2_driver_probe(struct platform_device *dev) |
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{ |
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struct dwc2_hsotg *hsotg; |
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struct resource *res; |
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int retval; |
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hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL); |
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if (!hsotg) |
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return -ENOMEM; |
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hsotg->dev = &dev->dev; |
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|
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/* |
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* Use reasonable defaults so platforms don't have to provide these. |
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*/ |
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if (!dev->dev.dma_mask) |
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dev->dev.dma_mask = &dev->dev.coherent_dma_mask; |
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retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32)); |
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if (retval) { |
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dev_err(&dev->dev, "can't set coherent DMA mask: %d\n", retval); |
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return retval; |
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} |
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hsotg->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res); |
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if (IS_ERR(hsotg->regs)) |
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return PTR_ERR(hsotg->regs); |
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dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n", |
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(unsigned long)res->start, hsotg->regs); |
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retval = dwc2_lowlevel_hw_init(hsotg); |
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if (retval) |
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return retval; |
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spin_lock_init(&hsotg->lock); |
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hsotg->irq = platform_get_irq(dev, 0); |
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if (hsotg->irq < 0) |
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return hsotg->irq; |
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dev_dbg(hsotg->dev, "registering common handler for irq%d\n", |
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hsotg->irq); |
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retval = devm_request_irq(hsotg->dev, hsotg->irq, |
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dwc2_handle_common_intr, IRQF_SHARED, |
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dev_name(hsotg->dev), hsotg); |
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if (retval) |
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return retval; |
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|
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hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus"); |
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if (IS_ERR(hsotg->vbus_supply)) { |
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retval = PTR_ERR(hsotg->vbus_supply); |
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hsotg->vbus_supply = NULL; |
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if (retval != -ENODEV) |
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return retval; |
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} |
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retval = dwc2_lowlevel_hw_enable(hsotg); |
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if (retval) |
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return retval; |
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|
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hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg); |
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retval = dwc2_get_dr_mode(hsotg); |
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if (retval) |
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goto error; |
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hsotg->need_phy_for_wake = |
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of_property_read_bool(dev->dev.of_node, |
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"snps,need-phy-for-wake"); |
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|
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/* |
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* Before performing any core related operations |
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* check core version. |
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*/ |
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retval = dwc2_check_core_version(hsotg); |
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if (retval) |
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goto error; |
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|
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/* |
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* Reset before dwc2_get_hwparams() then it could get power-on real |
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* reset value form registers. |
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*/ |
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retval = dwc2_core_reset(hsotg, false); |
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if (retval) |
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goto error; |
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|
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/* Detect config values from hardware */ |
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retval = dwc2_get_hwparams(hsotg); |
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if (retval) |
|
goto error; |
|
|
|
/* |
|
* For OTG cores, set the force mode bits to reflect the value |
|
* of dr_mode. Force mode bits should not be touched at any |
|
* other time after this. |
|
*/ |
|
dwc2_force_dr_mode(hsotg); |
|
|
|
retval = dwc2_init_params(hsotg); |
|
if (retval) |
|
goto error; |
|
|
|
if (hsotg->params.activate_stm_id_vb_detection) { |
|
u32 ggpio; |
|
|
|
hsotg->usb33d = devm_regulator_get(hsotg->dev, "usb33d"); |
|
if (IS_ERR(hsotg->usb33d)) { |
|
retval = PTR_ERR(hsotg->usb33d); |
|
if (retval != -EPROBE_DEFER) |
|
dev_err(hsotg->dev, |
|
"failed to request usb33d supply: %d\n", |
|
retval); |
|
goto error; |
|
} |
|
retval = regulator_enable(hsotg->usb33d); |
|
if (retval) { |
|
dev_err(hsotg->dev, |
|
"failed to enable usb33d supply: %d\n", retval); |
|
goto error; |
|
} |
|
|
|
ggpio = dwc2_readl(hsotg, GGPIO); |
|
ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN; |
|
ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN; |
|
dwc2_writel(hsotg, ggpio, GGPIO); |
|
} |
|
|
|
retval = dwc2_drd_init(hsotg); |
|
if (retval) { |
|
if (retval != -EPROBE_DEFER) |
|
dev_err(hsotg->dev, "failed to initialize dual-role\n"); |
|
goto error_init; |
|
} |
|
|
|
if (hsotg->dr_mode != USB_DR_MODE_HOST) { |
|
retval = dwc2_gadget_init(hsotg); |
|
if (retval) |
|
goto error_drd; |
|
hsotg->gadget_enabled = 1; |
|
} |
|
|
|
/* |
|
* If we need PHY for wakeup we must be wakeup capable. |
|
* When we have a device that can wake without the PHY we |
|
* can adjust this condition. |
|
*/ |
|
if (hsotg->need_phy_for_wake) |
|
device_set_wakeup_capable(&dev->dev, true); |
|
|
|
hsotg->reset_phy_on_wake = |
|
of_property_read_bool(dev->dev.of_node, |
|
"snps,reset-phy-on-wake"); |
|
if (hsotg->reset_phy_on_wake && !hsotg->phy) { |
|
dev_warn(hsotg->dev, |
|
"Quirk reset-phy-on-wake only supports generic PHYs\n"); |
|
hsotg->reset_phy_on_wake = false; |
|
} |
|
|
|
if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { |
|
retval = dwc2_hcd_init(hsotg); |
|
if (retval) { |
|
if (hsotg->gadget_enabled) |
|
dwc2_hsotg_remove(hsotg); |
|
goto error_drd; |
|
} |
|
hsotg->hcd_enabled = 1; |
|
} |
|
|
|
platform_set_drvdata(dev, hsotg); |
|
hsotg->hibernated = 0; |
|
|
|
dwc2_debugfs_init(hsotg); |
|
|
|
/* Gadget code manages lowlevel hw on its own */ |
|
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) |
|
dwc2_lowlevel_hw_disable(hsotg); |
|
|
|
#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ |
|
IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) |
|
/* Postponed adding a new gadget to the udc class driver list */ |
|
if (hsotg->gadget_enabled) { |
|
retval = usb_add_gadget_udc(hsotg->dev, &hsotg->gadget); |
|
if (retval) { |
|
hsotg->gadget.udc = NULL; |
|
dwc2_hsotg_remove(hsotg); |
|
goto error_debugfs; |
|
} |
|
} |
|
#endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */ |
|
return 0; |
|
|
|
#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ |
|
IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) |
|
error_debugfs: |
|
dwc2_debugfs_exit(hsotg); |
|
if (hsotg->hcd_enabled) |
|
dwc2_hcd_remove(hsotg); |
|
#endif |
|
error_drd: |
|
dwc2_drd_exit(hsotg); |
|
|
|
error_init: |
|
if (hsotg->params.activate_stm_id_vb_detection) |
|
regulator_disable(hsotg->usb33d); |
|
error: |
|
if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) |
|
dwc2_lowlevel_hw_disable(hsotg); |
|
return retval; |
|
} |
|
|
|
static int __maybe_unused dwc2_suspend(struct device *dev) |
|
{ |
|
struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev); |
|
bool is_device_mode = dwc2_is_device_mode(dwc2); |
|
int ret = 0; |
|
|
|
if (is_device_mode) |
|
dwc2_hsotg_suspend(dwc2); |
|
|
|
dwc2_drd_suspend(dwc2); |
|
|
|
if (dwc2->params.activate_stm_id_vb_detection) { |
|
unsigned long flags; |
|
u32 ggpio, gotgctl; |
|
|
|
/* |
|
* Need to force the mode to the current mode to avoid Mode |
|
* Mismatch Interrupt when ID detection will be disabled. |
|
*/ |
|
dwc2_force_mode(dwc2, !is_device_mode); |
|
|
|
spin_lock_irqsave(&dwc2->lock, flags); |
|
gotgctl = dwc2_readl(dwc2, GOTGCTL); |
|
/* bypass debounce filter, enable overrides */ |
|
gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS; |
|
gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN; |
|
/* Force A / B session if needed */ |
|
if (gotgctl & GOTGCTL_ASESVLD) |
|
gotgctl |= GOTGCTL_AVALOVAL; |
|
if (gotgctl & GOTGCTL_BSESVLD) |
|
gotgctl |= GOTGCTL_BVALOVAL; |
|
dwc2_writel(dwc2, gotgctl, GOTGCTL); |
|
spin_unlock_irqrestore(&dwc2->lock, flags); |
|
|
|
ggpio = dwc2_readl(dwc2, GGPIO); |
|
ggpio &= ~GGPIO_STM32_OTG_GCCFG_IDEN; |
|
ggpio &= ~GGPIO_STM32_OTG_GCCFG_VBDEN; |
|
dwc2_writel(dwc2, ggpio, GGPIO); |
|
|
|
regulator_disable(dwc2->usb33d); |
|
} |
|
|
|
if (dwc2->ll_hw_enabled && |
|
(is_device_mode || dwc2_host_can_poweroff_phy(dwc2))) { |
|
ret = __dwc2_lowlevel_hw_disable(dwc2); |
|
dwc2->phy_off_for_suspend = true; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
static int __maybe_unused dwc2_resume(struct device *dev) |
|
{ |
|
struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev); |
|
int ret = 0; |
|
|
|
if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) { |
|
ret = __dwc2_lowlevel_hw_enable(dwc2); |
|
if (ret) |
|
return ret; |
|
} |
|
dwc2->phy_off_for_suspend = false; |
|
|
|
if (dwc2->params.activate_stm_id_vb_detection) { |
|
unsigned long flags; |
|
u32 ggpio, gotgctl; |
|
|
|
ret = regulator_enable(dwc2->usb33d); |
|
if (ret) |
|
return ret; |
|
|
|
ggpio = dwc2_readl(dwc2, GGPIO); |
|
ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN; |
|
ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN; |
|
dwc2_writel(dwc2, ggpio, GGPIO); |
|
|
|
/* ID/VBUS detection startup time */ |
|
usleep_range(5000, 7000); |
|
|
|
spin_lock_irqsave(&dwc2->lock, flags); |
|
gotgctl = dwc2_readl(dwc2, GOTGCTL); |
|
gotgctl &= ~GOTGCTL_DBNCE_FLTR_BYPASS; |
|
gotgctl &= ~(GOTGCTL_BVALOEN | GOTGCTL_AVALOEN | |
|
GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL); |
|
dwc2_writel(dwc2, gotgctl, GOTGCTL); |
|
spin_unlock_irqrestore(&dwc2->lock, flags); |
|
} |
|
|
|
/* Need to restore FORCEDEVMODE/FORCEHOSTMODE */ |
|
dwc2_force_dr_mode(dwc2); |
|
|
|
dwc2_drd_resume(dwc2); |
|
|
|
if (dwc2_is_device_mode(dwc2)) |
|
ret = dwc2_hsotg_resume(dwc2); |
|
|
|
return ret; |
|
} |
|
|
|
static const struct dev_pm_ops dwc2_dev_pm_ops = { |
|
SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume) |
|
}; |
|
|
|
static struct platform_driver dwc2_platform_driver = { |
|
.driver = { |
|
.name = dwc2_driver_name, |
|
.of_match_table = dwc2_of_match_table, |
|
.acpi_match_table = ACPI_PTR(dwc2_acpi_match), |
|
.pm = &dwc2_dev_pm_ops, |
|
}, |
|
.probe = dwc2_driver_probe, |
|
.remove = dwc2_driver_remove, |
|
.shutdown = dwc2_driver_shutdown, |
|
}; |
|
|
|
module_platform_driver(dwc2_platform_driver);
|
|
|