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562 lines
13 KiB
562 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* Driver for CLPS711x serial ports |
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* |
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. |
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* |
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* Copyright 1999 ARM Limited |
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* Copyright (C) 2000 Deep Blue Solutions Ltd. |
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*/ |
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#include <linux/module.h> |
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#include <linux/device.h> |
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#include <linux/console.h> |
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#include <linux/serial_core.h> |
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#include <linux/serial.h> |
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#include <linux/clk.h> |
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#include <linux/io.h> |
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#include <linux/tty.h> |
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#include <linux/tty_flip.h> |
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#include <linux/ioport.h> |
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#include <linux/of.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/mfd/syscon/clps711x.h> |
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#include "serial_mctrl_gpio.h" |
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#define UART_CLPS711X_DEVNAME "ttyCL" |
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#define UART_CLPS711X_NR 2 |
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#define UART_CLPS711X_MAJOR 204 |
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#define UART_CLPS711X_MINOR 40 |
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#define UARTDR_OFFSET (0x00) |
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#define UBRLCR_OFFSET (0x40) |
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#define UARTDR_FRMERR (1 << 8) |
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#define UARTDR_PARERR (1 << 9) |
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#define UARTDR_OVERR (1 << 10) |
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#define UBRLCR_BAUD_MASK ((1 << 12) - 1) |
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#define UBRLCR_BREAK (1 << 12) |
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#define UBRLCR_PRTEN (1 << 13) |
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#define UBRLCR_EVENPRT (1 << 14) |
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#define UBRLCR_XSTOP (1 << 15) |
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#define UBRLCR_FIFOEN (1 << 16) |
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#define UBRLCR_WRDLEN5 (0 << 17) |
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#define UBRLCR_WRDLEN6 (1 << 17) |
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#define UBRLCR_WRDLEN7 (2 << 17) |
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#define UBRLCR_WRDLEN8 (3 << 17) |
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#define UBRLCR_WRDLEN_MASK (3 << 17) |
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struct clps711x_port { |
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struct uart_port port; |
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unsigned int tx_enabled; |
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int rx_irq; |
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struct regmap *syscon; |
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struct mctrl_gpios *gpios; |
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}; |
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static struct uart_driver clps711x_uart = { |
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.owner = THIS_MODULE, |
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.driver_name = UART_CLPS711X_DEVNAME, |
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.dev_name = UART_CLPS711X_DEVNAME, |
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.major = UART_CLPS711X_MAJOR, |
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.minor = UART_CLPS711X_MINOR, |
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.nr = UART_CLPS711X_NR, |
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}; |
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static void uart_clps711x_stop_tx(struct uart_port *port) |
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{ |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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if (s->tx_enabled) { |
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disable_irq(port->irq); |
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s->tx_enabled = 0; |
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} |
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} |
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static void uart_clps711x_start_tx(struct uart_port *port) |
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{ |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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if (!s->tx_enabled) { |
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s->tx_enabled = 1; |
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enable_irq(port->irq); |
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} |
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} |
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static irqreturn_t uart_clps711x_int_rx(int irq, void *dev_id) |
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{ |
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struct uart_port *port = dev_id; |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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unsigned int status, flg; |
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u16 ch; |
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for (;;) { |
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u32 sysflg = 0; |
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regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg); |
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if (sysflg & SYSFLG_URXFE) |
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break; |
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ch = readw(port->membase + UARTDR_OFFSET); |
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status = ch & (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR); |
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ch &= 0xff; |
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port->icount.rx++; |
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flg = TTY_NORMAL; |
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if (unlikely(status)) { |
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if (status & UARTDR_PARERR) |
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port->icount.parity++; |
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else if (status & UARTDR_FRMERR) |
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port->icount.frame++; |
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else if (status & UARTDR_OVERR) |
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port->icount.overrun++; |
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status &= port->read_status_mask; |
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if (status & UARTDR_PARERR) |
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flg = TTY_PARITY; |
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else if (status & UARTDR_FRMERR) |
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flg = TTY_FRAME; |
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else if (status & UARTDR_OVERR) |
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flg = TTY_OVERRUN; |
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} |
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if (uart_handle_sysrq_char(port, ch)) |
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continue; |
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if (status & port->ignore_status_mask) |
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continue; |
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uart_insert_char(port, status, UARTDR_OVERR, ch, flg); |
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} |
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tty_flip_buffer_push(&port->state->port); |
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return IRQ_HANDLED; |
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} |
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static irqreturn_t uart_clps711x_int_tx(int irq, void *dev_id) |
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{ |
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struct uart_port *port = dev_id; |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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struct circ_buf *xmit = &port->state->xmit; |
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if (port->x_char) { |
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writew(port->x_char, port->membase + UARTDR_OFFSET); |
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port->icount.tx++; |
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port->x_char = 0; |
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return IRQ_HANDLED; |
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} |
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
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if (s->tx_enabled) { |
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disable_irq_nosync(port->irq); |
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s->tx_enabled = 0; |
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} |
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return IRQ_HANDLED; |
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} |
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while (!uart_circ_empty(xmit)) { |
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u32 sysflg = 0; |
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writew(xmit->buf[xmit->tail], port->membase + UARTDR_OFFSET); |
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
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port->icount.tx++; |
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regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg); |
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if (sysflg & SYSFLG_UTXFF) |
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break; |
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} |
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
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uart_write_wakeup(port); |
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return IRQ_HANDLED; |
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} |
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static unsigned int uart_clps711x_tx_empty(struct uart_port *port) |
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{ |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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u32 sysflg = 0; |
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regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg); |
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return (sysflg & SYSFLG_UBUSY) ? 0 : TIOCSER_TEMT; |
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} |
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static unsigned int uart_clps711x_get_mctrl(struct uart_port *port) |
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{ |
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unsigned int result = TIOCM_DSR | TIOCM_CTS | TIOCM_CAR; |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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return mctrl_gpio_get(s->gpios, &result); |
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} |
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static void uart_clps711x_set_mctrl(struct uart_port *port, unsigned int mctrl) |
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{ |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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mctrl_gpio_set(s->gpios, mctrl); |
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} |
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static void uart_clps711x_break_ctl(struct uart_port *port, int break_state) |
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{ |
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unsigned int ubrlcr; |
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ubrlcr = readl(port->membase + UBRLCR_OFFSET); |
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if (break_state) |
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ubrlcr |= UBRLCR_BREAK; |
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else |
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ubrlcr &= ~UBRLCR_BREAK; |
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writel(ubrlcr, port->membase + UBRLCR_OFFSET); |
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} |
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static void uart_clps711x_set_ldisc(struct uart_port *port, |
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struct ktermios *termios) |
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{ |
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if (!port->line) { |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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regmap_update_bits(s->syscon, SYSCON_OFFSET, SYSCON1_SIREN, |
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(termios->c_line == N_IRDA) ? SYSCON1_SIREN : 0); |
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} |
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} |
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static int uart_clps711x_startup(struct uart_port *port) |
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{ |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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/* Disable break */ |
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writel(readl(port->membase + UBRLCR_OFFSET) & ~UBRLCR_BREAK, |
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port->membase + UBRLCR_OFFSET); |
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/* Enable the port */ |
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return regmap_update_bits(s->syscon, SYSCON_OFFSET, |
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SYSCON_UARTEN, SYSCON_UARTEN); |
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} |
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static void uart_clps711x_shutdown(struct uart_port *port) |
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{ |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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/* Disable the port */ |
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regmap_update_bits(s->syscon, SYSCON_OFFSET, SYSCON_UARTEN, 0); |
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} |
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static void uart_clps711x_set_termios(struct uart_port *port, |
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struct ktermios *termios, |
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struct ktermios *old) |
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{ |
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u32 ubrlcr; |
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unsigned int baud, quot; |
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/* Mask termios capabilities we don't support */ |
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termios->c_cflag &= ~CMSPAR; |
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termios->c_iflag &= ~(BRKINT | IGNBRK); |
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/* Ask the core to calculate the divisor for us */ |
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baud = uart_get_baud_rate(port, termios, old, port->uartclk / 4096, |
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port->uartclk / 16); |
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quot = uart_get_divisor(port, baud); |
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switch (termios->c_cflag & CSIZE) { |
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case CS5: |
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ubrlcr = UBRLCR_WRDLEN5; |
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break; |
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case CS6: |
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ubrlcr = UBRLCR_WRDLEN6; |
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break; |
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case CS7: |
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ubrlcr = UBRLCR_WRDLEN7; |
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break; |
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case CS8: |
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default: |
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ubrlcr = UBRLCR_WRDLEN8; |
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break; |
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} |
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if (termios->c_cflag & CSTOPB) |
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ubrlcr |= UBRLCR_XSTOP; |
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if (termios->c_cflag & PARENB) { |
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ubrlcr |= UBRLCR_PRTEN; |
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if (!(termios->c_cflag & PARODD)) |
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ubrlcr |= UBRLCR_EVENPRT; |
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} |
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/* Enable FIFO */ |
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ubrlcr |= UBRLCR_FIFOEN; |
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/* Set read status mask */ |
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port->read_status_mask = UARTDR_OVERR; |
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if (termios->c_iflag & INPCK) |
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port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR; |
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/* Set status ignore mask */ |
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port->ignore_status_mask = 0; |
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if (!(termios->c_cflag & CREAD)) |
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port->ignore_status_mask |= UARTDR_OVERR | UARTDR_PARERR | |
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UARTDR_FRMERR; |
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uart_update_timeout(port, termios->c_cflag, baud); |
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writel(ubrlcr | (quot - 1), port->membase + UBRLCR_OFFSET); |
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} |
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static const char *uart_clps711x_type(struct uart_port *port) |
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{ |
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return (port->type == PORT_CLPS711X) ? "CLPS711X" : NULL; |
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} |
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static void uart_clps711x_config_port(struct uart_port *port, int flags) |
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{ |
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if (flags & UART_CONFIG_TYPE) |
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port->type = PORT_CLPS711X; |
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} |
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static void uart_clps711x_nop_void(struct uart_port *port) |
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{ |
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} |
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static int uart_clps711x_nop_int(struct uart_port *port) |
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{ |
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return 0; |
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} |
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static const struct uart_ops uart_clps711x_ops = { |
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.tx_empty = uart_clps711x_tx_empty, |
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.set_mctrl = uart_clps711x_set_mctrl, |
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.get_mctrl = uart_clps711x_get_mctrl, |
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.stop_tx = uart_clps711x_stop_tx, |
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.start_tx = uart_clps711x_start_tx, |
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.stop_rx = uart_clps711x_nop_void, |
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.break_ctl = uart_clps711x_break_ctl, |
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.set_ldisc = uart_clps711x_set_ldisc, |
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.startup = uart_clps711x_startup, |
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.shutdown = uart_clps711x_shutdown, |
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.set_termios = uart_clps711x_set_termios, |
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.type = uart_clps711x_type, |
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.config_port = uart_clps711x_config_port, |
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.release_port = uart_clps711x_nop_void, |
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.request_port = uart_clps711x_nop_int, |
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}; |
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#ifdef CONFIG_SERIAL_CLPS711X_CONSOLE |
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static void uart_clps711x_console_putchar(struct uart_port *port, int ch) |
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{ |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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u32 sysflg = 0; |
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/* Wait for FIFO is not full */ |
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do { |
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regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg); |
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} while (sysflg & SYSFLG_UTXFF); |
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writew(ch, port->membase + UARTDR_OFFSET); |
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} |
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static void uart_clps711x_console_write(struct console *co, const char *c, |
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unsigned n) |
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{ |
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struct uart_port *port = clps711x_uart.state[co->index].uart_port; |
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struct clps711x_port *s = dev_get_drvdata(port->dev); |
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u32 sysflg = 0; |
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uart_console_write(port, c, n, uart_clps711x_console_putchar); |
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/* Wait for transmitter to become empty */ |
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do { |
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regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg); |
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} while (sysflg & SYSFLG_UBUSY); |
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} |
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static int uart_clps711x_console_setup(struct console *co, char *options) |
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{ |
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int baud = 38400, bits = 8, parity = 'n', flow = 'n'; |
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int ret, index = co->index; |
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struct clps711x_port *s; |
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struct uart_port *port; |
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unsigned int quot; |
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u32 ubrlcr; |
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if (index < 0 || index >= UART_CLPS711X_NR) |
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return -EINVAL; |
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port = clps711x_uart.state[index].uart_port; |
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if (!port) |
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return -ENODEV; |
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s = dev_get_drvdata(port->dev); |
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if (!options) { |
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u32 syscon = 0; |
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regmap_read(s->syscon, SYSCON_OFFSET, &syscon); |
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if (syscon & SYSCON_UARTEN) { |
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ubrlcr = readl(port->membase + UBRLCR_OFFSET); |
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if (ubrlcr & UBRLCR_PRTEN) { |
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if (ubrlcr & UBRLCR_EVENPRT) |
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parity = 'e'; |
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else |
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parity = 'o'; |
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} |
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if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7) |
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bits = 7; |
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quot = ubrlcr & UBRLCR_BAUD_MASK; |
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baud = port->uartclk / (16 * (quot + 1)); |
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} |
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} else |
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uart_parse_options(options, &baud, &parity, &bits, &flow); |
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ret = uart_set_options(port, co, baud, parity, bits, flow); |
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if (ret) |
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return ret; |
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return regmap_update_bits(s->syscon, SYSCON_OFFSET, |
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SYSCON_UARTEN, SYSCON_UARTEN); |
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} |
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static struct console clps711x_console = { |
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.name = UART_CLPS711X_DEVNAME, |
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.device = uart_console_device, |
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.write = uart_clps711x_console_write, |
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.setup = uart_clps711x_console_setup, |
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.flags = CON_PRINTBUFFER, |
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.index = -1, |
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}; |
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#endif |
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static int uart_clps711x_probe(struct platform_device *pdev) |
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{ |
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struct device_node *np = pdev->dev.of_node; |
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struct clps711x_port *s; |
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struct resource *res; |
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struct clk *uart_clk; |
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int irq, ret; |
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s = devm_kzalloc(&pdev->dev, sizeof(*s), GFP_KERNEL); |
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if (!s) |
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return -ENOMEM; |
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uart_clk = devm_clk_get(&pdev->dev, NULL); |
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if (IS_ERR(uart_clk)) |
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return PTR_ERR(uart_clk); |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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s->port.membase = devm_ioremap_resource(&pdev->dev, res); |
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if (IS_ERR(s->port.membase)) |
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return PTR_ERR(s->port.membase); |
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irq = platform_get_irq(pdev, 0); |
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if (irq < 0) |
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return irq; |
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s->port.irq = irq; |
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s->rx_irq = platform_get_irq(pdev, 1); |
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if (s->rx_irq < 0) |
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return s->rx_irq; |
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s->syscon = syscon_regmap_lookup_by_phandle(np, "syscon"); |
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if (IS_ERR(s->syscon)) |
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return PTR_ERR(s->syscon); |
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s->port.line = of_alias_get_id(np, "serial"); |
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s->port.dev = &pdev->dev; |
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s->port.iotype = UPIO_MEM32; |
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s->port.mapbase = res->start; |
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s->port.type = PORT_CLPS711X; |
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s->port.fifosize = 16; |
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s->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_CLPS711X_CONSOLE); |
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s->port.flags = UPF_SKIP_TEST | UPF_FIXED_TYPE; |
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s->port.uartclk = clk_get_rate(uart_clk); |
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s->port.ops = &uart_clps711x_ops; |
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platform_set_drvdata(pdev, s); |
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s->gpios = mctrl_gpio_init_noauto(&pdev->dev, 0); |
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if (IS_ERR(s->gpios)) |
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return PTR_ERR(s->gpios); |
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ret = uart_add_one_port(&clps711x_uart, &s->port); |
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if (ret) |
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return ret; |
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/* Disable port */ |
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if (!uart_console(&s->port)) |
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regmap_update_bits(s->syscon, SYSCON_OFFSET, SYSCON_UARTEN, 0); |
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s->tx_enabled = 1; |
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ret = devm_request_irq(&pdev->dev, s->port.irq, uart_clps711x_int_tx, 0, |
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dev_name(&pdev->dev), &s->port); |
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if (ret) { |
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uart_remove_one_port(&clps711x_uart, &s->port); |
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return ret; |
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} |
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ret = devm_request_irq(&pdev->dev, s->rx_irq, uart_clps711x_int_rx, 0, |
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dev_name(&pdev->dev), &s->port); |
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if (ret) |
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uart_remove_one_port(&clps711x_uart, &s->port); |
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return ret; |
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} |
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static int uart_clps711x_remove(struct platform_device *pdev) |
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{ |
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struct clps711x_port *s = platform_get_drvdata(pdev); |
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return uart_remove_one_port(&clps711x_uart, &s->port); |
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} |
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static const struct of_device_id __maybe_unused clps711x_uart_dt_ids[] = { |
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{ .compatible = "cirrus,ep7209-uart", }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(of, clps711x_uart_dt_ids); |
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static struct platform_driver clps711x_uart_platform = { |
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.driver = { |
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.name = "clps711x-uart", |
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.of_match_table = of_match_ptr(clps711x_uart_dt_ids), |
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}, |
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.probe = uart_clps711x_probe, |
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.remove = uart_clps711x_remove, |
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}; |
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static int __init uart_clps711x_init(void) |
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{ |
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int ret; |
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#ifdef CONFIG_SERIAL_CLPS711X_CONSOLE |
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clps711x_uart.cons = &clps711x_console; |
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clps711x_console.data = &clps711x_uart; |
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#endif |
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ret = uart_register_driver(&clps711x_uart); |
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if (ret) |
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return ret; |
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return platform_driver_register(&clps711x_uart_platform); |
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} |
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module_init(uart_clps711x_init); |
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static void __exit uart_clps711x_exit(void) |
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{ |
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platform_driver_unregister(&clps711x_uart_platform); |
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uart_unregister_driver(&clps711x_uart); |
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} |
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module_exit(uart_clps711x_exit); |
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MODULE_AUTHOR("Deep Blue Solutions Ltd"); |
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MODULE_DESCRIPTION("CLPS711X serial driver"); |
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MODULE_LICENSE("GPL");
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