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683 lines
17 KiB
683 lines
17 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* ARC On-Chip(fpga) UART Driver |
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* |
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* Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com) |
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* |
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* vineetg: July 10th 2012 |
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* -Decoupled the driver from arch/arc |
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* +Using platform_get_resource() for irq/membase (thx to bfin_uart.c) |
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* +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx) |
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* |
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* Vineetg: Aug 21st 2010 |
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* -Is uart_tx_stopped() not done in tty write path as it has already been |
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* taken care of, in serial core |
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* |
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* Vineetg: Aug 18th 2010 |
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* -New Serial Core based ARC UART driver |
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* -Derived largely from blackfin driver albiet with some major tweaks |
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* |
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* TODO: |
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* -check if sysreq works |
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*/ |
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#include <linux/module.h> |
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#include <linux/serial.h> |
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#include <linux/console.h> |
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#include <linux/sysrq.h> |
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#include <linux/platform_device.h> |
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#include <linux/tty.h> |
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#include <linux/tty_flip.h> |
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#include <linux/serial_core.h> |
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#include <linux/io.h> |
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#include <linux/of_irq.h> |
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#include <linux/of_address.h> |
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/************************************* |
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* ARC UART Hardware Specs |
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************************************/ |
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#define ARC_UART_TX_FIFO_SIZE 1 |
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/* |
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* UART Register set (this is not a Standards Compliant IP) |
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* Also each reg is Word aligned, but only 8 bits wide |
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*/ |
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#define R_ID0 0 |
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#define R_ID1 4 |
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#define R_ID2 8 |
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#define R_ID3 12 |
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#define R_DATA 16 |
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#define R_STS 20 |
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#define R_BAUDL 24 |
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#define R_BAUDH 28 |
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/* Bits for UART Status Reg (R/W) */ |
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#define RXIENB 0x04 /* Receive Interrupt Enable */ |
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#define TXIENB 0x40 /* Transmit Interrupt Enable */ |
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#define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */ |
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#define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */ |
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#define RXFULL 0x08 /* Receive FIFO full */ |
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#define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */ |
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#define RXFERR 0x01 /* Frame Error: Stop Bit not detected */ |
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#define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */ |
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/* Uart bit fiddling helpers: lowest level */ |
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#define RBASE(port, reg) (port->membase + reg) |
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#define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r)) |
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#define UART_REG_GET(u, r) readb(RBASE(u, r)) |
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#define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v)) |
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#define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v)) |
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/* Uart bit fiddling helpers: API level */ |
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#define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val) |
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#define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA) |
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#define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val) |
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#define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val) |
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#define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val) |
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#define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS) |
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#define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB) |
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#define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB) |
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#define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB) |
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#define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB) |
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#define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB) |
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#define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB) |
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#define ARC_SERIAL_DEV_NAME "ttyARC" |
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struct arc_uart_port { |
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struct uart_port port; |
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unsigned long baud; |
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}; |
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#define to_arc_port(uport) container_of(uport, struct arc_uart_port, port) |
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static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS]; |
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#ifdef CONFIG_SERIAL_ARC_CONSOLE |
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static struct console arc_console; |
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#endif |
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#define DRIVER_NAME "arc-uart" |
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static struct uart_driver arc_uart_driver = { |
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.owner = THIS_MODULE, |
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.driver_name = DRIVER_NAME, |
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.dev_name = ARC_SERIAL_DEV_NAME, |
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.major = 0, |
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.minor = 0, |
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.nr = CONFIG_SERIAL_ARC_NR_PORTS, |
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#ifdef CONFIG_SERIAL_ARC_CONSOLE |
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.cons = &arc_console, |
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#endif |
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}; |
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static void arc_serial_stop_rx(struct uart_port *port) |
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{ |
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UART_RX_IRQ_DISABLE(port); |
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} |
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static void arc_serial_stop_tx(struct uart_port *port) |
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{ |
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while (!(UART_GET_STATUS(port) & TXEMPTY)) |
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cpu_relax(); |
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UART_TX_IRQ_DISABLE(port); |
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} |
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/* |
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* Return TIOCSER_TEMT when transmitter is not busy. |
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*/ |
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static unsigned int arc_serial_tx_empty(struct uart_port *port) |
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{ |
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unsigned int stat; |
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stat = UART_GET_STATUS(port); |
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if (stat & TXEMPTY) |
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return TIOCSER_TEMT; |
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return 0; |
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} |
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/* |
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* Driver internal routine, used by both tty(serial core) as well as tx-isr |
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* -Called under spinlock in either cases |
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* -also tty->flow.stopped has already been checked |
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* = by uart_start( ) before calling us |
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* = tx_ist checks that too before calling |
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*/ |
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static void arc_serial_tx_chars(struct uart_port *port) |
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{ |
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struct circ_buf *xmit = &port->state->xmit; |
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int sent = 0; |
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unsigned char ch; |
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if (unlikely(port->x_char)) { |
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UART_SET_DATA(port, port->x_char); |
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port->icount.tx++; |
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port->x_char = 0; |
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sent = 1; |
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} else if (!uart_circ_empty(xmit)) { |
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ch = xmit->buf[xmit->tail]; |
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
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port->icount.tx++; |
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while (!(UART_GET_STATUS(port) & TXEMPTY)) |
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cpu_relax(); |
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UART_SET_DATA(port, ch); |
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sent = 1; |
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} |
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/* |
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* If num chars in xmit buffer are too few, ask tty layer for more. |
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* By Hard ISR to schedule processing in software interrupt part |
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*/ |
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
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uart_write_wakeup(port); |
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if (sent) |
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UART_TX_IRQ_ENABLE(port); |
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} |
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/* |
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* port is locked and interrupts are disabled |
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* uart_start( ) calls us under the port spinlock irqsave |
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*/ |
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static void arc_serial_start_tx(struct uart_port *port) |
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{ |
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arc_serial_tx_chars(port); |
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} |
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static void arc_serial_rx_chars(struct uart_port *port, unsigned int status) |
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{ |
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unsigned int ch, flg = 0; |
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/* |
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* UART has 4 deep RX-FIFO. Driver's recongnition of this fact |
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* is very subtle. Here's how ... |
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* Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available, |
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* driver reads the DATA Reg and keeps doing that in a loop, until |
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* RX-EMPTY=1. Multiple chars being avail, with a single Interrupt, |
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* before RX-EMPTY=0, implies some sort of buffering going on in the |
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* controller, which is indeed the Rx-FIFO. |
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*/ |
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do { |
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/* |
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* This could be an Rx Intr for err (no data), |
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* so check err and clear that Intr first |
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*/ |
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if (unlikely(status & (RXOERR | RXFERR))) { |
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if (status & RXOERR) { |
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port->icount.overrun++; |
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flg = TTY_OVERRUN; |
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UART_CLR_STATUS(port, RXOERR); |
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} |
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if (status & RXFERR) { |
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port->icount.frame++; |
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flg = TTY_FRAME; |
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UART_CLR_STATUS(port, RXFERR); |
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} |
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} else |
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flg = TTY_NORMAL; |
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if (status & RXEMPTY) |
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continue; |
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ch = UART_GET_DATA(port); |
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port->icount.rx++; |
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if (!(uart_handle_sysrq_char(port, ch))) |
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uart_insert_char(port, status, RXOERR, ch, flg); |
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tty_flip_buffer_push(&port->state->port); |
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} while (!((status = UART_GET_STATUS(port)) & RXEMPTY)); |
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} |
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/* |
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* A note on the Interrupt handling state machine of this driver |
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* |
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* kernel printk writes funnel thru the console driver framework and in order |
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* to keep things simple as well as efficient, it writes to UART in polled |
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* mode, in one shot, and exits. |
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* |
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* OTOH, Userland output (via tty layer), uses interrupt based writes as there |
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* can be undeterministic delay between char writes. |
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* |
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* Thus Rx-interrupts are always enabled, while tx-interrupts are by default |
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* disabled. |
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* |
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* When tty has some data to send out, serial core calls driver's start_tx |
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* which |
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* -checks-if-tty-buffer-has-char-to-send |
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* -writes-data-to-uart |
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* -enable-tx-intr |
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* |
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* Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt. |
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* The first thing Tx ISR does is disable further Tx interrupts (as this could |
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* be the last char to send, before settling down into the quiet polled mode). |
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* It then calls the exact routine used by tty layer write to send out any |
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* more char in tty buffer. In case of sending, it re-enables Tx-intr. In case |
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* of no data, it remains disabled. |
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* This is how the transmit state machine is dynamically switched on/off |
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*/ |
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static irqreturn_t arc_serial_isr(int irq, void *dev_id) |
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{ |
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struct uart_port *port = dev_id; |
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unsigned int status; |
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status = UART_GET_STATUS(port); |
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/* |
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* Single IRQ for both Rx (data available) Tx (room available) Interrupt |
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* notifications from the UART Controller. |
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* To demultiplex between the two, we check the relevant bits |
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*/ |
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if (status & RXIENB) { |
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/* already in ISR, no need of xx_irqsave */ |
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spin_lock(&port->lock); |
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arc_serial_rx_chars(port, status); |
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spin_unlock(&port->lock); |
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} |
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if ((status & TXIENB) && (status & TXEMPTY)) { |
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/* Unconditionally disable further Tx-Interrupts. |
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* will be enabled by tx_chars() if needed. |
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*/ |
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UART_TX_IRQ_DISABLE(port); |
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spin_lock(&port->lock); |
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if (!uart_tx_stopped(port)) |
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arc_serial_tx_chars(port); |
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spin_unlock(&port->lock); |
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} |
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return IRQ_HANDLED; |
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} |
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static unsigned int arc_serial_get_mctrl(struct uart_port *port) |
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{ |
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/* |
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* Pretend we have a Modem status reg and following bits are |
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* always set, to satify the serial core state machine |
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* (DSR) Data Set Ready |
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* (CTS) Clear To Send |
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* (CAR) Carrier Detect |
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*/ |
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; |
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} |
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static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) |
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{ |
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/* MCR not present */ |
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} |
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static void arc_serial_break_ctl(struct uart_port *port, int break_state) |
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{ |
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/* ARC UART doesn't support sending Break signal */ |
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} |
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static int arc_serial_startup(struct uart_port *port) |
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{ |
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/* Before we hook up the ISR, Disable all UART Interrupts */ |
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UART_ALL_IRQ_DISABLE(port); |
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if (request_irq(port->irq, arc_serial_isr, 0, "arc uart rx-tx", port)) { |
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dev_warn(port->dev, "Unable to attach ARC UART intr\n"); |
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return -EBUSY; |
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} |
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UART_RX_IRQ_ENABLE(port); /* Only Rx IRQ enabled to begin with */ |
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return 0; |
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} |
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/* This is not really needed */ |
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static void arc_serial_shutdown(struct uart_port *port) |
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{ |
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free_irq(port->irq, port); |
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} |
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static void |
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arc_serial_set_termios(struct uart_port *port, struct ktermios *new, |
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struct ktermios *old) |
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{ |
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struct arc_uart_port *uart = to_arc_port(port); |
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unsigned int baud, uartl, uarth, hw_val; |
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unsigned long flags; |
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/* |
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* Use the generic handler so that any specially encoded baud rates |
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* such as SPD_xx flags or "%B0" can be handled |
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* Max Baud I suppose will not be more than current 115K * 4 |
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* Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1) |
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* spread over two 8-bit registers |
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*/ |
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baud = uart_get_baud_rate(port, new, old, 0, 460800); |
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hw_val = port->uartclk / (uart->baud * 4) - 1; |
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uartl = hw_val & 0xFF; |
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uarth = (hw_val >> 8) & 0xFF; |
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spin_lock_irqsave(&port->lock, flags); |
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UART_ALL_IRQ_DISABLE(port); |
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UART_SET_BAUDL(port, uartl); |
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UART_SET_BAUDH(port, uarth); |
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UART_RX_IRQ_ENABLE(port); |
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/* |
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* UART doesn't support Parity/Hardware Flow Control; |
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* Only supports 8N1 character size |
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*/ |
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new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE); |
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new->c_cflag |= CS8; |
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if (old) |
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tty_termios_copy_hw(new, old); |
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/* Don't rewrite B0 */ |
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if (tty_termios_baud_rate(new)) |
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tty_termios_encode_baud_rate(new, baud, baud); |
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uart_update_timeout(port, new->c_cflag, baud); |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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static const char *arc_serial_type(struct uart_port *port) |
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{ |
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return port->type == PORT_ARC ? DRIVER_NAME : NULL; |
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} |
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static void arc_serial_release_port(struct uart_port *port) |
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{ |
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} |
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static int arc_serial_request_port(struct uart_port *port) |
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{ |
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return 0; |
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} |
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/* |
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* Verify the new serial_struct (for TIOCSSERIAL). |
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*/ |
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static int |
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arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser) |
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{ |
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if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC) |
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return -EINVAL; |
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return 0; |
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} |
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/* |
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* Configure/autoconfigure the port. |
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*/ |
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static void arc_serial_config_port(struct uart_port *port, int flags) |
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{ |
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if (flags & UART_CONFIG_TYPE) |
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port->type = PORT_ARC; |
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} |
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#ifdef CONFIG_CONSOLE_POLL |
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static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr) |
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{ |
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while (!(UART_GET_STATUS(port) & TXEMPTY)) |
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cpu_relax(); |
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UART_SET_DATA(port, chr); |
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} |
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static int arc_serial_poll_getchar(struct uart_port *port) |
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{ |
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unsigned char chr; |
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while (!(UART_GET_STATUS(port) & RXEMPTY)) |
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cpu_relax(); |
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chr = UART_GET_DATA(port); |
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return chr; |
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} |
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#endif |
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static const struct uart_ops arc_serial_pops = { |
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.tx_empty = arc_serial_tx_empty, |
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.set_mctrl = arc_serial_set_mctrl, |
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.get_mctrl = arc_serial_get_mctrl, |
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.stop_tx = arc_serial_stop_tx, |
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.start_tx = arc_serial_start_tx, |
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.stop_rx = arc_serial_stop_rx, |
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.break_ctl = arc_serial_break_ctl, |
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.startup = arc_serial_startup, |
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.shutdown = arc_serial_shutdown, |
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.set_termios = arc_serial_set_termios, |
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.type = arc_serial_type, |
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.release_port = arc_serial_release_port, |
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.request_port = arc_serial_request_port, |
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.config_port = arc_serial_config_port, |
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.verify_port = arc_serial_verify_port, |
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#ifdef CONFIG_CONSOLE_POLL |
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.poll_put_char = arc_serial_poll_putchar, |
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.poll_get_char = arc_serial_poll_getchar, |
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#endif |
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}; |
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#ifdef CONFIG_SERIAL_ARC_CONSOLE |
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static int arc_serial_console_setup(struct console *co, char *options) |
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{ |
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struct uart_port *port; |
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int baud = 115200; |
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int bits = 8; |
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int parity = 'n'; |
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int flow = 'n'; |
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if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS) |
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return -ENODEV; |
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/* |
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* The uart port backing the console (e.g. ttyARC1) might not have been |
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* init yet. If so, defer the console setup to after the port. |
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*/ |
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port = &arc_uart_ports[co->index].port; |
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if (!port->membase) |
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return -ENODEV; |
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if (options) |
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uart_parse_options(options, &baud, &parity, &bits, &flow); |
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/* |
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* Serial core will call port->ops->set_termios( ) |
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* which will set the baud reg |
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*/ |
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return uart_set_options(port, co, baud, parity, bits, flow); |
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} |
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static void arc_serial_console_putchar(struct uart_port *port, int ch) |
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{ |
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while (!(UART_GET_STATUS(port) & TXEMPTY)) |
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cpu_relax(); |
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UART_SET_DATA(port, (unsigned char)ch); |
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} |
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/* |
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* Interrupts are disabled on entering |
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*/ |
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static void arc_serial_console_write(struct console *co, const char *s, |
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unsigned int count) |
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{ |
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struct uart_port *port = &arc_uart_ports[co->index].port; |
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unsigned long flags; |
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spin_lock_irqsave(&port->lock, flags); |
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uart_console_write(port, s, count, arc_serial_console_putchar); |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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static struct console arc_console = { |
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.name = ARC_SERIAL_DEV_NAME, |
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.write = arc_serial_console_write, |
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.device = uart_console_device, |
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.setup = arc_serial_console_setup, |
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.flags = CON_PRINTBUFFER, |
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.index = -1, |
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.data = &arc_uart_driver |
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}; |
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static void arc_early_serial_write(struct console *con, const char *s, |
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unsigned int n) |
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{ |
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struct earlycon_device *dev = con->data; |
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uart_console_write(&dev->port, s, n, arc_serial_console_putchar); |
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} |
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static int __init arc_early_console_setup(struct earlycon_device *dev, |
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const char *opt) |
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{ |
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struct uart_port *port = &dev->port; |
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unsigned int l, h, hw_val; |
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if (!dev->port.membase) |
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return -ENODEV; |
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hw_val = port->uartclk / (dev->baud * 4) - 1; |
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l = hw_val & 0xFF; |
|
h = (hw_val >> 8) & 0xFF; |
|
|
|
UART_SET_BAUDL(port, l); |
|
UART_SET_BAUDH(port, h); |
|
|
|
dev->con->write = arc_early_serial_write; |
|
return 0; |
|
} |
|
OF_EARLYCON_DECLARE(arc_uart, "snps,arc-uart", arc_early_console_setup); |
|
|
|
#endif /* CONFIG_SERIAL_ARC_CONSOLE */ |
|
|
|
static int arc_serial_probe(struct platform_device *pdev) |
|
{ |
|
struct device_node *np = pdev->dev.of_node; |
|
struct arc_uart_port *uart; |
|
struct uart_port *port; |
|
int dev_id; |
|
u32 val; |
|
|
|
/* no device tree device */ |
|
if (!np) |
|
return -ENODEV; |
|
|
|
dev_id = of_alias_get_id(np, "serial"); |
|
if (dev_id < 0) |
|
dev_id = 0; |
|
|
|
if (dev_id >= ARRAY_SIZE(arc_uart_ports)) { |
|
dev_err(&pdev->dev, "serial%d out of range\n", dev_id); |
|
return -EINVAL; |
|
} |
|
|
|
uart = &arc_uart_ports[dev_id]; |
|
port = &uart->port; |
|
|
|
if (of_property_read_u32(np, "clock-frequency", &val)) { |
|
dev_err(&pdev->dev, "clock-frequency property NOTset\n"); |
|
return -EINVAL; |
|
} |
|
port->uartclk = val; |
|
|
|
if (of_property_read_u32(np, "current-speed", &val)) { |
|
dev_err(&pdev->dev, "current-speed property NOT set\n"); |
|
return -EINVAL; |
|
} |
|
uart->baud = val; |
|
|
|
port->membase = of_iomap(np, 0); |
|
if (!port->membase) |
|
/* No point of dev_err since UART itself is hosed here */ |
|
return -ENXIO; |
|
|
|
port->irq = irq_of_parse_and_map(np, 0); |
|
|
|
port->dev = &pdev->dev; |
|
port->iotype = UPIO_MEM; |
|
port->flags = UPF_BOOT_AUTOCONF; |
|
port->line = dev_id; |
|
port->ops = &arc_serial_pops; |
|
port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_ARC_CONSOLE); |
|
|
|
port->fifosize = ARC_UART_TX_FIFO_SIZE; |
|
|
|
/* |
|
* uart_insert_char( ) uses it in decideding whether to ignore a |
|
* char or not. Explicitly setting it here, removes the subtelty |
|
*/ |
|
port->ignore_status_mask = 0; |
|
|
|
return uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port); |
|
} |
|
|
|
static int arc_serial_remove(struct platform_device *pdev) |
|
{ |
|
/* This will never be called */ |
|
return 0; |
|
} |
|
|
|
static const struct of_device_id arc_uart_dt_ids[] = { |
|
{ .compatible = "snps,arc-uart" }, |
|
{ /* Sentinel */ } |
|
}; |
|
MODULE_DEVICE_TABLE(of, arc_uart_dt_ids); |
|
|
|
static struct platform_driver arc_platform_driver = { |
|
.probe = arc_serial_probe, |
|
.remove = arc_serial_remove, |
|
.driver = { |
|
.name = DRIVER_NAME, |
|
.of_match_table = arc_uart_dt_ids, |
|
}, |
|
}; |
|
|
|
static int __init arc_serial_init(void) |
|
{ |
|
int ret; |
|
|
|
ret = uart_register_driver(&arc_uart_driver); |
|
if (ret) |
|
return ret; |
|
|
|
ret = platform_driver_register(&arc_platform_driver); |
|
if (ret) |
|
uart_unregister_driver(&arc_uart_driver); |
|
|
|
return ret; |
|
} |
|
|
|
static void __exit arc_serial_exit(void) |
|
{ |
|
platform_driver_unregister(&arc_platform_driver); |
|
uart_unregister_driver(&arc_uart_driver); |
|
} |
|
|
|
module_init(arc_serial_init); |
|
module_exit(arc_serial_exit); |
|
|
|
MODULE_LICENSE("GPL"); |
|
MODULE_ALIAS("platform:" DRIVER_NAME); |
|
MODULE_AUTHOR("Vineet Gupta"); |
|
MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");
|
|
|