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641 lines
17 KiB
641 lines
17 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (c) 2015, Sony Mobile Communications Inc. |
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* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
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*/ |
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|
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#include <linux/interrupt.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/module.h> |
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#include <linux/of_irq.h> |
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#include <linux/platform_device.h> |
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#include <linux/spinlock.h> |
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#include <linux/regmap.h> |
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#include <linux/soc/qcom/smem.h> |
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#include <linux/soc/qcom/smem_state.h> |
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|
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/* |
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* This driver implements the Qualcomm Shared Memory State Machine, a mechanism |
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* for communicating single bit state information to remote processors. |
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* |
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* The implementation is based on two sections of shared memory; the first |
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* holding the state bits and the second holding a matrix of subscription bits. |
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* |
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* The state bits are structured in entries of 32 bits, each belonging to one |
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* system in the SoC. The entry belonging to the local system is considered |
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* read-write, while the rest should be considered read-only. |
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* |
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* The subscription matrix consists of N bitmaps per entry, denoting interest |
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* in updates of the entry for each of the N hosts. Upon updating a state bit |
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* each host's subscription bitmap should be queried and the remote system |
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* should be interrupted if they request so. |
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* |
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* The subscription matrix is laid out in entry-major order: |
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* entry0: [host0 ... hostN] |
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* . |
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* . |
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* entryM: [host0 ... hostN] |
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* |
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* A third, optional, shared memory region might contain information regarding |
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* the number of entries in the state bitmap as well as number of columns in |
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* the subscription matrix. |
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*/ |
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|
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/* |
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* Shared memory identifiers, used to acquire handles to respective memory |
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* region. |
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*/ |
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#define SMEM_SMSM_SHARED_STATE 85 |
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#define SMEM_SMSM_CPU_INTR_MASK 333 |
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#define SMEM_SMSM_SIZE_INFO 419 |
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/* |
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* Default sizes, in case SMEM_SMSM_SIZE_INFO is not found. |
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*/ |
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#define SMSM_DEFAULT_NUM_ENTRIES 8 |
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#define SMSM_DEFAULT_NUM_HOSTS 3 |
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|
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struct smsm_entry; |
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struct smsm_host; |
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|
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/** |
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* struct qcom_smsm - smsm driver context |
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* @dev: smsm device pointer |
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* @local_host: column in the subscription matrix representing this system |
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* @num_hosts: number of columns in the subscription matrix |
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* @num_entries: number of entries in the state map and rows in the subscription |
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* matrix |
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* @local_state: pointer to the local processor's state bits |
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* @subscription: pointer to local processor's row in subscription matrix |
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* @state: smem state handle |
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* @lock: spinlock for read-modify-write of the outgoing state |
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* @entries: context for each of the entries |
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* @hosts: context for each of the hosts |
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*/ |
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struct qcom_smsm { |
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struct device *dev; |
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u32 local_host; |
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u32 num_hosts; |
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u32 num_entries; |
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u32 *local_state; |
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u32 *subscription; |
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struct qcom_smem_state *state; |
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spinlock_t lock; |
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struct smsm_entry *entries; |
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struct smsm_host *hosts; |
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}; |
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/** |
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* struct smsm_entry - per remote processor entry context |
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* @smsm: back-reference to driver context |
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* @domain: IRQ domain for this entry, if representing a remote system |
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* @irq_enabled: bitmap of which state bits IRQs are enabled |
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* @irq_rising: bitmap tracking if rising bits should be propagated |
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* @irq_falling: bitmap tracking if falling bits should be propagated |
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* @last_value: snapshot of state bits last time the interrupts where propagated |
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* @remote_state: pointer to this entry's state bits |
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* @subscription: pointer to a row in the subscription matrix representing this |
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* entry |
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*/ |
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struct smsm_entry { |
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struct qcom_smsm *smsm; |
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struct irq_domain *domain; |
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DECLARE_BITMAP(irq_enabled, 32); |
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DECLARE_BITMAP(irq_rising, 32); |
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DECLARE_BITMAP(irq_falling, 32); |
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unsigned long last_value; |
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u32 *remote_state; |
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u32 *subscription; |
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}; |
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/** |
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* struct smsm_host - representation of a remote host |
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* @ipc_regmap: regmap for outgoing interrupt |
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* @ipc_offset: offset in @ipc_regmap for outgoing interrupt |
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* @ipc_bit: bit in @ipc_regmap + @ipc_offset for outgoing interrupt |
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*/ |
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struct smsm_host { |
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struct regmap *ipc_regmap; |
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int ipc_offset; |
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int ipc_bit; |
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}; |
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/** |
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* smsm_update_bits() - change bit in outgoing entry and inform subscribers |
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* @data: smsm context pointer |
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* @mask: value mask |
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* @value: new value |
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* |
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* Used to set and clear the bits in the outgoing/local entry and inform |
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* subscribers about the change. |
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*/ |
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static int smsm_update_bits(void *data, u32 mask, u32 value) |
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{ |
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struct qcom_smsm *smsm = data; |
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struct smsm_host *hostp; |
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unsigned long flags; |
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u32 changes; |
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u32 host; |
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u32 orig; |
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u32 val; |
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spin_lock_irqsave(&smsm->lock, flags); |
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/* Update the entry */ |
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val = orig = readl(smsm->local_state); |
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val &= ~mask; |
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val |= value; |
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/* Don't signal if we didn't change the value */ |
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changes = val ^ orig; |
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if (!changes) { |
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spin_unlock_irqrestore(&smsm->lock, flags); |
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goto done; |
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} |
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/* Write out the new value */ |
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writel(val, smsm->local_state); |
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spin_unlock_irqrestore(&smsm->lock, flags); |
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/* Make sure the value update is ordered before any kicks */ |
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wmb(); |
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/* Iterate over all hosts to check whom wants a kick */ |
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for (host = 0; host < smsm->num_hosts; host++) { |
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hostp = &smsm->hosts[host]; |
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val = readl(smsm->subscription + host); |
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if (val & changes && hostp->ipc_regmap) { |
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regmap_write(hostp->ipc_regmap, |
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hostp->ipc_offset, |
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BIT(hostp->ipc_bit)); |
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} |
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} |
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done: |
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return 0; |
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} |
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static const struct qcom_smem_state_ops smsm_state_ops = { |
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.update_bits = smsm_update_bits, |
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}; |
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/** |
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* smsm_intr() - cascading IRQ handler for SMSM |
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* @irq: unused |
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* @data: entry related to this IRQ |
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* |
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* This function cascades an incoming interrupt from a remote system, based on |
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* the state bits and configuration. |
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*/ |
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static irqreturn_t smsm_intr(int irq, void *data) |
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{ |
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struct smsm_entry *entry = data; |
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unsigned i; |
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int irq_pin; |
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u32 changed; |
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u32 val; |
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val = readl(entry->remote_state); |
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changed = val ^ xchg(&entry->last_value, val); |
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for_each_set_bit(i, entry->irq_enabled, 32) { |
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if (!(changed & BIT(i))) |
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continue; |
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if (val & BIT(i)) { |
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if (test_bit(i, entry->irq_rising)) { |
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irq_pin = irq_find_mapping(entry->domain, i); |
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handle_nested_irq(irq_pin); |
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} |
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} else { |
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if (test_bit(i, entry->irq_falling)) { |
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irq_pin = irq_find_mapping(entry->domain, i); |
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handle_nested_irq(irq_pin); |
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} |
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} |
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} |
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return IRQ_HANDLED; |
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} |
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/** |
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* smsm_mask_irq() - un-subscribe from cascades of IRQs of a certain staus bit |
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* @irqd: IRQ handle to be masked |
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* |
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* This un-subscribes the local CPU from interrupts upon changes to the defines |
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* status bit. The bit is also cleared from cascading. |
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*/ |
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static void smsm_mask_irq(struct irq_data *irqd) |
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{ |
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struct smsm_entry *entry = irq_data_get_irq_chip_data(irqd); |
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irq_hw_number_t irq = irqd_to_hwirq(irqd); |
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struct qcom_smsm *smsm = entry->smsm; |
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u32 val; |
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if (entry->subscription) { |
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val = readl(entry->subscription + smsm->local_host); |
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val &= ~BIT(irq); |
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writel(val, entry->subscription + smsm->local_host); |
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} |
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clear_bit(irq, entry->irq_enabled); |
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} |
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/** |
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* smsm_unmask_irq() - subscribe to cascades of IRQs of a certain status bit |
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* @irqd: IRQ handle to be unmasked |
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* |
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* This subscribes the local CPU to interrupts upon changes to the defined |
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* status bit. The bit is also marked for cascading. |
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*/ |
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static void smsm_unmask_irq(struct irq_data *irqd) |
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{ |
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struct smsm_entry *entry = irq_data_get_irq_chip_data(irqd); |
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irq_hw_number_t irq = irqd_to_hwirq(irqd); |
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struct qcom_smsm *smsm = entry->smsm; |
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u32 val; |
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/* Make sure our last cached state is up-to-date */ |
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if (readl(entry->remote_state) & BIT(irq)) |
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set_bit(irq, &entry->last_value); |
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else |
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clear_bit(irq, &entry->last_value); |
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set_bit(irq, entry->irq_enabled); |
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if (entry->subscription) { |
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val = readl(entry->subscription + smsm->local_host); |
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val |= BIT(irq); |
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writel(val, entry->subscription + smsm->local_host); |
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} |
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} |
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/** |
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* smsm_set_irq_type() - updates the requested IRQ type for the cascading |
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* @irqd: consumer interrupt handle |
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* @type: requested flags |
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*/ |
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static int smsm_set_irq_type(struct irq_data *irqd, unsigned int type) |
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{ |
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struct smsm_entry *entry = irq_data_get_irq_chip_data(irqd); |
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irq_hw_number_t irq = irqd_to_hwirq(irqd); |
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if (!(type & IRQ_TYPE_EDGE_BOTH)) |
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return -EINVAL; |
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if (type & IRQ_TYPE_EDGE_RISING) |
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set_bit(irq, entry->irq_rising); |
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else |
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clear_bit(irq, entry->irq_rising); |
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if (type & IRQ_TYPE_EDGE_FALLING) |
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set_bit(irq, entry->irq_falling); |
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else |
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clear_bit(irq, entry->irq_falling); |
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return 0; |
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} |
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static int smsm_get_irqchip_state(struct irq_data *irqd, |
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enum irqchip_irq_state which, bool *state) |
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{ |
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struct smsm_entry *entry = irq_data_get_irq_chip_data(irqd); |
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irq_hw_number_t irq = irqd_to_hwirq(irqd); |
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u32 val; |
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if (which != IRQCHIP_STATE_LINE_LEVEL) |
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return -EINVAL; |
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val = readl(entry->remote_state); |
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*state = !!(val & BIT(irq)); |
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return 0; |
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} |
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static struct irq_chip smsm_irq_chip = { |
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.name = "smsm", |
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.irq_mask = smsm_mask_irq, |
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.irq_unmask = smsm_unmask_irq, |
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.irq_set_type = smsm_set_irq_type, |
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.irq_get_irqchip_state = smsm_get_irqchip_state, |
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}; |
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/** |
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* smsm_irq_map() - sets up a mapping for a cascaded IRQ |
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* @d: IRQ domain representing an entry |
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* @irq: IRQ to set up |
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* @hw: unused |
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*/ |
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static int smsm_irq_map(struct irq_domain *d, |
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unsigned int irq, |
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irq_hw_number_t hw) |
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{ |
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struct smsm_entry *entry = d->host_data; |
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irq_set_chip_and_handler(irq, &smsm_irq_chip, handle_level_irq); |
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irq_set_chip_data(irq, entry); |
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irq_set_nested_thread(irq, 1); |
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return 0; |
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} |
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static const struct irq_domain_ops smsm_irq_ops = { |
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.map = smsm_irq_map, |
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.xlate = irq_domain_xlate_twocell, |
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}; |
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/** |
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* smsm_parse_ipc() - parses a qcom,ipc-%d device tree property |
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* @smsm: smsm driver context |
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* @host_id: index of the remote host to be resolved |
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* |
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* Parses device tree to acquire the information needed for sending the |
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* outgoing interrupts to a remote host - identified by @host_id. |
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*/ |
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static int smsm_parse_ipc(struct qcom_smsm *smsm, unsigned host_id) |
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{ |
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struct device_node *syscon; |
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struct device_node *node = smsm->dev->of_node; |
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struct smsm_host *host = &smsm->hosts[host_id]; |
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char key[16]; |
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int ret; |
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snprintf(key, sizeof(key), "qcom,ipc-%d", host_id); |
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syscon = of_parse_phandle(node, key, 0); |
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if (!syscon) |
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return 0; |
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host->ipc_regmap = syscon_node_to_regmap(syscon); |
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if (IS_ERR(host->ipc_regmap)) |
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return PTR_ERR(host->ipc_regmap); |
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ret = of_property_read_u32_index(node, key, 1, &host->ipc_offset); |
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if (ret < 0) { |
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dev_err(smsm->dev, "no offset in %s\n", key); |
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return -EINVAL; |
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} |
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ret = of_property_read_u32_index(node, key, 2, &host->ipc_bit); |
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if (ret < 0) { |
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dev_err(smsm->dev, "no bit in %s\n", key); |
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return -EINVAL; |
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} |
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return 0; |
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} |
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/** |
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* smsm_inbound_entry() - parse DT and set up an entry representing a remote system |
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* @smsm: smsm driver context |
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* @entry: entry context to be set up |
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* @node: dt node containing the entry's properties |
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*/ |
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static int smsm_inbound_entry(struct qcom_smsm *smsm, |
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struct smsm_entry *entry, |
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struct device_node *node) |
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{ |
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int ret; |
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int irq; |
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irq = irq_of_parse_and_map(node, 0); |
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if (!irq) { |
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dev_err(smsm->dev, "failed to parse smsm interrupt\n"); |
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return -EINVAL; |
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} |
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ret = devm_request_threaded_irq(smsm->dev, irq, |
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NULL, smsm_intr, |
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IRQF_ONESHOT, |
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"smsm", (void *)entry); |
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if (ret) { |
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dev_err(smsm->dev, "failed to request interrupt\n"); |
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return ret; |
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} |
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entry->domain = irq_domain_add_linear(node, 32, &smsm_irq_ops, entry); |
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if (!entry->domain) { |
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dev_err(smsm->dev, "failed to add irq_domain\n"); |
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return -ENOMEM; |
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} |
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return 0; |
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} |
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/** |
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* smsm_get_size_info() - parse the optional memory segment for sizes |
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* @smsm: smsm driver context |
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* |
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* Attempt to acquire the number of hosts and entries from the optional shared |
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* memory location. Not being able to find this segment should indicate that |
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* we're on a older system where these values was hard coded to |
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* SMSM_DEFAULT_NUM_ENTRIES and SMSM_DEFAULT_NUM_HOSTS. |
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* |
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* Returns 0 on success, negative errno on failure. |
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*/ |
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static int smsm_get_size_info(struct qcom_smsm *smsm) |
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{ |
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size_t size; |
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struct { |
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u32 num_hosts; |
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u32 num_entries; |
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u32 reserved0; |
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u32 reserved1; |
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} *info; |
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info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_SMSM_SIZE_INFO, &size); |
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if (IS_ERR(info) && PTR_ERR(info) != -ENOENT) { |
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if (PTR_ERR(info) != -EPROBE_DEFER) |
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dev_err(smsm->dev, "unable to retrieve smsm size info\n"); |
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return PTR_ERR(info); |
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} else if (IS_ERR(info) || size != sizeof(*info)) { |
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dev_warn(smsm->dev, "no smsm size info, using defaults\n"); |
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smsm->num_entries = SMSM_DEFAULT_NUM_ENTRIES; |
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smsm->num_hosts = SMSM_DEFAULT_NUM_HOSTS; |
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return 0; |
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} |
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smsm->num_entries = info->num_entries; |
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smsm->num_hosts = info->num_hosts; |
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dev_dbg(smsm->dev, |
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"found custom size of smsm: %d entries %d hosts\n", |
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smsm->num_entries, smsm->num_hosts); |
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|
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return 0; |
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} |
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static int qcom_smsm_probe(struct platform_device *pdev) |
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{ |
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struct device_node *local_node; |
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struct device_node *node; |
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struct smsm_entry *entry; |
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struct qcom_smsm *smsm; |
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u32 *intr_mask; |
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size_t size; |
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u32 *states; |
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u32 id; |
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int ret; |
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smsm = devm_kzalloc(&pdev->dev, sizeof(*smsm), GFP_KERNEL); |
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if (!smsm) |
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return -ENOMEM; |
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smsm->dev = &pdev->dev; |
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spin_lock_init(&smsm->lock); |
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ret = smsm_get_size_info(smsm); |
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if (ret) |
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return ret; |
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smsm->entries = devm_kcalloc(&pdev->dev, |
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smsm->num_entries, |
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sizeof(struct smsm_entry), |
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GFP_KERNEL); |
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if (!smsm->entries) |
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return -ENOMEM; |
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smsm->hosts = devm_kcalloc(&pdev->dev, |
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smsm->num_hosts, |
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sizeof(struct smsm_host), |
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GFP_KERNEL); |
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if (!smsm->hosts) |
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return -ENOMEM; |
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for_each_child_of_node(pdev->dev.of_node, local_node) { |
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if (of_find_property(local_node, "#qcom,smem-state-cells", NULL)) |
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break; |
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} |
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if (!local_node) { |
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dev_err(&pdev->dev, "no state entry\n"); |
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return -EINVAL; |
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} |
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of_property_read_u32(pdev->dev.of_node, |
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"qcom,local-host", |
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&smsm->local_host); |
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|
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/* Parse the host properties */ |
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for (id = 0; id < smsm->num_hosts; id++) { |
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ret = smsm_parse_ipc(smsm, id); |
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if (ret < 0) |
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return ret; |
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} |
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/* Acquire the main SMSM state vector */ |
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ret = qcom_smem_alloc(QCOM_SMEM_HOST_ANY, SMEM_SMSM_SHARED_STATE, |
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smsm->num_entries * sizeof(u32)); |
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if (ret < 0 && ret != -EEXIST) { |
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dev_err(&pdev->dev, "unable to allocate shared state entry\n"); |
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return ret; |
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} |
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states = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_SMSM_SHARED_STATE, NULL); |
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if (IS_ERR(states)) { |
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dev_err(&pdev->dev, "Unable to acquire shared state entry\n"); |
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return PTR_ERR(states); |
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} |
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|
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/* Acquire the list of interrupt mask vectors */ |
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size = smsm->num_entries * smsm->num_hosts * sizeof(u32); |
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ret = qcom_smem_alloc(QCOM_SMEM_HOST_ANY, SMEM_SMSM_CPU_INTR_MASK, size); |
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if (ret < 0 && ret != -EEXIST) { |
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dev_err(&pdev->dev, "unable to allocate smsm interrupt mask\n"); |
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return ret; |
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} |
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intr_mask = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_SMSM_CPU_INTR_MASK, NULL); |
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if (IS_ERR(intr_mask)) { |
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dev_err(&pdev->dev, "unable to acquire shared memory interrupt mask\n"); |
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return PTR_ERR(intr_mask); |
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} |
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|
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/* Setup the reference to the local state bits */ |
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smsm->local_state = states + smsm->local_host; |
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smsm->subscription = intr_mask + smsm->local_host * smsm->num_hosts; |
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|
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/* Register the outgoing state */ |
|
smsm->state = qcom_smem_state_register(local_node, &smsm_state_ops, smsm); |
|
if (IS_ERR(smsm->state)) { |
|
dev_err(smsm->dev, "failed to register qcom_smem_state\n"); |
|
return PTR_ERR(smsm->state); |
|
} |
|
|
|
/* Register handlers for remote processor entries of interest. */ |
|
for_each_available_child_of_node(pdev->dev.of_node, node) { |
|
if (!of_property_read_bool(node, "interrupt-controller")) |
|
continue; |
|
|
|
ret = of_property_read_u32(node, "reg", &id); |
|
if (ret || id >= smsm->num_entries) { |
|
dev_err(&pdev->dev, "invalid reg of entry\n"); |
|
if (!ret) |
|
ret = -EINVAL; |
|
goto unwind_interfaces; |
|
} |
|
entry = &smsm->entries[id]; |
|
|
|
entry->smsm = smsm; |
|
entry->remote_state = states + id; |
|
|
|
/* Setup subscription pointers and unsubscribe to any kicks */ |
|
entry->subscription = intr_mask + id * smsm->num_hosts; |
|
writel(0, entry->subscription + smsm->local_host); |
|
|
|
ret = smsm_inbound_entry(smsm, entry, node); |
|
if (ret < 0) |
|
goto unwind_interfaces; |
|
} |
|
|
|
platform_set_drvdata(pdev, smsm); |
|
|
|
return 0; |
|
|
|
unwind_interfaces: |
|
for (id = 0; id < smsm->num_entries; id++) |
|
if (smsm->entries[id].domain) |
|
irq_domain_remove(smsm->entries[id].domain); |
|
|
|
qcom_smem_state_unregister(smsm->state); |
|
|
|
return ret; |
|
} |
|
|
|
static int qcom_smsm_remove(struct platform_device *pdev) |
|
{ |
|
struct qcom_smsm *smsm = platform_get_drvdata(pdev); |
|
unsigned id; |
|
|
|
for (id = 0; id < smsm->num_entries; id++) |
|
if (smsm->entries[id].domain) |
|
irq_domain_remove(smsm->entries[id].domain); |
|
|
|
qcom_smem_state_unregister(smsm->state); |
|
|
|
return 0; |
|
} |
|
|
|
static const struct of_device_id qcom_smsm_of_match[] = { |
|
{ .compatible = "qcom,smsm" }, |
|
{} |
|
}; |
|
MODULE_DEVICE_TABLE(of, qcom_smsm_of_match); |
|
|
|
static struct platform_driver qcom_smsm_driver = { |
|
.probe = qcom_smsm_probe, |
|
.remove = qcom_smsm_remove, |
|
.driver = { |
|
.name = "qcom-smsm", |
|
.of_match_table = qcom_smsm_of_match, |
|
}, |
|
}; |
|
module_platform_driver(qcom_smsm_driver); |
|
|
|
MODULE_DESCRIPTION("Qualcomm Shared Memory State Machine driver"); |
|
MODULE_LICENSE("GPL v2");
|
|
|