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219 lines
5.3 KiB
219 lines
5.3 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Copyright (C) 2015 Freescale Semiconductor, Inc. All rights reserved. |
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* |
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* Authors: Zhao Qiang <[email protected]> |
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* |
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* Description: |
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* QE TDM API Set - TDM specific routines implementations. |
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*/ |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/of_address.h> |
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#include <linux/of_irq.h> |
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#include <linux/of_platform.h> |
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#include <soc/fsl/qe/qe_tdm.h> |
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static int set_tdm_framer(const char *tdm_framer_type) |
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{ |
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if (strcmp(tdm_framer_type, "e1") == 0) |
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return TDM_FRAMER_E1; |
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else if (strcmp(tdm_framer_type, "t1") == 0) |
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return TDM_FRAMER_T1; |
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else |
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return -EINVAL; |
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} |
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static void set_si_param(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info) |
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{ |
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struct si_mode_info *si_info = &ut_info->si_info; |
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if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK) { |
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si_info->simr_crt = 1; |
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si_info->simr_rfsd = 0; |
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} |
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} |
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int ucc_of_parse_tdm(struct device_node *np, struct ucc_tdm *utdm, |
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struct ucc_tdm_info *ut_info) |
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{ |
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const char *sprop; |
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int ret = 0; |
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u32 val; |
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sprop = of_get_property(np, "fsl,rx-sync-clock", NULL); |
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if (sprop) { |
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ut_info->uf_info.rx_sync = qe_clock_source(sprop); |
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if ((ut_info->uf_info.rx_sync < QE_CLK_NONE) || |
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(ut_info->uf_info.rx_sync > QE_RSYNC_PIN)) { |
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pr_err("QE-TDM: Invalid rx-sync-clock property\n"); |
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return -EINVAL; |
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} |
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} else { |
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pr_err("QE-TDM: Invalid rx-sync-clock property\n"); |
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return -EINVAL; |
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} |
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sprop = of_get_property(np, "fsl,tx-sync-clock", NULL); |
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if (sprop) { |
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ut_info->uf_info.tx_sync = qe_clock_source(sprop); |
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if ((ut_info->uf_info.tx_sync < QE_CLK_NONE) || |
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(ut_info->uf_info.tx_sync > QE_TSYNC_PIN)) { |
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pr_err("QE-TDM: Invalid tx-sync-clock property\n"); |
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return -EINVAL; |
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} |
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} else { |
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pr_err("QE-TDM: Invalid tx-sync-clock property\n"); |
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return -EINVAL; |
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} |
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ret = of_property_read_u32_index(np, "fsl,tx-timeslot-mask", 0, &val); |
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if (ret) { |
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pr_err("QE-TDM: Invalid tx-timeslot-mask property\n"); |
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return -EINVAL; |
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} |
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utdm->tx_ts_mask = val; |
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ret = of_property_read_u32_index(np, "fsl,rx-timeslot-mask", 0, &val); |
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if (ret) { |
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ret = -EINVAL; |
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pr_err("QE-TDM: Invalid rx-timeslot-mask property\n"); |
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return ret; |
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} |
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utdm->rx_ts_mask = val; |
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ret = of_property_read_u32_index(np, "fsl,tdm-id", 0, &val); |
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if (ret) { |
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ret = -EINVAL; |
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pr_err("QE-TDM: No fsl,tdm-id property for this UCC\n"); |
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return ret; |
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} |
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utdm->tdm_port = val; |
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ut_info->uf_info.tdm_num = utdm->tdm_port; |
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if (of_property_read_bool(np, "fsl,tdm-internal-loopback")) |
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utdm->tdm_mode = TDM_INTERNAL_LOOPBACK; |
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else |
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utdm->tdm_mode = TDM_NORMAL; |
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sprop = of_get_property(np, "fsl,tdm-framer-type", NULL); |
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if (!sprop) { |
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ret = -EINVAL; |
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pr_err("QE-TDM: No tdm-framer-type property for UCC\n"); |
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return ret; |
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} |
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ret = set_tdm_framer(sprop); |
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if (ret < 0) |
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return -EINVAL; |
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utdm->tdm_framer_type = ret; |
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ret = of_property_read_u32_index(np, "fsl,siram-entry-id", 0, &val); |
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if (ret) { |
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ret = -EINVAL; |
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pr_err("QE-TDM: No siram entry id for UCC\n"); |
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return ret; |
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} |
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utdm->siram_entry_id = val; |
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set_si_param(utdm, ut_info); |
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return ret; |
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} |
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EXPORT_SYMBOL(ucc_of_parse_tdm); |
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void ucc_tdm_init(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info) |
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{ |
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struct si1 __iomem *si_regs; |
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u16 __iomem *siram; |
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u16 siram_entry_valid; |
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u16 siram_entry_closed; |
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u16 ucc_num; |
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u8 csel; |
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u16 sixmr; |
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u16 tdm_port; |
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u32 siram_entry_id; |
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u32 mask; |
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int i; |
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si_regs = utdm->si_regs; |
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siram = utdm->siram; |
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ucc_num = ut_info->uf_info.ucc_num; |
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tdm_port = utdm->tdm_port; |
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siram_entry_id = utdm->siram_entry_id; |
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if (utdm->tdm_framer_type == TDM_FRAMER_T1) |
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utdm->num_of_ts = 24; |
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if (utdm->tdm_framer_type == TDM_FRAMER_E1) |
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utdm->num_of_ts = 32; |
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/* set siram table */ |
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csel = (ucc_num < 4) ? ucc_num + 9 : ucc_num - 3; |
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siram_entry_valid = SIR_CSEL(csel) | SIR_BYTE | SIR_CNT(0); |
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siram_entry_closed = SIR_IDLE | SIR_BYTE | SIR_CNT(0); |
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for (i = 0; i < utdm->num_of_ts; i++) { |
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mask = 0x01 << i; |
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if (utdm->tx_ts_mask & mask) |
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iowrite16be(siram_entry_valid, |
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&siram[siram_entry_id * 32 + i]); |
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else |
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iowrite16be(siram_entry_closed, |
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&siram[siram_entry_id * 32 + i]); |
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if (utdm->rx_ts_mask & mask) |
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iowrite16be(siram_entry_valid, |
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&siram[siram_entry_id * 32 + 0x200 + i]); |
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else |
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iowrite16be(siram_entry_closed, |
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&siram[siram_entry_id * 32 + 0x200 + i]); |
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} |
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qe_setbits_be16(&siram[(siram_entry_id * 32) + (utdm->num_of_ts - 1)], |
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SIR_LAST); |
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qe_setbits_be16(&siram[(siram_entry_id * 32) + 0x200 + (utdm->num_of_ts - 1)], |
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SIR_LAST); |
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/* Set SIxMR register */ |
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sixmr = SIMR_SAD(siram_entry_id); |
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sixmr &= ~SIMR_SDM_MASK; |
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if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK) |
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sixmr |= SIMR_SDM_INTERNAL_LOOPBACK; |
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else |
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sixmr |= SIMR_SDM_NORMAL; |
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sixmr |= SIMR_RFSD(ut_info->si_info.simr_rfsd) | |
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SIMR_TFSD(ut_info->si_info.simr_tfsd); |
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if (ut_info->si_info.simr_crt) |
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sixmr |= SIMR_CRT; |
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if (ut_info->si_info.simr_sl) |
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sixmr |= SIMR_SL; |
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if (ut_info->si_info.simr_ce) |
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sixmr |= SIMR_CE; |
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if (ut_info->si_info.simr_fe) |
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sixmr |= SIMR_FE; |
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if (ut_info->si_info.simr_gm) |
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sixmr |= SIMR_GM; |
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switch (tdm_port) { |
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case 0: |
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iowrite16be(sixmr, &si_regs->sixmr1[0]); |
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break; |
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case 1: |
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iowrite16be(sixmr, &si_regs->sixmr1[1]); |
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break; |
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case 2: |
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iowrite16be(sixmr, &si_regs->sixmr1[2]); |
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break; |
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case 3: |
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iowrite16be(sixmr, &si_regs->sixmr1[3]); |
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break; |
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default: |
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pr_err("QE-TDM: can not find tdm sixmr reg\n"); |
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break; |
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} |
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} |
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EXPORT_SYMBOL(ucc_tdm_init);
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