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350 lines
9.3 KiB
350 lines
9.3 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* linux/drivers/acorn/scsi/acornscsi.h |
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* |
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* Copyright (C) 1997 Russell King |
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* |
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* Acorn SCSI driver |
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*/ |
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#ifndef ACORNSCSI_H |
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#define ACORNSCSI_H |
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/* SBIC registers */ |
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#define SBIC_OWNID 0 |
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#define OWNID_FS1 (1<<7) |
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#define OWNID_FS2 (1<<6) |
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#define OWNID_EHP (1<<4) |
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#define OWNID_EAF (1<<3) |
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#define SBIC_CTRL 1 |
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#define CTRL_DMAMODE (1<<7) |
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#define CTRL_DMADBAMODE (1<<6) |
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#define CTRL_DMABURST (1<<5) |
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#define CTRL_DMAPOLLED 0 |
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#define CTRL_HHP (1<<4) |
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#define CTRL_EDI (1<<3) |
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#define CTRL_IDI (1<<2) |
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#define CTRL_HA (1<<1) |
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#define CTRL_HSP (1<<0) |
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#define SBIC_TIMEOUT 2 |
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#define SBIC_TOTSECTS 3 |
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#define SBIC_TOTHEADS 4 |
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#define SBIC_TOTCYLH 5 |
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#define SBIC_TOTCYLL 6 |
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#define SBIC_LOGADDRH 7 |
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#define SBIC_LOGADDRM2 8 |
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#define SBIC_LOGADDRM1 9 |
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#define SBIC_LOGADDRL 10 |
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#define SBIC_SECTORNUM 11 |
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#define SBIC_HEADNUM 12 |
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#define SBIC_CYLH 13 |
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#define SBIC_CYLL 14 |
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#define SBIC_TARGETLUN 15 |
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#define TARGETLUN_TLV (1<<7) |
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#define TARGETLUN_DOK (1<<6) |
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#define SBIC_CMNDPHASE 16 |
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#define SBIC_SYNCHTRANSFER 17 |
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#define SYNCHTRANSFER_OF0 0x00 |
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#define SYNCHTRANSFER_OF1 0x01 |
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#define SYNCHTRANSFER_OF2 0x02 |
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#define SYNCHTRANSFER_OF3 0x03 |
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#define SYNCHTRANSFER_OF4 0x04 |
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#define SYNCHTRANSFER_OF5 0x05 |
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#define SYNCHTRANSFER_OF6 0x06 |
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#define SYNCHTRANSFER_OF7 0x07 |
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#define SYNCHTRANSFER_OF8 0x08 |
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#define SYNCHTRANSFER_OF9 0x09 |
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#define SYNCHTRANSFER_OF10 0x0A |
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#define SYNCHTRANSFER_OF11 0x0B |
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#define SYNCHTRANSFER_OF12 0x0C |
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#define SYNCHTRANSFER_8DBA 0x00 |
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#define SYNCHTRANSFER_2DBA 0x20 |
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#define SYNCHTRANSFER_3DBA 0x30 |
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#define SYNCHTRANSFER_4DBA 0x40 |
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#define SYNCHTRANSFER_5DBA 0x50 |
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#define SYNCHTRANSFER_6DBA 0x60 |
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#define SYNCHTRANSFER_7DBA 0x70 |
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#define SBIC_TRANSCNTH 18 |
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#define SBIC_TRANSCNTM 19 |
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#define SBIC_TRANSCNTL 20 |
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#define SBIC_DESTID 21 |
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#define DESTID_SCC (1<<7) |
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#define DESTID_DPD (1<<6) |
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#define SBIC_SOURCEID 22 |
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#define SOURCEID_ER (1<<7) |
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#define SOURCEID_ES (1<<6) |
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#define SOURCEID_DSP (1<<5) |
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#define SOURCEID_SIV (1<<4) |
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#define SBIC_SSR 23 |
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#define SBIC_CMND 24 |
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#define CMND_RESET 0x00 |
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#define CMND_ABORT 0x01 |
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#define CMND_ASSERTATN 0x02 |
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#define CMND_NEGATEACK 0x03 |
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#define CMND_DISCONNECT 0x04 |
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#define CMND_RESELECT 0x05 |
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#define CMND_SELWITHATN 0x06 |
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#define CMND_SELECT 0x07 |
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#define CMND_SELECTATNTRANSFER 0x08 |
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#define CMND_SELECTTRANSFER 0x09 |
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#define CMND_RESELECTRXDATA 0x0A |
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#define CMND_RESELECTTXDATA 0x0B |
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#define CMND_WAITFORSELRECV 0x0C |
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#define CMND_SENDSTATCMD 0x0D |
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#define CMND_SENDDISCONNECT 0x0E |
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#define CMND_SETIDI 0x0F |
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#define CMND_RECEIVECMD 0x10 |
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#define CMND_RECEIVEDTA 0x11 |
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#define CMND_RECEIVEMSG 0x12 |
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#define CMND_RECEIVEUSP 0x13 |
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#define CMND_SENDCMD 0x14 |
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#define CMND_SENDDATA 0x15 |
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#define CMND_SENDMSG 0x16 |
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#define CMND_SENDUSP 0x17 |
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#define CMND_TRANSLATEADDR 0x18 |
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#define CMND_XFERINFO 0x20 |
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#define CMND_SBT (1<<7) |
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#define SBIC_DATA 25 |
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#define SBIC_ASR 26 |
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#define ASR_INT (1<<7) |
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#define ASR_LCI (1<<6) |
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#define ASR_BSY (1<<5) |
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#define ASR_CIP (1<<4) |
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#define ASR_PE (1<<1) |
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#define ASR_DBR (1<<0) |
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/* DMAC registers */ |
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#define DMAC_INIT 0x00 |
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#define INIT_8BIT (1) |
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#define DMAC_CHANNEL 0x80 |
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#define CHANNEL_0 0x00 |
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#define CHANNEL_1 0x01 |
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#define CHANNEL_2 0x02 |
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#define CHANNEL_3 0x03 |
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#define DMAC_TXCNTLO 0x01 |
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#define DMAC_TXCNTHI 0x81 |
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#define DMAC_TXADRLO 0x02 |
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#define DMAC_TXADRMD 0x82 |
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#define DMAC_TXADRHI 0x03 |
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#define DMAC_DEVCON0 0x04 |
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#define DEVCON0_AKL (1<<7) |
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#define DEVCON0_RQL (1<<6) |
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#define DEVCON0_EXW (1<<5) |
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#define DEVCON0_ROT (1<<4) |
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#define DEVCON0_CMP (1<<3) |
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#define DEVCON0_DDMA (1<<2) |
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#define DEVCON0_AHLD (1<<1) |
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#define DEVCON0_MTM (1<<0) |
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#define DMAC_DEVCON1 0x84 |
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#define DEVCON1_WEV (1<<1) |
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#define DEVCON1_BHLD (1<<0) |
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#define DMAC_MODECON 0x05 |
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#define MODECON_WOED 0x01 |
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#define MODECON_VERIFY 0x00 |
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#define MODECON_READ 0x04 |
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#define MODECON_WRITE 0x08 |
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#define MODECON_AUTOINIT 0x10 |
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#define MODECON_ADDRDIR 0x20 |
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#define MODECON_DEMAND 0x00 |
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#define MODECON_SINGLE 0x40 |
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#define MODECON_BLOCK 0x80 |
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#define MODECON_CASCADE 0xC0 |
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#define DMAC_STATUS 0x85 |
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#define STATUS_TC0 (1<<0) |
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#define STATUS_RQ0 (1<<4) |
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#define DMAC_TEMPLO 0x06 |
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#define DMAC_TEMPHI 0x86 |
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#define DMAC_REQREG 0x07 |
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#define DMAC_MASKREG 0x87 |
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#define MASKREG_M0 0x01 |
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#define MASKREG_M1 0x02 |
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#define MASKREG_M2 0x04 |
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#define MASKREG_M3 0x08 |
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/* miscellaneous internal variables */ |
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#define MASK_ON (MASKREG_M3|MASKREG_M2|MASKREG_M1|MASKREG_M0) |
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#define MASK_OFF (MASKREG_M3|MASKREG_M2|MASKREG_M1) |
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/* |
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* SCSI driver phases |
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*/ |
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typedef enum { |
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PHASE_IDLE, /* we're not planning on doing anything */ |
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PHASE_CONNECTING, /* connecting to a target */ |
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PHASE_CONNECTED, /* connected to a target */ |
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PHASE_MSGOUT, /* message out to device */ |
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PHASE_RECONNECTED, /* reconnected */ |
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PHASE_COMMANDPAUSED, /* command partly sent */ |
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PHASE_COMMAND, /* command all sent */ |
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PHASE_DATAOUT, /* data out to device */ |
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PHASE_DATAIN, /* data in from device */ |
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PHASE_STATUSIN, /* status in from device */ |
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PHASE_MSGIN, /* message in from device */ |
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PHASE_DONE, /* finished */ |
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PHASE_ABORTED, /* aborted */ |
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PHASE_DISCONNECT, /* disconnecting */ |
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} phase_t; |
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/* |
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* After interrupt, what to do now |
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*/ |
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typedef enum { |
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INTR_IDLE, /* not expecting another IRQ */ |
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INTR_NEXT_COMMAND, /* start next command */ |
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INTR_PROCESSING, /* interrupt routine still processing */ |
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} intr_ret_t; |
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/* |
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* DMA direction |
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*/ |
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typedef enum { |
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DMA_OUT, /* DMA from memory to chip */ |
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DMA_IN /* DMA from chip to memory */ |
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} dmadir_t; |
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/* |
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* Synchronous transfer state |
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*/ |
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typedef enum { /* Synchronous transfer state */ |
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SYNC_ASYNCHRONOUS, /* don't negotiate synchronous transfers*/ |
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SYNC_NEGOCIATE, /* start negotiation */ |
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SYNC_SENT_REQUEST, /* sent SDTR message */ |
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SYNC_COMPLETED, /* received SDTR reply */ |
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} syncxfer_t; |
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/* |
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* Command type |
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*/ |
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typedef enum { /* command type */ |
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CMD_READ, /* READ_6, READ_10, READ_12 */ |
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CMD_WRITE, /* WRITE_6, WRITE_10, WRITE_12 */ |
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CMD_MISC, /* Others */ |
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} cmdtype_t; |
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/* |
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* Data phase direction |
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*/ |
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typedef enum { /* Data direction */ |
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DATADIR_IN, /* Data in phase expected */ |
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DATADIR_OUT /* Data out phase expected */ |
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} datadir_t; |
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#include "queue.h" |
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#include "msgqueue.h" |
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#define STATUS_BUFFER_SIZE 32 |
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/* |
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* This is used to dump the previous states of the SBIC |
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*/ |
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struct status_entry { |
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unsigned long when; |
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unsigned char ssr; |
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unsigned char ph; |
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unsigned char irq; |
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unsigned char unused; |
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}; |
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#define ADD_STATUS(_q,_ssr,_ph,_irq) \ |
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({ \ |
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host->status[(_q)][host->status_ptr[(_q)]].when = jiffies; \ |
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host->status[(_q)][host->status_ptr[(_q)]].ssr = (_ssr); \ |
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host->status[(_q)][host->status_ptr[(_q)]].ph = (_ph); \ |
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host->status[(_q)][host->status_ptr[(_q)]].irq = (_irq); \ |
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host->status_ptr[(_q)] = (host->status_ptr[(_q)] + 1) & (STATUS_BUFFER_SIZE - 1); \ |
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}) |
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/* |
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* AcornSCSI host specific data |
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*/ |
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typedef struct acornscsi_hostdata { |
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/* miscellaneous */ |
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struct Scsi_Host *host; /* host */ |
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struct scsi_cmnd *SCpnt; /* currently processing command */ |
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struct scsi_cmnd *origSCpnt; /* original connecting command */ |
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void __iomem *base; /* memc base address */ |
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void __iomem *fast; /* fast ioc base address */ |
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/* driver information */ |
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struct { |
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unsigned int irq; /* interrupt */ |
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phase_t phase; /* current phase */ |
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struct { |
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unsigned char target; /* reconnected target */ |
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unsigned char lun; /* reconnected lun */ |
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unsigned char tag; /* reconnected tag */ |
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} reconnected; |
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struct scsi_pointer SCp; /* current commands data pointer */ |
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MsgQueue_t msgs; |
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unsigned short last_message; /* last message to be sent */ |
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unsigned char disconnectable:1; /* this command can be disconnected */ |
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} scsi; |
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/* statistics information */ |
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struct { |
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unsigned int queues; |
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unsigned int removes; |
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unsigned int fins; |
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unsigned int reads; |
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unsigned int writes; |
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unsigned int miscs; |
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unsigned int disconnects; |
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unsigned int aborts; |
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unsigned int resets; |
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} stats; |
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/* queue handling */ |
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struct { |
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Queue_t issue; /* issue queue */ |
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Queue_t disconnected; /* disconnected command queue */ |
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} queues; |
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/* per-device info */ |
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struct { |
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unsigned char sync_xfer; /* synchronous transfer (SBIC value) */ |
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syncxfer_t sync_state; /* sync xfer negotiation state */ |
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unsigned char disconnect_ok:1; /* device can disconnect */ |
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} device[8]; |
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unsigned long busyluns[64 / sizeof(unsigned long)];/* array of bits indicating LUNs busy */ |
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/* DMA info */ |
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struct { |
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unsigned int free_addr; /* next free address */ |
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unsigned int start_addr; /* start address of current transfer */ |
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dmadir_t direction; /* dma direction */ |
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unsigned int transferred; /* number of bytes transferred */ |
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unsigned int xfer_start; /* scheduled DMA transfer start */ |
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unsigned int xfer_length; /* scheduled DMA transfer length */ |
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char *xfer_ptr; /* pointer to area */ |
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unsigned char xfer_required:1; /* set if we need to transfer something */ |
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unsigned char xfer_setup:1; /* set if DMA is setup */ |
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unsigned char xfer_done:1; /* set if DMA reached end of BH list */ |
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} dma; |
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/* card info */ |
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struct { |
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unsigned char page_reg; /* current setting of page reg */ |
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} card; |
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unsigned char status_ptr[9]; |
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struct status_entry status[9][STATUS_BUFFER_SIZE]; |
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} AS_Host; |
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#endif /* ACORNSCSI_H */
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