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951 lines
26 KiB
951 lines
26 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (C) 2002 Intersil Americas Inc. |
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* Copyright (C) 2003 Herbert Valerio Riedel <[email protected]> |
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* Copyright (C) 2003 Luis R. Rodriguez <[email protected]> |
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*/ |
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|
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#include <linux/hardirq.h> |
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#include <linux/module.h> |
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#include <linux/slab.h> |
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#include <linux/netdevice.h> |
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#include <linux/ethtool.h> |
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#include <linux/pci.h> |
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#include <linux/sched.h> |
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#include <linux/etherdevice.h> |
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#include <linux/delay.h> |
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#include <linux/if_arp.h> |
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#include <asm/io.h> |
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#include "prismcompat.h" |
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#include "isl_38xx.h" |
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#include "isl_ioctl.h" |
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#include "islpci_dev.h" |
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#include "islpci_mgt.h" |
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#include "islpci_eth.h" |
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#include "oid_mgt.h" |
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#define ISL3877_IMAGE_FILE "isl3877" |
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#define ISL3886_IMAGE_FILE "isl3886" |
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#define ISL3890_IMAGE_FILE "isl3890" |
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MODULE_FIRMWARE(ISL3877_IMAGE_FILE); |
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MODULE_FIRMWARE(ISL3886_IMAGE_FILE); |
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MODULE_FIRMWARE(ISL3890_IMAGE_FILE); |
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static int prism54_bring_down(islpci_private *); |
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static int islpci_alloc_memory(islpci_private *); |
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/* Temporary dummy MAC address to use until firmware is loaded. |
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* The idea there is that some tools (such as nameif) may query |
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* the MAC address before the netdev is 'open'. By using a valid |
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* OUI prefix, they can process the netdev properly. |
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* Of course, this is not the final/real MAC address. It doesn't |
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* matter, as you are suppose to be able to change it anytime via |
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* ndev->set_mac_address. Jean II */ |
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static const unsigned char dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 }; |
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static int |
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isl_upload_firmware(islpci_private *priv) |
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{ |
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u32 reg, rc; |
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void __iomem *device_base = priv->device_base; |
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|
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/* clear the RAMBoot and the Reset bit */ |
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reg = readl(device_base + ISL38XX_CTRL_STAT_REG); |
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reg &= ~ISL38XX_CTRL_STAT_RESET; |
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reg &= ~ISL38XX_CTRL_STAT_RAMBOOT; |
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writel(reg, device_base + ISL38XX_CTRL_STAT_REG); |
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wmb(); |
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udelay(ISL38XX_WRITEIO_DELAY); |
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/* set the Reset bit without reading the register ! */ |
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reg |= ISL38XX_CTRL_STAT_RESET; |
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writel(reg, device_base + ISL38XX_CTRL_STAT_REG); |
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wmb(); |
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udelay(ISL38XX_WRITEIO_DELAY); |
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/* clear the Reset bit */ |
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reg &= ~ISL38XX_CTRL_STAT_RESET; |
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writel(reg, device_base + ISL38XX_CTRL_STAT_REG); |
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wmb(); |
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/* wait a while for the device to reboot */ |
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mdelay(50); |
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{ |
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const struct firmware *fw_entry = NULL; |
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long fw_len; |
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const u32 *fw_ptr; |
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rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV); |
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if (rc) { |
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printk(KERN_ERR |
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"%s: request_firmware() failed for '%s'\n", |
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"prism54", priv->firmware); |
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return rc; |
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} |
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/* prepare the Direct Memory Base register */ |
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reg = ISL38XX_DEV_FIRMWARE_ADDRES; |
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fw_ptr = (u32 *) fw_entry->data; |
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fw_len = fw_entry->size; |
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if (fw_len % 4) { |
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printk(KERN_ERR |
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"%s: firmware '%s' size is not multiple of 32bit, aborting!\n", |
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"prism54", priv->firmware); |
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release_firmware(fw_entry); |
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return -EILSEQ; /* Illegal byte sequence */; |
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} |
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while (fw_len > 0) { |
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long _fw_len = |
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(fw_len > |
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ISL38XX_MEMORY_WINDOW_SIZE) ? |
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ISL38XX_MEMORY_WINDOW_SIZE : fw_len; |
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u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN; |
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/* set the card's base address for writing the data */ |
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isl38xx_w32_flush(device_base, reg, |
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ISL38XX_DIR_MEM_BASE_REG); |
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wmb(); /* be paranoid */ |
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/* increment the write address for next iteration */ |
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reg += _fw_len; |
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fw_len -= _fw_len; |
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/* write the data to the Direct Memory Window 32bit-wise */ |
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/* memcpy_toio() doesn't guarantee 32bit writes :-| */ |
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while (_fw_len > 0) { |
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/* use non-swapping writel() */ |
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__raw_writel(*fw_ptr, dev_fw_ptr); |
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fw_ptr++, dev_fw_ptr++; |
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_fw_len -= 4; |
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} |
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/* flush PCI posting */ |
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(void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH); |
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wmb(); /* be paranoid again */ |
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BUG_ON(_fw_len != 0); |
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} |
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BUG_ON(fw_len != 0); |
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/* Firmware version is at offset 40 (also for "newmac") */ |
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printk(KERN_DEBUG "%s: firmware version: %.8s\n", |
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priv->ndev->name, fw_entry->data + 40); |
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release_firmware(fw_entry); |
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} |
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/* now reset the device |
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* clear the Reset & ClkRun bit, set the RAMBoot bit */ |
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reg = readl(device_base + ISL38XX_CTRL_STAT_REG); |
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reg &= ~ISL38XX_CTRL_STAT_CLKRUN; |
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reg &= ~ISL38XX_CTRL_STAT_RESET; |
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reg |= ISL38XX_CTRL_STAT_RAMBOOT; |
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isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG); |
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wmb(); |
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udelay(ISL38XX_WRITEIO_DELAY); |
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/* set the reset bit latches the host override and RAMBoot bits |
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* into the device for operation when the reset bit is reset */ |
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reg |= ISL38XX_CTRL_STAT_RESET; |
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writel(reg, device_base + ISL38XX_CTRL_STAT_REG); |
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/* don't do flush PCI posting here! */ |
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wmb(); |
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udelay(ISL38XX_WRITEIO_DELAY); |
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/* clear the reset bit should start the whole circus */ |
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reg &= ~ISL38XX_CTRL_STAT_RESET; |
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writel(reg, device_base + ISL38XX_CTRL_STAT_REG); |
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/* don't do flush PCI posting here! */ |
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wmb(); |
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udelay(ISL38XX_WRITEIO_DELAY); |
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return 0; |
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} |
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/****************************************************************************** |
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Device Interrupt Handler |
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******************************************************************************/ |
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irqreturn_t |
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islpci_interrupt(int irq, void *config) |
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{ |
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u32 reg; |
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islpci_private *priv = config; |
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struct net_device *ndev = priv->ndev; |
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void __iomem *device = priv->device_base; |
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int powerstate = ISL38XX_PSM_POWERSAVE_STATE; |
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/* lock the interrupt handler */ |
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spin_lock(&priv->slock); |
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/* received an interrupt request on a shared IRQ line |
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* first check whether the device is in sleep mode */ |
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reg = readl(device + ISL38XX_CTRL_STAT_REG); |
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if (reg & ISL38XX_CTRL_STAT_SLEEPMODE) |
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/* device is in sleep mode, IRQ was generated by someone else */ |
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{ |
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#if VERBOSE > SHOW_ERROR_MESSAGES |
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DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n"); |
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#endif |
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spin_unlock(&priv->slock); |
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return IRQ_NONE; |
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} |
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/* check whether there is any source of interrupt on the device */ |
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reg = readl(device + ISL38XX_INT_IDENT_REG); |
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/* also check the contents of the Interrupt Enable Register, because this |
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* will filter out interrupt sources from other devices on the same irq ! */ |
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reg &= readl(device + ISL38XX_INT_EN_REG); |
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reg &= ISL38XX_INT_SOURCES; |
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if (reg != 0) { |
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if (islpci_get_state(priv) != PRV_STATE_SLEEP) |
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powerstate = ISL38XX_PSM_ACTIVE_STATE; |
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/* reset the request bits in the Identification register */ |
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isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG); |
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#if VERBOSE > SHOW_ERROR_MESSAGES |
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DEBUG(SHOW_FUNCTION_CALLS, |
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"IRQ: Identification register 0x%p 0x%x\n", device, reg); |
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#endif |
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/* check for each bit in the register separately */ |
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if (reg & ISL38XX_INT_IDENT_UPDATE) { |
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#if VERBOSE > SHOW_ERROR_MESSAGES |
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/* Queue has been updated */ |
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DEBUG(SHOW_TRACING, "IRQ: Update flag\n"); |
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DEBUG(SHOW_QUEUE_INDEXES, |
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"CB drv Qs: [%i][%i][%i][%i][%i][%i]\n", |
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le32_to_cpu(priv->control_block-> |
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driver_curr_frag[0]), |
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le32_to_cpu(priv->control_block-> |
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driver_curr_frag[1]), |
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le32_to_cpu(priv->control_block-> |
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driver_curr_frag[2]), |
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le32_to_cpu(priv->control_block-> |
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driver_curr_frag[3]), |
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le32_to_cpu(priv->control_block-> |
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driver_curr_frag[4]), |
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le32_to_cpu(priv->control_block-> |
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driver_curr_frag[5]) |
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); |
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DEBUG(SHOW_QUEUE_INDEXES, |
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"CB dev Qs: [%i][%i][%i][%i][%i][%i]\n", |
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le32_to_cpu(priv->control_block-> |
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device_curr_frag[0]), |
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le32_to_cpu(priv->control_block-> |
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device_curr_frag[1]), |
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le32_to_cpu(priv->control_block-> |
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device_curr_frag[2]), |
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le32_to_cpu(priv->control_block-> |
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device_curr_frag[3]), |
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le32_to_cpu(priv->control_block-> |
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device_curr_frag[4]), |
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le32_to_cpu(priv->control_block-> |
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device_curr_frag[5]) |
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); |
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#endif |
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/* cleanup the data low transmit queue */ |
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islpci_eth_cleanup_transmit(priv, priv->control_block); |
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/* device is in active state, update the |
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* powerstate flag if necessary */ |
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powerstate = ISL38XX_PSM_ACTIVE_STATE; |
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/* check all three queues in priority order |
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* call the PIMFOR receive function until the |
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* queue is empty */ |
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if (isl38xx_in_queue(priv->control_block, |
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ISL38XX_CB_RX_MGMTQ) != 0) { |
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#if VERBOSE > SHOW_ERROR_MESSAGES |
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DEBUG(SHOW_TRACING, |
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"Received frame in Management Queue\n"); |
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#endif |
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islpci_mgt_receive(ndev); |
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islpci_mgt_cleanup_transmit(ndev); |
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/* Refill slots in receive queue */ |
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islpci_mgmt_rx_fill(ndev); |
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/* no need to trigger the device, next |
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islpci_mgt_transaction does it */ |
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} |
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while (isl38xx_in_queue(priv->control_block, |
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ISL38XX_CB_RX_DATA_LQ) != 0) { |
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#if VERBOSE > SHOW_ERROR_MESSAGES |
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DEBUG(SHOW_TRACING, |
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"Received frame in Data Low Queue\n"); |
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#endif |
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islpci_eth_receive(priv); |
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} |
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/* check whether the data transmit queues were full */ |
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if (priv->data_low_tx_full) { |
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/* check whether the transmit is not full anymore */ |
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if (ISL38XX_CB_TX_QSIZE - |
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isl38xx_in_queue(priv->control_block, |
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ISL38XX_CB_TX_DATA_LQ) >= |
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ISL38XX_MIN_QTHRESHOLD) { |
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/* nope, the driver is ready for more network frames */ |
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netif_wake_queue(priv->ndev); |
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/* reset the full flag */ |
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priv->data_low_tx_full = 0; |
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} |
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} |
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} |
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if (reg & ISL38XX_INT_IDENT_INIT) { |
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/* Device has been initialized */ |
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#if VERBOSE > SHOW_ERROR_MESSAGES |
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DEBUG(SHOW_TRACING, |
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"IRQ: Init flag, device initialized\n"); |
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#endif |
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wake_up(&priv->reset_done); |
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} |
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if (reg & ISL38XX_INT_IDENT_SLEEP) { |
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/* Device intends to move to powersave state */ |
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#if VERBOSE > SHOW_ERROR_MESSAGES |
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DEBUG(SHOW_TRACING, "IRQ: Sleep flag\n"); |
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#endif |
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isl38xx_handle_sleep_request(priv->control_block, |
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&powerstate, |
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priv->device_base); |
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} |
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if (reg & ISL38XX_INT_IDENT_WAKEUP) { |
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/* Device has been woken up to active state */ |
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#if VERBOSE > SHOW_ERROR_MESSAGES |
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DEBUG(SHOW_TRACING, "IRQ: Wakeup flag\n"); |
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#endif |
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isl38xx_handle_wakeup(priv->control_block, |
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&powerstate, priv->device_base); |
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} |
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} else { |
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#if VERBOSE > SHOW_ERROR_MESSAGES |
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DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n"); |
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#endif |
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spin_unlock(&priv->slock); |
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return IRQ_NONE; |
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} |
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/* sleep -> ready */ |
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if (islpci_get_state(priv) == PRV_STATE_SLEEP |
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&& powerstate == ISL38XX_PSM_ACTIVE_STATE) |
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islpci_set_state(priv, PRV_STATE_READY); |
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/* !sleep -> sleep */ |
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if (islpci_get_state(priv) != PRV_STATE_SLEEP |
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&& powerstate == ISL38XX_PSM_POWERSAVE_STATE) |
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islpci_set_state(priv, PRV_STATE_SLEEP); |
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/* unlock the interrupt handler */ |
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spin_unlock(&priv->slock); |
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return IRQ_HANDLED; |
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} |
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/****************************************************************************** |
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Network Interface Control & Statistical functions |
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******************************************************************************/ |
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static int |
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islpci_open(struct net_device *ndev) |
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{ |
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u32 rc; |
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islpci_private *priv = netdev_priv(ndev); |
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/* reset data structures, upload firmware and reset device */ |
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rc = islpci_reset(priv,1); |
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if (rc) { |
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prism54_bring_down(priv); |
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return rc; /* Returns informative message */ |
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} |
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netif_start_queue(ndev); |
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/* Turn off carrier if in STA or Ad-hoc mode. It will be turned on |
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* once the firmware receives a trap of being associated |
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* (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we |
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* should just leave the carrier on as its expected the firmware |
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* won't send us a trigger. */ |
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if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC) |
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netif_carrier_off(ndev); |
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else |
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netif_carrier_on(ndev); |
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return 0; |
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} |
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static int |
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islpci_close(struct net_device *ndev) |
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{ |
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islpci_private *priv = netdev_priv(ndev); |
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printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name); |
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netif_stop_queue(ndev); |
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return prism54_bring_down(priv); |
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} |
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static int |
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prism54_bring_down(islpci_private *priv) |
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{ |
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void __iomem *device_base = priv->device_base; |
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u32 reg; |
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/* we are going to shutdown the device */ |
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islpci_set_state(priv, PRV_STATE_PREBOOT); |
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/* disable all device interrupts in case they weren't */ |
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isl38xx_disable_interrupts(priv->device_base); |
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/* For safety reasons, we may want to ensure that no DMA transfer is |
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* currently in progress by emptying the TX and RX queues. */ |
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/* wait until interrupts have finished executing on other CPUs */ |
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synchronize_irq(priv->pdev->irq); |
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reg = readl(device_base + ISL38XX_CTRL_STAT_REG); |
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reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT); |
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writel(reg, device_base + ISL38XX_CTRL_STAT_REG); |
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wmb(); |
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udelay(ISL38XX_WRITEIO_DELAY); |
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reg |= ISL38XX_CTRL_STAT_RESET; |
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writel(reg, device_base + ISL38XX_CTRL_STAT_REG); |
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wmb(); |
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udelay(ISL38XX_WRITEIO_DELAY); |
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/* clear the Reset bit */ |
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reg &= ~ISL38XX_CTRL_STAT_RESET; |
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writel(reg, device_base + ISL38XX_CTRL_STAT_REG); |
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wmb(); |
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/* wait a while for the device to reset */ |
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schedule_timeout_uninterruptible(msecs_to_jiffies(50)); |
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return 0; |
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} |
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static int |
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islpci_upload_fw(islpci_private *priv) |
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{ |
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islpci_state_t old_state; |
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u32 rc; |
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old_state = islpci_set_state(priv, PRV_STATE_BOOT); |
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printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name); |
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rc = isl_upload_firmware(priv); |
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if (rc) { |
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/* error uploading the firmware */ |
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printk(KERN_ERR "%s: could not upload firmware ('%s')\n", |
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priv->ndev->name, priv->firmware); |
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islpci_set_state(priv, old_state); |
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return rc; |
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} |
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printk(KERN_DEBUG "%s: firmware upload complete\n", |
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priv->ndev->name); |
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islpci_set_state(priv, PRV_STATE_POSTBOOT); |
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return 0; |
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} |
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static int |
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islpci_reset_if(islpci_private *priv) |
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{ |
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long remaining; |
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int result = -ETIME; |
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int count; |
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|
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DEFINE_WAIT(wait); |
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prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE); |
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|
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/* now the last step is to reset the interface */ |
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isl38xx_interface_reset(priv->device_base, priv->device_host_address); |
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islpci_set_state(priv, PRV_STATE_PREINIT); |
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for(count = 0; count < 2 && result; count++) { |
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/* The software reset acknowledge needs about 220 msec here. |
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* Be conservative and wait for up to one second. */ |
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|
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remaining = schedule_timeout_uninterruptible(HZ); |
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|
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if(remaining > 0) { |
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result = 0; |
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break; |
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} |
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/* If we're here it's because our IRQ hasn't yet gone through. |
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* Retry a bit more... |
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*/ |
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printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n", |
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priv->ndev->name); |
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} |
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finish_wait(&priv->reset_done, &wait); |
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if (result) { |
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printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name); |
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return result; |
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} |
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islpci_set_state(priv, PRV_STATE_INIT); |
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|
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/* Now that the device is 100% up, let's allow |
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* for the other interrupts -- |
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* NOTE: this is not *yet* true since we've only allowed the |
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* INIT interrupt on the IRQ line. We can perhaps poll |
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* the IRQ line until we know for sure the reset went through */ |
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isl38xx_enable_common_interrupts(priv->device_base); |
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|
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down_write(&priv->mib_sem); |
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result = mgt_commit(priv); |
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if (result) { |
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printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name); |
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up_write(&priv->mib_sem); |
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return result; |
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} |
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up_write(&priv->mib_sem); |
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islpci_set_state(priv, PRV_STATE_READY); |
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printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name); |
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return 0; |
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} |
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|
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int |
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islpci_reset(islpci_private *priv, int reload_firmware) |
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{ |
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isl38xx_control_block *cb = /* volatile not needed */ |
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(isl38xx_control_block *) priv->control_block; |
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unsigned counter; |
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int rc; |
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|
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if (reload_firmware) |
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islpci_set_state(priv, PRV_STATE_PREBOOT); |
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else |
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islpci_set_state(priv, PRV_STATE_POSTBOOT); |
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|
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printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name); |
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|
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/* disable all device interrupts in case they weren't */ |
|
isl38xx_disable_interrupts(priv->device_base); |
|
|
|
/* flush all management queues */ |
|
priv->index_mgmt_tx = 0; |
|
priv->index_mgmt_rx = 0; |
|
|
|
/* clear the indexes in the frame pointer */ |
|
for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) { |
|
cb->driver_curr_frag[counter] = cpu_to_le32(0); |
|
cb->device_curr_frag[counter] = cpu_to_le32(0); |
|
} |
|
|
|
/* reset the mgmt receive queue */ |
|
for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) { |
|
isl38xx_fragment *frag = &cb->rx_data_mgmt[counter]; |
|
frag->size = cpu_to_le16(MGMT_FRAME_SIZE); |
|
frag->flags = 0; |
|
frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr); |
|
} |
|
|
|
for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) { |
|
cb->rx_data_low[counter].address = |
|
cpu_to_le32((u32) priv->pci_map_rx_address[counter]); |
|
} |
|
|
|
/* since the receive queues are filled with empty fragments, now we can |
|
* set the corresponding indexes in the Control Block */ |
|
priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] = |
|
cpu_to_le32(ISL38XX_CB_RX_QSIZE); |
|
priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] = |
|
cpu_to_le32(ISL38XX_CB_MGMT_QSIZE); |
|
|
|
/* reset the remaining real index registers and full flags */ |
|
priv->free_data_rx = 0; |
|
priv->free_data_tx = 0; |
|
priv->data_low_tx_full = 0; |
|
|
|
if (reload_firmware) { /* Should we load the firmware ? */ |
|
/* now that the data structures are cleaned up, upload |
|
* firmware and reset interface */ |
|
rc = islpci_upload_fw(priv); |
|
if (rc) { |
|
printk(KERN_ERR "%s: islpci_reset: failure\n", |
|
priv->ndev->name); |
|
return rc; |
|
} |
|
} |
|
|
|
/* finally reset interface */ |
|
rc = islpci_reset_if(priv); |
|
if (rc) |
|
printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n"); |
|
return rc; |
|
} |
|
|
|
/****************************************************************************** |
|
Network device configuration functions |
|
******************************************************************************/ |
|
static int |
|
islpci_alloc_memory(islpci_private *priv) |
|
{ |
|
int counter; |
|
|
|
#if VERBOSE > SHOW_ERROR_MESSAGES |
|
printk(KERN_DEBUG "islpci_alloc_memory\n"); |
|
#endif |
|
|
|
/* remap the PCI device base address to accessible */ |
|
if (!(priv->device_base = |
|
ioremap(pci_resource_start(priv->pdev, 0), |
|
ISL38XX_PCI_MEM_SIZE))) { |
|
/* error in remapping the PCI device memory address range */ |
|
printk(KERN_ERR "PCI memory remapping failed\n"); |
|
return -1; |
|
} |
|
|
|
/* memory layout for consistent DMA region: |
|
* |
|
* Area 1: Control Block for the device interface |
|
* Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that |
|
* the number of supported stations in the AP determines the minimal |
|
* size of the buffer ! |
|
*/ |
|
|
|
/* perform the allocation */ |
|
priv->driver_mem_address = dma_alloc_coherent(&priv->pdev->dev, |
|
HOST_MEM_BLOCK, |
|
&priv->device_host_address, |
|
GFP_KERNEL); |
|
|
|
if (!priv->driver_mem_address) { |
|
/* error allocating the block of PCI memory */ |
|
printk(KERN_ERR "%s: could not allocate DMA memory, aborting!", |
|
"prism54"); |
|
return -1; |
|
} |
|
|
|
/* assign the Control Block to the first address of the allocated area */ |
|
priv->control_block = |
|
(isl38xx_control_block *) priv->driver_mem_address; |
|
|
|
/* set the Power Save Buffer pointer directly behind the CB */ |
|
priv->device_psm_buffer = |
|
priv->device_host_address + CONTROL_BLOCK_SIZE; |
|
|
|
/* make sure all buffer pointers are initialized */ |
|
for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) { |
|
priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0); |
|
priv->control_block->device_curr_frag[counter] = cpu_to_le32(0); |
|
} |
|
|
|
priv->index_mgmt_rx = 0; |
|
memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx)); |
|
memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx)); |
|
|
|
/* allocate rx queue for management frames */ |
|
if (islpci_mgmt_rx_fill(priv->ndev) < 0) |
|
goto out_free; |
|
|
|
/* now get the data rx skb's */ |
|
memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx)); |
|
memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address)); |
|
|
|
for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) { |
|
struct sk_buff *skb; |
|
|
|
/* allocate an sk_buff for received data frames storage |
|
* each frame on receive size consists of 1 fragment |
|
* include any required allignment operations */ |
|
if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) { |
|
/* error allocating an sk_buff structure elements */ |
|
printk(KERN_ERR "Error allocating skb.\n"); |
|
skb = NULL; |
|
goto out_free; |
|
} |
|
skb_reserve(skb, (4 - (long) skb->data) & 0x03); |
|
/* add the new allocated sk_buff to the buffer array */ |
|
priv->data_low_rx[counter] = skb; |
|
|
|
/* map the allocated skb data area to pci */ |
|
priv->pci_map_rx_address[counter] = |
|
dma_map_single(&priv->pdev->dev, (void *)skb->data, |
|
MAX_FRAGMENT_SIZE_RX + 2, DMA_FROM_DEVICE); |
|
if (dma_mapping_error(&priv->pdev->dev, priv->pci_map_rx_address[counter])) { |
|
priv->pci_map_rx_address[counter] = 0; |
|
/* error mapping the buffer to device |
|
accessible memory address */ |
|
printk(KERN_ERR "failed to map skb DMA'able\n"); |
|
goto out_free; |
|
} |
|
} |
|
|
|
prism54_acl_init(&priv->acl); |
|
prism54_wpa_bss_ie_init(priv); |
|
if (mgt_init(priv)) |
|
goto out_free; |
|
|
|
return 0; |
|
out_free: |
|
islpci_free_memory(priv); |
|
return -1; |
|
} |
|
|
|
int |
|
islpci_free_memory(islpci_private *priv) |
|
{ |
|
int counter; |
|
|
|
if (priv->device_base) |
|
iounmap(priv->device_base); |
|
priv->device_base = NULL; |
|
|
|
/* free consistent DMA area... */ |
|
if (priv->driver_mem_address) |
|
dma_free_coherent(&priv->pdev->dev, HOST_MEM_BLOCK, |
|
priv->driver_mem_address, |
|
priv->device_host_address); |
|
|
|
/* clear some dangling pointers */ |
|
priv->driver_mem_address = NULL; |
|
priv->device_host_address = 0; |
|
priv->device_psm_buffer = 0; |
|
priv->control_block = NULL; |
|
|
|
/* clean up mgmt rx buffers */ |
|
for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) { |
|
struct islpci_membuf *buf = &priv->mgmt_rx[counter]; |
|
if (buf->pci_addr) |
|
dma_unmap_single(&priv->pdev->dev, buf->pci_addr, |
|
buf->size, DMA_FROM_DEVICE); |
|
buf->pci_addr = 0; |
|
kfree(buf->mem); |
|
buf->size = 0; |
|
buf->mem = NULL; |
|
} |
|
|
|
/* clean up data rx buffers */ |
|
for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) { |
|
if (priv->pci_map_rx_address[counter]) |
|
dma_unmap_single(&priv->pdev->dev, |
|
priv->pci_map_rx_address[counter], |
|
MAX_FRAGMENT_SIZE_RX + 2, |
|
DMA_FROM_DEVICE); |
|
priv->pci_map_rx_address[counter] = 0; |
|
|
|
if (priv->data_low_rx[counter]) |
|
dev_kfree_skb(priv->data_low_rx[counter]); |
|
priv->data_low_rx[counter] = NULL; |
|
} |
|
|
|
/* Free the access control list and the WPA list */ |
|
prism54_acl_clean(&priv->acl); |
|
prism54_wpa_bss_ie_clean(priv); |
|
mgt_clean(priv); |
|
|
|
return 0; |
|
} |
|
|
|
#if 0 |
|
static void |
|
islpci_set_multicast_list(struct net_device *dev) |
|
{ |
|
/* put device into promisc mode and let network layer handle it */ |
|
} |
|
#endif |
|
|
|
static void islpci_ethtool_get_drvinfo(struct net_device *dev, |
|
struct ethtool_drvinfo *info) |
|
{ |
|
strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); |
|
strlcpy(info->version, DRV_VERSION, sizeof(info->version)); |
|
} |
|
|
|
static const struct ethtool_ops islpci_ethtool_ops = { |
|
.get_drvinfo = islpci_ethtool_get_drvinfo, |
|
}; |
|
|
|
static const struct net_device_ops islpci_netdev_ops = { |
|
.ndo_open = islpci_open, |
|
.ndo_stop = islpci_close, |
|
.ndo_start_xmit = islpci_eth_transmit, |
|
.ndo_tx_timeout = islpci_eth_tx_timeout, |
|
.ndo_set_mac_address = prism54_set_mac_address, |
|
.ndo_validate_addr = eth_validate_addr, |
|
}; |
|
|
|
static struct device_type wlan_type = { |
|
.name = "wlan", |
|
}; |
|
|
|
struct net_device * |
|
islpci_setup(struct pci_dev *pdev) |
|
{ |
|
islpci_private *priv; |
|
struct net_device *ndev = alloc_etherdev(sizeof (islpci_private)); |
|
|
|
if (!ndev) |
|
return ndev; |
|
|
|
pci_set_drvdata(pdev, ndev); |
|
SET_NETDEV_DEV(ndev, &pdev->dev); |
|
SET_NETDEV_DEVTYPE(ndev, &wlan_type); |
|
|
|
/* setup the structure members */ |
|
ndev->base_addr = pci_resource_start(pdev, 0); |
|
ndev->irq = pdev->irq; |
|
|
|
/* initialize the function pointers */ |
|
ndev->netdev_ops = &islpci_netdev_ops; |
|
ndev->wireless_handlers = &prism54_handler_def; |
|
ndev->ethtool_ops = &islpci_ethtool_ops; |
|
|
|
/* ndev->set_multicast_list = &islpci_set_multicast_list; */ |
|
ndev->addr_len = ETH_ALEN; |
|
/* Get a non-zero dummy MAC address for nameif. Jean II */ |
|
memcpy(ndev->dev_addr, dummy_mac, ETH_ALEN); |
|
|
|
ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT; |
|
|
|
/* allocate a private device structure to the network device */ |
|
priv = netdev_priv(ndev); |
|
priv->ndev = ndev; |
|
priv->pdev = pdev; |
|
priv->monitor_type = ARPHRD_IEEE80211; |
|
priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ? |
|
priv->monitor_type : ARPHRD_ETHER; |
|
|
|
/* Add pointers to enable iwspy support. */ |
|
priv->wireless_data.spy_data = &priv->spy_data; |
|
ndev->wireless_data = &priv->wireless_data; |
|
|
|
/* save the start and end address of the PCI memory area */ |
|
ndev->mem_start = (unsigned long) priv->device_base; |
|
ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE; |
|
|
|
#if VERBOSE > SHOW_ERROR_MESSAGES |
|
DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base); |
|
#endif |
|
|
|
init_waitqueue_head(&priv->reset_done); |
|
|
|
/* init the queue read locks, process wait counter */ |
|
mutex_init(&priv->mgmt_lock); |
|
priv->mgmt_received = NULL; |
|
init_waitqueue_head(&priv->mgmt_wqueue); |
|
mutex_init(&priv->stats_lock); |
|
spin_lock_init(&priv->slock); |
|
|
|
/* init state machine with off#1 state */ |
|
priv->state = PRV_STATE_OFF; |
|
priv->state_off = 1; |
|
|
|
/* initialize workqueue's */ |
|
INIT_WORK(&priv->stats_work, prism54_update_stats); |
|
priv->stats_timestamp = 0; |
|
|
|
INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake); |
|
priv->reset_task_pending = 0; |
|
|
|
/* allocate various memory areas */ |
|
if (islpci_alloc_memory(priv)) |
|
goto do_free_netdev; |
|
|
|
/* select the firmware file depending on the device id */ |
|
switch (pdev->device) { |
|
case 0x3877: |
|
strcpy(priv->firmware, ISL3877_IMAGE_FILE); |
|
break; |
|
|
|
case 0x3886: |
|
strcpy(priv->firmware, ISL3886_IMAGE_FILE); |
|
break; |
|
|
|
default: |
|
strcpy(priv->firmware, ISL3890_IMAGE_FILE); |
|
break; |
|
} |
|
|
|
if (register_netdev(ndev)) { |
|
DEBUG(SHOW_ERROR_MESSAGES, |
|
"ERROR: register_netdev() failed\n"); |
|
goto do_islpci_free_memory; |
|
} |
|
|
|
return ndev; |
|
|
|
do_islpci_free_memory: |
|
islpci_free_memory(priv); |
|
do_free_netdev: |
|
free_netdev(ndev); |
|
priv = NULL; |
|
return NULL; |
|
} |
|
|
|
islpci_state_t |
|
islpci_set_state(islpci_private *priv, islpci_state_t new_state) |
|
{ |
|
islpci_state_t old_state; |
|
|
|
/* lock */ |
|
old_state = priv->state; |
|
|
|
/* this means either a race condition or some serious error in |
|
* the driver code */ |
|
switch (new_state) { |
|
case PRV_STATE_OFF: |
|
priv->state_off++; |
|
fallthrough; |
|
default: |
|
priv->state = new_state; |
|
break; |
|
|
|
case PRV_STATE_PREBOOT: |
|
/* there are actually many off-states, enumerated by |
|
* state_off */ |
|
if (old_state == PRV_STATE_OFF) |
|
priv->state_off--; |
|
|
|
/* only if hw_unavailable is zero now it means we either |
|
* were in off#1 state, or came here from |
|
* somewhere else */ |
|
if (!priv->state_off) |
|
priv->state = new_state; |
|
break; |
|
} |
|
#if 0 |
|
printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n", |
|
priv->ndev->name, old_state, new_state, priv->state_off); |
|
#endif |
|
|
|
/* invariants */ |
|
BUG_ON(priv->state_off < 0); |
|
BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF)); |
|
BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF)); |
|
|
|
/* unlock */ |
|
return old_state; |
|
}
|
|
|