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362 lines
11 KiB
362 lines
11 KiB
/* orinoco_plx.c |
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* |
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* Driver for Prism II devices which would usually be driven by orinoco_cs, |
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* but are connected to the PCI bus by a PLX9052. |
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* |
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* Current maintainers are: |
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* Pavel Roskin <proski AT gnu.org> |
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* and David Gibson <hermes AT gibson.dropbear.id.au> |
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* |
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* (C) Copyright David Gibson, IBM Corp. 2001-2003. |
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* Copyright (C) 2001 Daniel Barlow |
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* |
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* The contents of this file are subject to the Mozilla Public License |
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* Version 1.1 (the "License"); you may not use this file except in |
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* compliance with the License. You may obtain a copy of the License |
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* at http://www.mozilla.org/MPL/ |
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* |
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* Software distributed under the License is distributed on an "AS IS" |
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* basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See |
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* the License for the specific language governing rights and |
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* limitations under the License. |
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* |
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* Alternatively, the contents of this file may be used under the |
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* terms of the GNU General Public License version 2 (the "GPL"), in |
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* which case the provisions of the GPL are applicable instead of the |
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* above. If you wish to allow the use of your version of this file |
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* only under the terms of the GPL and not to allow others to use your |
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* version of this file under the MPL, indicate your decision by |
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* deleting the provisions above and replace them with the notice and |
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* other provisions required by the GPL. If you do not delete the |
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* provisions above, a recipient may use your version of this file |
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* under either the MPL or the GPL. |
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* |
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* Here's the general details on how the PLX9052 adapter works: |
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* |
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* - Two PCI I/O address spaces, one 0x80 long which contains the |
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* PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA |
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* slot I/O address space. |
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* |
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* - One PCI memory address space, mapped to the PCMCIA attribute space |
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* (containing the CIS). |
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* |
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* Using the later, you can read through the CIS data to make sure the |
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* card is compatible with the driver. Keep in mind that the PCMCIA |
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* spec specifies the CIS as the lower 8 bits of each word read from |
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* the CIS, so to read the bytes of the CIS, read every other byte |
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* (0,2,4,...). Passing that test, you need to enable the I/O address |
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* space on the PCMCIA card via the PCMCIA COR register. This is the |
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* first byte following the CIS. In my case (which may not have any |
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* relation to what's on the PRISM2 cards), COR was at offset 0x800 |
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* within the PCI memory space. Write 0x41 to the COR register to |
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* enable I/O mode and to select level triggered interrupts. To |
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* confirm you actually succeeded, read the COR register back and make |
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* sure it actually got set to 0x41, in case you have an unexpected |
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* card inserted. |
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* |
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* Following that, you can treat the second PCI I/O address space (the |
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* one that's not 0x80 in length) as the PCMCIA I/O space. |
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* |
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* Note that in the Eumitcom's source for their drivers, they register |
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* the interrupt as edge triggered when registering it with the |
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* Windows kernel. I don't recall how to register edge triggered on |
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* Linux (if it can be done at all). But in some experimentation, I |
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* don't see much operational difference between using either |
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* interrupt mode. Don't mess with the interrupt mode in the COR |
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* register though, as the PLX9052 wants level triggers with the way |
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* the serial EEPROM configures it on the WL11000. |
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* |
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* There's some other little quirks related to timing that I bumped |
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* into, but I don't recall right now. Also, there's two variants of |
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* the WL11000 I've seen, revision A1 and T2. These seem to differ |
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* slightly in the timings configured in the wait-state generator in |
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* the PLX9052. There have also been some comments from Eumitcom that |
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* cards shouldn't be hot swapped, apparently due to risk of cooking |
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* the PLX9052. I'm unsure why they believe this, as I can't see |
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* anything in the design that would really cause a problem, except |
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* for crashing drivers not written to expect it. And having developed |
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* drivers for the WL11000, I'd say it's quite tricky to write code |
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* that will successfully deal with a hot unplug. Very odd things |
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* happen on the I/O side of things. But anyway, be warned. Despite |
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* that, I've hot-swapped a number of times during debugging and |
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* driver development for various reasons (stuck WAIT# line after the |
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* radio card's firmware locks up). |
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*/ |
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#define DRIVER_NAME "orinoco_plx" |
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#define PFX DRIVER_NAME ": " |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/init.h> |
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#include <linux/delay.h> |
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#include <linux/pci.h> |
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#include <pcmcia/cisreg.h> |
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#include "orinoco.h" |
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#include "orinoco_pci.h" |
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#define COR_OFFSET (0x3e0) /* COR attribute offset of Prism2 PC card */ |
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#define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */ |
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#define COR_RESET (0x80) /* reset bit in the COR register */ |
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#define PLX_RESET_TIME (500) /* milliseconds */ |
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#define PLX_INTCSR 0x4c /* Interrupt Control & Status Register */ |
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#define PLX_INTCSR_INTEN (1 << 6) /* Interrupt Enable bit */ |
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/* |
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* Do a soft reset of the card using the Configuration Option Register |
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*/ |
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static int orinoco_plx_cor_reset(struct orinoco_private *priv) |
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{ |
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struct hermes *hw = &priv->hw; |
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struct orinoco_pci_card *card = priv->card; |
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unsigned long timeout; |
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u16 reg; |
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iowrite8(COR_VALUE | COR_RESET, card->attr_io + COR_OFFSET); |
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mdelay(1); |
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iowrite8(COR_VALUE, card->attr_io + COR_OFFSET); |
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mdelay(1); |
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/* Just in case, wait more until the card is no longer busy */ |
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timeout = jiffies + msecs_to_jiffies(PLX_RESET_TIME); |
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reg = hermes_read_regn(hw, CMD); |
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while (time_before(jiffies, timeout) && (reg & HERMES_CMD_BUSY)) { |
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mdelay(1); |
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reg = hermes_read_regn(hw, CMD); |
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} |
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/* Still busy? */ |
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if (reg & HERMES_CMD_BUSY) { |
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printk(KERN_ERR PFX "Busy timeout\n"); |
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return -ETIMEDOUT; |
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} |
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return 0; |
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} |
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static int orinoco_plx_hw_init(struct orinoco_pci_card *card) |
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{ |
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int i; |
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u32 csr_reg; |
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static const u8 cis_magic[] = { |
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0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67 |
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}; |
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printk(KERN_DEBUG PFX "CIS: "); |
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for (i = 0; i < 16; i++) |
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printk("%02X:", ioread8(card->attr_io + (i << 1))); |
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printk("\n"); |
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/* Verify whether a supported PC card is present */ |
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/* FIXME: we probably need to be smarted about this */ |
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for (i = 0; i < sizeof(cis_magic); i++) { |
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if (cis_magic[i] != ioread8(card->attr_io + (i << 1))) { |
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printk(KERN_ERR PFX "The CIS value of Prism2 PC " |
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"card is unexpected\n"); |
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return -ENODEV; |
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} |
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} |
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/* bjoern: We need to tell the card to enable interrupts, in |
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case the serial eprom didn't do this already. See the |
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PLX9052 data book, p8-1 and 8-24 for reference. */ |
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csr_reg = ioread32(card->bridge_io + PLX_INTCSR); |
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if (!(csr_reg & PLX_INTCSR_INTEN)) { |
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csr_reg |= PLX_INTCSR_INTEN; |
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iowrite32(csr_reg, card->bridge_io + PLX_INTCSR); |
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csr_reg = ioread32(card->bridge_io + PLX_INTCSR); |
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if (!(csr_reg & PLX_INTCSR_INTEN)) { |
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printk(KERN_ERR PFX "Cannot enable interrupts\n"); |
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return -EIO; |
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} |
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} |
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return 0; |
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} |
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static int orinoco_plx_init_one(struct pci_dev *pdev, |
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const struct pci_device_id *ent) |
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{ |
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int err; |
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struct orinoco_private *priv; |
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struct orinoco_pci_card *card; |
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void __iomem *hermes_io, *attr_io, *bridge_io; |
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err = pci_enable_device(pdev); |
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if (err) { |
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printk(KERN_ERR PFX "Cannot enable PCI device\n"); |
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return err; |
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} |
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err = pci_request_regions(pdev, DRIVER_NAME); |
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if (err) { |
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printk(KERN_ERR PFX "Cannot obtain PCI resources\n"); |
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goto fail_resources; |
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} |
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bridge_io = pci_iomap(pdev, 1, 0); |
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if (!bridge_io) { |
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printk(KERN_ERR PFX "Cannot map bridge registers\n"); |
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err = -EIO; |
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goto fail_map_bridge; |
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} |
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attr_io = pci_iomap(pdev, 2, 0); |
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if (!attr_io) { |
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printk(KERN_ERR PFX "Cannot map PCMCIA attributes\n"); |
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err = -EIO; |
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goto fail_map_attr; |
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} |
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hermes_io = pci_iomap(pdev, 3, 0); |
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if (!hermes_io) { |
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printk(KERN_ERR PFX "Cannot map chipset registers\n"); |
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err = -EIO; |
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goto fail_map_hermes; |
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} |
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/* Allocate network device */ |
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priv = alloc_orinocodev(sizeof(*card), &pdev->dev, |
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orinoco_plx_cor_reset, NULL); |
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if (!priv) { |
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printk(KERN_ERR PFX "Cannot allocate network device\n"); |
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err = -ENOMEM; |
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goto fail_alloc; |
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} |
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card = priv->card; |
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card->bridge_io = bridge_io; |
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card->attr_io = attr_io; |
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hermes_struct_init(&priv->hw, hermes_io, HERMES_16BIT_REGSPACING); |
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err = request_irq(pdev->irq, orinoco_interrupt, IRQF_SHARED, |
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DRIVER_NAME, priv); |
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if (err) { |
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printk(KERN_ERR PFX "Cannot allocate IRQ %d\n", pdev->irq); |
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err = -EBUSY; |
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goto fail_irq; |
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} |
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err = orinoco_plx_hw_init(card); |
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if (err) { |
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printk(KERN_ERR PFX "Hardware initialization failed\n"); |
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goto fail; |
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} |
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err = orinoco_plx_cor_reset(priv); |
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if (err) { |
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printk(KERN_ERR PFX "Initial reset failed\n"); |
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goto fail; |
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} |
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err = orinoco_init(priv); |
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if (err) { |
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printk(KERN_ERR PFX "orinoco_init() failed\n"); |
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goto fail; |
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} |
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err = orinoco_if_add(priv, 0, 0, NULL); |
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if (err) { |
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printk(KERN_ERR PFX "orinoco_if_add() failed\n"); |
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goto fail_wiphy; |
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} |
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pci_set_drvdata(pdev, priv); |
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return 0; |
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fail_wiphy: |
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wiphy_unregister(priv_to_wiphy(priv)); |
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fail: |
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free_irq(pdev->irq, priv); |
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fail_irq: |
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free_orinocodev(priv); |
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fail_alloc: |
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pci_iounmap(pdev, hermes_io); |
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fail_map_hermes: |
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pci_iounmap(pdev, attr_io); |
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fail_map_attr: |
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pci_iounmap(pdev, bridge_io); |
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fail_map_bridge: |
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pci_release_regions(pdev); |
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fail_resources: |
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pci_disable_device(pdev); |
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return err; |
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} |
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static void orinoco_plx_remove_one(struct pci_dev *pdev) |
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{ |
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struct orinoco_private *priv = pci_get_drvdata(pdev); |
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struct orinoco_pci_card *card = priv->card; |
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orinoco_if_del(priv); |
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wiphy_unregister(priv_to_wiphy(priv)); |
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free_irq(pdev->irq, priv); |
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free_orinocodev(priv); |
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pci_iounmap(pdev, priv->hw.iobase); |
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pci_iounmap(pdev, card->attr_io); |
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pci_iounmap(pdev, card->bridge_io); |
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pci_release_regions(pdev); |
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pci_disable_device(pdev); |
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} |
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static const struct pci_device_id orinoco_plx_id_table[] = { |
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{0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */ |
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{0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */ |
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{0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */ |
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{0x1638, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* SMC EZConnect SMC2602W, |
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Eumitcom PCI WL11000, |
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Addtron AWA-100 */ |
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{0x16ab, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* Global Sun Tech GL24110P */ |
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{0x16ab, 0x1101, PCI_ANY_ID, PCI_ANY_ID,}, /* Reported working, but unknown */ |
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{0x16ab, 0x1102, PCI_ANY_ID, PCI_ANY_ID,}, /* Linksys WDT11 */ |
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{0x16ec, 0x3685, PCI_ANY_ID, PCI_ANY_ID,}, /* USR 2415 */ |
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{0xec80, 0xec00, PCI_ANY_ID, PCI_ANY_ID,}, /* Belkin F5D6000 tested by |
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Brendan W. McAdams <rit AT jacked-in.org> */ |
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{0x10b7, 0x7770, PCI_ANY_ID, PCI_ANY_ID,}, /* 3Com AirConnect PCI tested by |
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Damien Persohn <damien AT persohn.net> */ |
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{0,}, |
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}; |
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MODULE_DEVICE_TABLE(pci, orinoco_plx_id_table); |
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static struct pci_driver orinoco_plx_driver = { |
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.name = DRIVER_NAME, |
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.id_table = orinoco_plx_id_table, |
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.probe = orinoco_plx_init_one, |
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.remove = orinoco_plx_remove_one, |
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.driver.pm = &orinoco_pci_pm_ops, |
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}; |
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static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION |
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" (Pavel Roskin <[email protected]>," |
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" David Gibson <[email protected]>," |
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" Daniel Barlow <[email protected]>)"; |
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MODULE_AUTHOR("Daniel Barlow <[email protected]>"); |
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MODULE_DESCRIPTION("Driver for wireless LAN cards using the PLX9052 PCI bridge"); |
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MODULE_LICENSE("Dual MPL/GPL"); |
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static int __init orinoco_plx_init(void) |
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{ |
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printk(KERN_DEBUG "%s\n", version); |
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return pci_register_driver(&orinoco_plx_driver); |
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} |
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static void __exit orinoco_plx_exit(void) |
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{ |
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pci_unregister_driver(&orinoco_plx_driver); |
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} |
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module_init(orinoco_plx_init); |
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module_exit(orinoco_plx_exit);
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