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536 lines
12 KiB
536 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* DaVinci MDIO Module driver |
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* |
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* Copyright (C) 2010 Texas Instruments. |
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* |
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* Shamelessly ripped out of davinci_emac.c, original copyrights follow: |
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* |
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* Copyright (C) 2009 Texas Instruments. |
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* |
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*/ |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/platform_device.h> |
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#include <linux/delay.h> |
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#include <linux/sched.h> |
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#include <linux/slab.h> |
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#include <linux/phy.h> |
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#include <linux/clk.h> |
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#include <linux/err.h> |
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#include <linux/io.h> |
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#include <linux/iopoll.h> |
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#include <linux/pm_runtime.h> |
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#include <linux/davinci_emac.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/of_mdio.h> |
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#include <linux/pinctrl/consumer.h> |
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/* |
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* This timeout definition is a worst-case ultra defensive measure against |
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* unexpected controller lock ups. Ideally, we should never ever hit this |
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* scenario in practice. |
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*/ |
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#define MDIO_TIMEOUT 100 /* msecs */ |
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#define PHY_REG_MASK 0x1f |
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#define PHY_ID_MASK 0x1f |
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#define DEF_OUT_FREQ 2200000 /* 2.2 MHz */ |
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struct davinci_mdio_of_param { |
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int autosuspend_delay_ms; |
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}; |
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struct davinci_mdio_regs { |
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u32 version; |
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u32 control; |
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#define CONTROL_IDLE BIT(31) |
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#define CONTROL_ENABLE BIT(30) |
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#define CONTROL_MAX_DIV (0xffff) |
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u32 alive; |
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u32 link; |
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u32 linkintraw; |
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u32 linkintmasked; |
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u32 __reserved_0[2]; |
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u32 userintraw; |
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u32 userintmasked; |
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u32 userintmaskset; |
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u32 userintmaskclr; |
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u32 __reserved_1[20]; |
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struct { |
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u32 access; |
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#define USERACCESS_GO BIT(31) |
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#define USERACCESS_WRITE BIT(30) |
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#define USERACCESS_ACK BIT(29) |
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#define USERACCESS_READ (0) |
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#define USERACCESS_DATA (0xffff) |
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u32 physel; |
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} user[0]; |
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}; |
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static const struct mdio_platform_data default_pdata = { |
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.bus_freq = DEF_OUT_FREQ, |
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}; |
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struct davinci_mdio_data { |
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struct mdio_platform_data pdata; |
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struct davinci_mdio_regs __iomem *regs; |
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struct clk *clk; |
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struct device *dev; |
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struct mii_bus *bus; |
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bool active_in_suspend; |
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unsigned long access_time; /* jiffies */ |
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/* Indicates that driver shouldn't modify phy_mask in case |
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* if MDIO bus is registered from DT. |
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*/ |
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bool skip_scan; |
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u32 clk_div; |
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}; |
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static void davinci_mdio_init_clk(struct davinci_mdio_data *data) |
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{ |
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u32 mdio_in, div, mdio_out_khz, access_time; |
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mdio_in = clk_get_rate(data->clk); |
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div = (mdio_in / data->pdata.bus_freq) - 1; |
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if (div > CONTROL_MAX_DIV) |
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div = CONTROL_MAX_DIV; |
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data->clk_div = div; |
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/* |
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* One mdio transaction consists of: |
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* 32 bits of preamble |
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* 32 bits of transferred data |
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* 24 bits of bus yield (not needed unless shared?) |
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*/ |
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mdio_out_khz = mdio_in / (1000 * (div + 1)); |
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access_time = (88 * 1000) / mdio_out_khz; |
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/* |
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* In the worst case, we could be kicking off a user-access immediately |
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* after the mdio bus scan state-machine triggered its own read. If |
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* so, our request could get deferred by one access cycle. We |
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* defensively allow for 4 access cycles. |
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*/ |
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data->access_time = usecs_to_jiffies(access_time * 4); |
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if (!data->access_time) |
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data->access_time = 1; |
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} |
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static void davinci_mdio_enable(struct davinci_mdio_data *data) |
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{ |
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/* set enable and clock divider */ |
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writel(data->clk_div | CONTROL_ENABLE, &data->regs->control); |
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} |
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static int davinci_mdio_reset(struct mii_bus *bus) |
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{ |
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struct davinci_mdio_data *data = bus->priv; |
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u32 phy_mask, ver; |
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int ret; |
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ret = pm_runtime_get_sync(data->dev); |
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if (ret < 0) { |
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pm_runtime_put_noidle(data->dev); |
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return ret; |
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} |
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/* wait for scan logic to settle */ |
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msleep(PHY_MAX_ADDR * data->access_time); |
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/* dump hardware version info */ |
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ver = readl(&data->regs->version); |
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dev_info(data->dev, |
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"davinci mdio revision %d.%d, bus freq %ld\n", |
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(ver >> 8) & 0xff, ver & 0xff, |
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data->pdata.bus_freq); |
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if (data->skip_scan) |
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goto done; |
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/* get phy mask from the alive register */ |
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phy_mask = readl(&data->regs->alive); |
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if (phy_mask) { |
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/* restrict mdio bus to live phys only */ |
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dev_info(data->dev, "detected phy mask %x\n", ~phy_mask); |
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phy_mask = ~phy_mask; |
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} else { |
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/* desperately scan all phys */ |
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dev_warn(data->dev, "no live phy, scanning all\n"); |
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phy_mask = 0; |
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} |
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data->bus->phy_mask = phy_mask; |
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done: |
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pm_runtime_mark_last_busy(data->dev); |
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pm_runtime_put_autosuspend(data->dev); |
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return 0; |
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} |
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/* wait until hardware is ready for another user access */ |
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static inline int wait_for_user_access(struct davinci_mdio_data *data) |
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{ |
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struct davinci_mdio_regs __iomem *regs = data->regs; |
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unsigned long timeout = jiffies + msecs_to_jiffies(MDIO_TIMEOUT); |
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u32 reg; |
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while (time_after(timeout, jiffies)) { |
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reg = readl(®s->user[0].access); |
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if ((reg & USERACCESS_GO) == 0) |
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return 0; |
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reg = readl(®s->control); |
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if ((reg & CONTROL_IDLE) == 0) { |
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usleep_range(100, 200); |
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continue; |
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} |
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/* |
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* An emac soft_reset may have clobbered the mdio controller's |
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* state machine. We need to reset and retry the current |
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* operation |
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*/ |
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dev_warn(data->dev, "resetting idled controller\n"); |
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davinci_mdio_enable(data); |
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return -EAGAIN; |
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} |
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reg = readl(®s->user[0].access); |
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if ((reg & USERACCESS_GO) == 0) |
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return 0; |
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dev_err(data->dev, "timed out waiting for user access\n"); |
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return -ETIMEDOUT; |
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} |
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/* wait until hardware state machine is idle */ |
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static inline int wait_for_idle(struct davinci_mdio_data *data) |
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{ |
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struct davinci_mdio_regs __iomem *regs = data->regs; |
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u32 val, ret; |
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ret = readl_poll_timeout(®s->control, val, val & CONTROL_IDLE, |
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0, MDIO_TIMEOUT * 1000); |
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if (ret) |
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dev_err(data->dev, "timed out waiting for idle\n"); |
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return ret; |
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} |
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static int davinci_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg) |
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{ |
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struct davinci_mdio_data *data = bus->priv; |
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u32 reg; |
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int ret; |
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if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) |
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return -EINVAL; |
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ret = pm_runtime_get_sync(data->dev); |
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if (ret < 0) { |
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pm_runtime_put_noidle(data->dev); |
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return ret; |
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} |
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reg = (USERACCESS_GO | USERACCESS_READ | (phy_reg << 21) | |
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(phy_id << 16)); |
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while (1) { |
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ret = wait_for_user_access(data); |
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if (ret == -EAGAIN) |
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continue; |
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if (ret < 0) |
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break; |
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writel(reg, &data->regs->user[0].access); |
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ret = wait_for_user_access(data); |
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if (ret == -EAGAIN) |
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continue; |
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if (ret < 0) |
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break; |
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reg = readl(&data->regs->user[0].access); |
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ret = (reg & USERACCESS_ACK) ? (reg & USERACCESS_DATA) : -EIO; |
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break; |
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} |
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pm_runtime_mark_last_busy(data->dev); |
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pm_runtime_put_autosuspend(data->dev); |
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return ret; |
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} |
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static int davinci_mdio_write(struct mii_bus *bus, int phy_id, |
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int phy_reg, u16 phy_data) |
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{ |
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struct davinci_mdio_data *data = bus->priv; |
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u32 reg; |
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int ret; |
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if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) |
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return -EINVAL; |
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ret = pm_runtime_get_sync(data->dev); |
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if (ret < 0) { |
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pm_runtime_put_noidle(data->dev); |
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return ret; |
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} |
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reg = (USERACCESS_GO | USERACCESS_WRITE | (phy_reg << 21) | |
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(phy_id << 16) | (phy_data & USERACCESS_DATA)); |
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while (1) { |
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ret = wait_for_user_access(data); |
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if (ret == -EAGAIN) |
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continue; |
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if (ret < 0) |
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break; |
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writel(reg, &data->regs->user[0].access); |
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ret = wait_for_user_access(data); |
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if (ret == -EAGAIN) |
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continue; |
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break; |
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} |
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pm_runtime_mark_last_busy(data->dev); |
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pm_runtime_put_autosuspend(data->dev); |
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return ret; |
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} |
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static int davinci_mdio_probe_dt(struct mdio_platform_data *data, |
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struct platform_device *pdev) |
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{ |
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struct device_node *node = pdev->dev.of_node; |
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u32 prop; |
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if (!node) |
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return -EINVAL; |
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if (of_property_read_u32(node, "bus_freq", &prop)) { |
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dev_err(&pdev->dev, "Missing bus_freq property in the DT.\n"); |
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return -EINVAL; |
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} |
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data->bus_freq = prop; |
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return 0; |
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} |
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#if IS_ENABLED(CONFIG_OF) |
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static const struct davinci_mdio_of_param of_cpsw_mdio_data = { |
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.autosuspend_delay_ms = 100, |
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}; |
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static const struct of_device_id davinci_mdio_of_mtable[] = { |
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{ .compatible = "ti,davinci_mdio", }, |
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{ .compatible = "ti,cpsw-mdio", .data = &of_cpsw_mdio_data}, |
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{ /* sentinel */ }, |
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}; |
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MODULE_DEVICE_TABLE(of, davinci_mdio_of_mtable); |
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#endif |
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static int davinci_mdio_probe(struct platform_device *pdev) |
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{ |
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struct mdio_platform_data *pdata = dev_get_platdata(&pdev->dev); |
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struct device *dev = &pdev->dev; |
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struct davinci_mdio_data *data; |
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struct resource *res; |
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struct phy_device *phy; |
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int ret, addr; |
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int autosuspend_delay_ms = -1; |
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data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); |
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if (!data) |
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return -ENOMEM; |
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data->bus = devm_mdiobus_alloc(dev); |
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if (!data->bus) { |
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dev_err(dev, "failed to alloc mii bus\n"); |
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return -ENOMEM; |
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} |
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if (IS_ENABLED(CONFIG_OF) && dev->of_node) { |
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const struct davinci_mdio_of_param *of_mdio_data; |
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ret = davinci_mdio_probe_dt(&data->pdata, pdev); |
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if (ret) |
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return ret; |
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snprintf(data->bus->id, MII_BUS_ID_SIZE, "%s", pdev->name); |
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of_mdio_data = of_device_get_match_data(&pdev->dev); |
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if (of_mdio_data) { |
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autosuspend_delay_ms = |
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of_mdio_data->autosuspend_delay_ms; |
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} |
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} else { |
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data->pdata = pdata ? (*pdata) : default_pdata; |
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snprintf(data->bus->id, MII_BUS_ID_SIZE, "%s-%x", |
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pdev->name, pdev->id); |
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} |
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data->bus->name = dev_name(dev); |
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data->bus->read = davinci_mdio_read; |
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data->bus->write = davinci_mdio_write; |
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data->bus->reset = davinci_mdio_reset; |
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data->bus->parent = dev; |
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data->bus->priv = data; |
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data->clk = devm_clk_get(dev, "fck"); |
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if (IS_ERR(data->clk)) { |
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dev_err(dev, "failed to get device clock\n"); |
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return PTR_ERR(data->clk); |
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} |
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dev_set_drvdata(dev, data); |
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data->dev = dev; |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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if (!res) |
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return -EINVAL; |
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data->regs = devm_ioremap(dev, res->start, resource_size(res)); |
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if (!data->regs) |
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return -ENOMEM; |
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davinci_mdio_init_clk(data); |
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pm_runtime_set_autosuspend_delay(&pdev->dev, autosuspend_delay_ms); |
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pm_runtime_use_autosuspend(&pdev->dev); |
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pm_runtime_enable(&pdev->dev); |
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/* register the mii bus |
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* Create PHYs from DT only in case if PHY child nodes are explicitly |
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* defined to support backward compatibility with DTs which assume that |
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* Davinci MDIO will always scan the bus for PHYs detection. |
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*/ |
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if (dev->of_node && of_get_child_count(dev->of_node)) |
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data->skip_scan = true; |
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ret = of_mdiobus_register(data->bus, dev->of_node); |
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if (ret) |
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goto bail_out; |
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/* scan and dump the bus */ |
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for (addr = 0; addr < PHY_MAX_ADDR; addr++) { |
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phy = mdiobus_get_phy(data->bus, addr); |
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if (phy) { |
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dev_info(dev, "phy[%d]: device %s, driver %s\n", |
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phy->mdio.addr, phydev_name(phy), |
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phy->drv ? phy->drv->name : "unknown"); |
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} |
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} |
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return 0; |
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bail_out: |
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pm_runtime_dont_use_autosuspend(&pdev->dev); |
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pm_runtime_disable(&pdev->dev); |
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return ret; |
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} |
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static int davinci_mdio_remove(struct platform_device *pdev) |
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{ |
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struct davinci_mdio_data *data = platform_get_drvdata(pdev); |
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if (data->bus) |
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mdiobus_unregister(data->bus); |
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pm_runtime_dont_use_autosuspend(&pdev->dev); |
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pm_runtime_disable(&pdev->dev); |
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return 0; |
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} |
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#ifdef CONFIG_PM |
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static int davinci_mdio_runtime_suspend(struct device *dev) |
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{ |
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struct davinci_mdio_data *data = dev_get_drvdata(dev); |
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u32 ctrl; |
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/* shutdown the scan state machine */ |
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ctrl = readl(&data->regs->control); |
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ctrl &= ~CONTROL_ENABLE; |
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writel(ctrl, &data->regs->control); |
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wait_for_idle(data); |
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return 0; |
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} |
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static int davinci_mdio_runtime_resume(struct device *dev) |
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{ |
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struct davinci_mdio_data *data = dev_get_drvdata(dev); |
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davinci_mdio_enable(data); |
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return 0; |
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} |
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#endif |
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#ifdef CONFIG_PM_SLEEP |
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static int davinci_mdio_suspend(struct device *dev) |
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{ |
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struct davinci_mdio_data *data = dev_get_drvdata(dev); |
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int ret = 0; |
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data->active_in_suspend = !pm_runtime_status_suspended(dev); |
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if (data->active_in_suspend) |
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ret = pm_runtime_force_suspend(dev); |
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if (ret < 0) |
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return ret; |
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/* Select sleep pin state */ |
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pinctrl_pm_select_sleep_state(dev); |
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return 0; |
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} |
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static int davinci_mdio_resume(struct device *dev) |
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{ |
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struct davinci_mdio_data *data = dev_get_drvdata(dev); |
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/* Select default pin state */ |
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pinctrl_pm_select_default_state(dev); |
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if (data->active_in_suspend) |
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pm_runtime_force_resume(dev); |
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return 0; |
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} |
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#endif |
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static const struct dev_pm_ops davinci_mdio_pm_ops = { |
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SET_RUNTIME_PM_OPS(davinci_mdio_runtime_suspend, |
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davinci_mdio_runtime_resume, NULL) |
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SET_LATE_SYSTEM_SLEEP_PM_OPS(davinci_mdio_suspend, davinci_mdio_resume) |
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}; |
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static struct platform_driver davinci_mdio_driver = { |
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.driver = { |
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.name = "davinci_mdio", |
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.pm = &davinci_mdio_pm_ops, |
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.of_match_table = of_match_ptr(davinci_mdio_of_mtable), |
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}, |
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.probe = davinci_mdio_probe, |
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.remove = davinci_mdio_remove, |
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}; |
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static int __init davinci_mdio_init(void) |
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{ |
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return platform_driver_register(&davinci_mdio_driver); |
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} |
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device_initcall(davinci_mdio_init); |
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static void __exit davinci_mdio_exit(void) |
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{ |
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platform_driver_unregister(&davinci_mdio_driver); |
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} |
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module_exit(davinci_mdio_exit); |
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MODULE_LICENSE("GPL"); |
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MODULE_DESCRIPTION("DaVinci MDIO driver");
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