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362 lines
7.9 KiB
362 lines
7.9 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (C) 2004 Embedded Edge, LLC |
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*/ |
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#include <linux/delay.h> |
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#include <linux/slab.h> |
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#include <linux/module.h> |
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#include <linux/interrupt.h> |
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#include <linux/mtd/mtd.h> |
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#include <linux/mtd/rawnand.h> |
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#include <linux/mtd/partitions.h> |
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#include <linux/platform_device.h> |
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#include <asm/io.h> |
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#include <asm/mach-au1x00/au1000.h> |
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#include <asm/mach-au1x00/au1550nd.h> |
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struct au1550nd_ctx { |
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struct nand_controller controller; |
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struct nand_chip chip; |
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int cs; |
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void __iomem *base; |
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}; |
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static struct au1550nd_ctx *chip_to_au_ctx(struct nand_chip *this) |
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{ |
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return container_of(this, struct au1550nd_ctx, chip); |
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} |
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/** |
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* au_write_buf - write buffer to chip |
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* @this: NAND chip object |
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* @buf: data buffer |
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* @len: number of bytes to write |
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* |
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* write function for 8bit buswidth |
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*/ |
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static void au_write_buf(struct nand_chip *this, const void *buf, |
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unsigned int len) |
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{ |
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struct au1550nd_ctx *ctx = chip_to_au_ctx(this); |
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const u8 *p = buf; |
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int i; |
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for (i = 0; i < len; i++) { |
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writeb(p[i], ctx->base + MEM_STNAND_DATA); |
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wmb(); /* drain writebuffer */ |
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} |
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} |
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/** |
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* au_read_buf - read chip data into buffer |
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* @this: NAND chip object |
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* @buf: buffer to store date |
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* @len: number of bytes to read |
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* |
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* read function for 8bit buswidth |
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*/ |
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static void au_read_buf(struct nand_chip *this, void *buf, |
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unsigned int len) |
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{ |
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struct au1550nd_ctx *ctx = chip_to_au_ctx(this); |
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u8 *p = buf; |
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int i; |
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for (i = 0; i < len; i++) { |
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p[i] = readb(ctx->base + MEM_STNAND_DATA); |
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wmb(); /* drain writebuffer */ |
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} |
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} |
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/** |
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* au_write_buf16 - write buffer to chip |
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* @this: NAND chip object |
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* @buf: data buffer |
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* @len: number of bytes to write |
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* |
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* write function for 16bit buswidth |
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*/ |
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static void au_write_buf16(struct nand_chip *this, const void *buf, |
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unsigned int len) |
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{ |
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struct au1550nd_ctx *ctx = chip_to_au_ctx(this); |
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const u16 *p = buf; |
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unsigned int i; |
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len >>= 1; |
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for (i = 0; i < len; i++) { |
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writew(p[i], ctx->base + MEM_STNAND_DATA); |
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wmb(); /* drain writebuffer */ |
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} |
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} |
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/** |
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* au_read_buf16 - read chip data into buffer |
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* @this: NAND chip object |
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* @buf: buffer to store date |
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* @len: number of bytes to read |
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* |
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* read function for 16bit buswidth |
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*/ |
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static void au_read_buf16(struct nand_chip *this, void *buf, unsigned int len) |
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{ |
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struct au1550nd_ctx *ctx = chip_to_au_ctx(this); |
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unsigned int i; |
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u16 *p = buf; |
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len >>= 1; |
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for (i = 0; i < len; i++) { |
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p[i] = readw(ctx->base + MEM_STNAND_DATA); |
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wmb(); /* drain writebuffer */ |
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} |
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} |
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static int find_nand_cs(unsigned long nand_base) |
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{ |
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void __iomem *base = |
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(void __iomem *)KSEG1ADDR(AU1000_STATIC_MEM_PHYS_ADDR); |
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unsigned long addr, staddr, start, mask, end; |
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int i; |
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for (i = 0; i < 4; i++) { |
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addr = 0x1000 + (i * 0x10); /* CSx */ |
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staddr = __raw_readl(base + addr + 0x08); /* STADDRx */ |
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/* figure out the decoded range of this CS */ |
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start = (staddr << 4) & 0xfffc0000; |
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mask = (staddr << 18) & 0xfffc0000; |
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end = (start | (start - 1)) & ~(start ^ mask); |
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if ((nand_base >= start) && (nand_base < end)) |
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return i; |
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} |
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return -ENODEV; |
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} |
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static int au1550nd_waitrdy(struct nand_chip *this, unsigned int timeout_ms) |
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{ |
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unsigned long timeout_jiffies = jiffies; |
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timeout_jiffies += msecs_to_jiffies(timeout_ms) + 1; |
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do { |
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if (alchemy_rdsmem(AU1000_MEM_STSTAT) & 0x1) |
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return 0; |
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usleep_range(10, 100); |
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} while (time_before(jiffies, timeout_jiffies)); |
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return -ETIMEDOUT; |
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} |
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static int au1550nd_exec_instr(struct nand_chip *this, |
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const struct nand_op_instr *instr) |
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{ |
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struct au1550nd_ctx *ctx = chip_to_au_ctx(this); |
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unsigned int i; |
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int ret = 0; |
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switch (instr->type) { |
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case NAND_OP_CMD_INSTR: |
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writeb(instr->ctx.cmd.opcode, |
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ctx->base + MEM_STNAND_CMD); |
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/* Drain the writebuffer */ |
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wmb(); |
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break; |
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case NAND_OP_ADDR_INSTR: |
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for (i = 0; i < instr->ctx.addr.naddrs; i++) { |
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writeb(instr->ctx.addr.addrs[i], |
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ctx->base + MEM_STNAND_ADDR); |
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/* Drain the writebuffer */ |
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wmb(); |
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} |
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break; |
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case NAND_OP_DATA_IN_INSTR: |
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if ((this->options & NAND_BUSWIDTH_16) && |
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!instr->ctx.data.force_8bit) |
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au_read_buf16(this, instr->ctx.data.buf.in, |
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instr->ctx.data.len); |
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else |
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au_read_buf(this, instr->ctx.data.buf.in, |
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instr->ctx.data.len); |
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break; |
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case NAND_OP_DATA_OUT_INSTR: |
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if ((this->options & NAND_BUSWIDTH_16) && |
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!instr->ctx.data.force_8bit) |
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au_write_buf16(this, instr->ctx.data.buf.out, |
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instr->ctx.data.len); |
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else |
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au_write_buf(this, instr->ctx.data.buf.out, |
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instr->ctx.data.len); |
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break; |
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case NAND_OP_WAITRDY_INSTR: |
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ret = au1550nd_waitrdy(this, instr->ctx.waitrdy.timeout_ms); |
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break; |
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default: |
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return -EINVAL; |
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} |
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if (instr->delay_ns) |
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ndelay(instr->delay_ns); |
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return ret; |
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} |
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static int au1550nd_exec_op(struct nand_chip *this, |
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const struct nand_operation *op, |
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bool check_only) |
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{ |
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struct au1550nd_ctx *ctx = chip_to_au_ctx(this); |
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unsigned int i; |
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int ret; |
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if (check_only) |
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return 0; |
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/* assert (force assert) chip enable */ |
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alchemy_wrsmem((1 << (4 + ctx->cs)), AU1000_MEM_STNDCTL); |
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/* Drain the writebuffer */ |
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wmb(); |
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for (i = 0; i < op->ninstrs; i++) { |
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ret = au1550nd_exec_instr(this, &op->instrs[i]); |
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if (ret) |
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break; |
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} |
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/* deassert chip enable */ |
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alchemy_wrsmem(0, AU1000_MEM_STNDCTL); |
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/* Drain the writebuffer */ |
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wmb(); |
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return ret; |
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} |
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static int au1550nd_attach_chip(struct nand_chip *chip) |
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{ |
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chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; |
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if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) |
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chip->ecc.algo = NAND_ECC_ALGO_HAMMING; |
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return 0; |
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} |
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static const struct nand_controller_ops au1550nd_ops = { |
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.exec_op = au1550nd_exec_op, |
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.attach_chip = au1550nd_attach_chip, |
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}; |
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static int au1550nd_probe(struct platform_device *pdev) |
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{ |
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struct au1550nd_platdata *pd; |
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struct au1550nd_ctx *ctx; |
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struct nand_chip *this; |
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struct mtd_info *mtd; |
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struct resource *r; |
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int ret, cs; |
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pd = dev_get_platdata(&pdev->dev); |
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if (!pd) { |
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dev_err(&pdev->dev, "missing platform data\n"); |
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return -ENODEV; |
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} |
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
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if (!ctx) |
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return -ENOMEM; |
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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if (!r) { |
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dev_err(&pdev->dev, "no NAND memory resource\n"); |
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ret = -ENODEV; |
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goto out1; |
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} |
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if (request_mem_region(r->start, resource_size(r), "au1550-nand")) { |
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dev_err(&pdev->dev, "cannot claim NAND memory area\n"); |
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ret = -ENOMEM; |
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goto out1; |
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} |
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ctx->base = ioremap(r->start, 0x1000); |
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if (!ctx->base) { |
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dev_err(&pdev->dev, "cannot remap NAND memory area\n"); |
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ret = -ENODEV; |
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goto out2; |
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} |
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this = &ctx->chip; |
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mtd = nand_to_mtd(this); |
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mtd->dev.parent = &pdev->dev; |
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/* figure out which CS# r->start belongs to */ |
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cs = find_nand_cs(r->start); |
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if (cs < 0) { |
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dev_err(&pdev->dev, "cannot detect NAND chipselect\n"); |
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ret = -ENODEV; |
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goto out3; |
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} |
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ctx->cs = cs; |
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nand_controller_init(&ctx->controller); |
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ctx->controller.ops = &au1550nd_ops; |
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this->controller = &ctx->controller; |
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if (pd->devwidth) |
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this->options |= NAND_BUSWIDTH_16; |
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ret = nand_scan(this, 1); |
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if (ret) { |
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dev_err(&pdev->dev, "NAND scan failed with %d\n", ret); |
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goto out3; |
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} |
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mtd_device_register(mtd, pd->parts, pd->num_parts); |
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platform_set_drvdata(pdev, ctx); |
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return 0; |
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out3: |
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iounmap(ctx->base); |
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out2: |
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release_mem_region(r->start, resource_size(r)); |
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out1: |
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kfree(ctx); |
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return ret; |
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} |
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static int au1550nd_remove(struct platform_device *pdev) |
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{ |
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struct au1550nd_ctx *ctx = platform_get_drvdata(pdev); |
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struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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struct nand_chip *chip = &ctx->chip; |
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int ret; |
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ret = mtd_device_unregister(nand_to_mtd(chip)); |
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WARN_ON(ret); |
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nand_cleanup(chip); |
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iounmap(ctx->base); |
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release_mem_region(r->start, 0x1000); |
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kfree(ctx); |
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return 0; |
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} |
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static struct platform_driver au1550nd_driver = { |
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.driver = { |
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.name = "au1550-nand", |
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}, |
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.probe = au1550nd_probe, |
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.remove = au1550nd_remove, |
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}; |
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module_platform_driver(au1550nd_driver); |
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MODULE_LICENSE("GPL"); |
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MODULE_AUTHOR("Embedded Edge, LLC"); |
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MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on Pb1550 board");
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