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506 lines
12 KiB
506 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Fitipower FC0011 tuner driver |
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* |
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* Copyright (C) 2012 Michael Buesch <[email protected]> |
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* |
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* Derived from FC0012 tuner driver: |
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* Copyright (C) 2012 Hans-Frieder Vogt <[email protected]> |
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*/ |
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#include "fc0011.h" |
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/* Tuner registers */ |
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enum { |
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FC11_REG_0, |
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FC11_REG_FA, /* FA */ |
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FC11_REG_FP, /* FP */ |
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FC11_REG_XINHI, /* XIN high 8 bit */ |
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FC11_REG_XINLO, /* XIN low 8 bit */ |
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FC11_REG_VCO, /* VCO */ |
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FC11_REG_VCOSEL, /* VCO select */ |
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FC11_REG_7, /* Unknown tuner reg 7 */ |
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FC11_REG_8, /* Unknown tuner reg 8 */ |
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FC11_REG_9, |
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FC11_REG_10, /* Unknown tuner reg 10 */ |
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FC11_REG_11, /* Unknown tuner reg 11 */ |
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FC11_REG_12, |
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FC11_REG_RCCAL, /* RC calibrate */ |
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FC11_REG_VCOCAL, /* VCO calibrate */ |
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FC11_REG_15, |
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FC11_REG_16, /* Unknown tuner reg 16 */ |
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FC11_REG_17, |
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FC11_NR_REGS, /* Number of registers */ |
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}; |
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enum FC11_REG_VCOSEL_bits { |
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FC11_VCOSEL_2 = 0x08, /* VCO select 2 */ |
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FC11_VCOSEL_1 = 0x10, /* VCO select 1 */ |
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FC11_VCOSEL_CLKOUT = 0x20, /* Fix clock out */ |
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FC11_VCOSEL_BW7M = 0x40, /* 7MHz bw */ |
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FC11_VCOSEL_BW6M = 0x80, /* 6MHz bw */ |
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}; |
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enum FC11_REG_RCCAL_bits { |
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FC11_RCCAL_FORCE = 0x10, /* force */ |
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}; |
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enum FC11_REG_VCOCAL_bits { |
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FC11_VCOCAL_RUN = 0, /* VCO calibration run */ |
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FC11_VCOCAL_VALUEMASK = 0x3F, /* VCO calibration value mask */ |
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FC11_VCOCAL_OK = 0x40, /* VCO calibration Ok */ |
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FC11_VCOCAL_RESET = 0x80, /* VCO calibration reset */ |
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}; |
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struct fc0011_priv { |
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struct i2c_adapter *i2c; |
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u8 addr; |
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u32 frequency; |
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u32 bandwidth; |
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}; |
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static int fc0011_writereg(struct fc0011_priv *priv, u8 reg, u8 val) |
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{ |
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u8 buf[2] = { reg, val }; |
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struct i2c_msg msg = { .addr = priv->addr, |
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.flags = 0, .buf = buf, .len = 2 }; |
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if (i2c_transfer(priv->i2c, &msg, 1) != 1) { |
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dev_err(&priv->i2c->dev, |
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"I2C write reg failed, reg: %02x, val: %02x\n", |
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reg, val); |
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return -EIO; |
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} |
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return 0; |
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} |
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static int fc0011_readreg(struct fc0011_priv *priv, u8 reg, u8 *val) |
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{ |
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u8 dummy; |
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struct i2c_msg msg[2] = { |
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{ .addr = priv->addr, |
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.flags = 0, .buf = ®, .len = 1 }, |
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{ .addr = priv->addr, |
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.flags = I2C_M_RD, .buf = val ? : &dummy, .len = 1 }, |
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}; |
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if (i2c_transfer(priv->i2c, msg, 2) != 2) { |
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dev_err(&priv->i2c->dev, |
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"I2C read failed, reg: %02x\n", reg); |
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return -EIO; |
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} |
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return 0; |
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} |
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static void fc0011_release(struct dvb_frontend *fe) |
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{ |
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kfree(fe->tuner_priv); |
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fe->tuner_priv = NULL; |
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} |
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static int fc0011_init(struct dvb_frontend *fe) |
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{ |
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struct fc0011_priv *priv = fe->tuner_priv; |
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int err; |
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if (WARN_ON(!fe->callback)) |
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return -EINVAL; |
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err = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, |
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FC0011_FE_CALLBACK_POWER, priv->addr); |
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if (err) { |
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dev_err(&priv->i2c->dev, "Power-on callback failed\n"); |
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return err; |
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} |
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err = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, |
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FC0011_FE_CALLBACK_RESET, priv->addr); |
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if (err) { |
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dev_err(&priv->i2c->dev, "Reset callback failed\n"); |
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return err; |
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} |
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return 0; |
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} |
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/* Initiate VCO calibration */ |
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static int fc0011_vcocal_trigger(struct fc0011_priv *priv) |
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{ |
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int err; |
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err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RESET); |
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if (err) |
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return err; |
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err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RUN); |
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if (err) |
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return err; |
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return 0; |
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} |
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/* Read VCO calibration value */ |
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static int fc0011_vcocal_read(struct fc0011_priv *priv, u8 *value) |
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{ |
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int err; |
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err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RUN); |
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if (err) |
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return err; |
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usleep_range(10000, 20000); |
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err = fc0011_readreg(priv, FC11_REG_VCOCAL, value); |
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if (err) |
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return err; |
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return 0; |
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} |
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static int fc0011_set_params(struct dvb_frontend *fe) |
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{ |
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struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
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struct fc0011_priv *priv = fe->tuner_priv; |
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int err; |
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unsigned int i, vco_retries; |
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u32 freq = p->frequency / 1000; |
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u32 bandwidth = p->bandwidth_hz / 1000; |
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u32 fvco, xin, frac, xdiv, xdivr; |
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u8 fa, fp, vco_sel, vco_cal; |
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u8 regs[FC11_NR_REGS] = { }; |
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regs[FC11_REG_7] = 0x0F; |
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regs[FC11_REG_8] = 0x3E; |
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regs[FC11_REG_10] = 0xB8; |
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regs[FC11_REG_11] = 0x80; |
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regs[FC11_REG_RCCAL] = 0x04; |
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err = fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]); |
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err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]); |
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err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]); |
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err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]); |
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err |= fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]); |
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if (err) |
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return -EIO; |
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/* Set VCO freq and VCO div */ |
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if (freq < 54000) { |
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fvco = freq * 64; |
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regs[FC11_REG_VCO] = 0x82; |
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} else if (freq < 108000) { |
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fvco = freq * 32; |
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regs[FC11_REG_VCO] = 0x42; |
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} else if (freq < 216000) { |
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fvco = freq * 16; |
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regs[FC11_REG_VCO] = 0x22; |
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} else if (freq < 432000) { |
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fvco = freq * 8; |
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regs[FC11_REG_VCO] = 0x12; |
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} else { |
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fvco = freq * 4; |
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regs[FC11_REG_VCO] = 0x0A; |
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} |
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/* Calc XIN. The PLL reference frequency is 18 MHz. */ |
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xdiv = fvco / 18000; |
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WARN_ON(xdiv > 0xFF); |
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frac = fvco - xdiv * 18000; |
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frac = (frac << 15) / 18000; |
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if (frac >= 16384) |
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frac += 32786; |
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if (!frac) |
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xin = 0; |
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else |
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xin = clamp_t(u32, frac, 512, 65024); |
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regs[FC11_REG_XINHI] = xin >> 8; |
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regs[FC11_REG_XINLO] = xin; |
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/* Calc FP and FA */ |
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xdivr = xdiv; |
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if (fvco - xdiv * 18000 >= 9000) |
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xdivr += 1; /* round */ |
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fp = xdivr / 8; |
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fa = xdivr - fp * 8; |
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if (fa < 2) { |
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fp -= 1; |
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fa += 8; |
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} |
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if (fp > 0x1F) { |
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fp = 0x1F; |
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fa = 0xF; |
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} |
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if (fa >= fp) { |
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dev_warn(&priv->i2c->dev, |
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"fa %02X >= fp %02X, but trying to continue\n", |
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(unsigned int)(u8)fa, (unsigned int)(u8)fp); |
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} |
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regs[FC11_REG_FA] = fa; |
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regs[FC11_REG_FP] = fp; |
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/* Select bandwidth */ |
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switch (bandwidth) { |
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case 8000: |
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break; |
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case 7000: |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_BW7M; |
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break; |
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default: |
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dev_warn(&priv->i2c->dev, "Unsupported bandwidth %u kHz. Using 6000 kHz.\n", |
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bandwidth); |
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bandwidth = 6000; |
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fallthrough; |
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case 6000: |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_BW6M; |
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break; |
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} |
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/* Pre VCO select */ |
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if (fvco < 2320000) { |
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vco_sel = 0; |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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} else if (fvco < 3080000) { |
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vco_sel = 1; |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1; |
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} else { |
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vco_sel = 2; |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2; |
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} |
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/* Fix for low freqs */ |
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if (freq < 45000) { |
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regs[FC11_REG_FA] = 0x6; |
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regs[FC11_REG_FP] = 0x11; |
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} |
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/* Clock out fix */ |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_CLKOUT; |
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/* Write the cached registers */ |
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for (i = FC11_REG_FA; i <= FC11_REG_VCOSEL; i++) { |
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err = fc0011_writereg(priv, i, regs[i]); |
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if (err) |
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return err; |
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} |
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/* VCO calibration */ |
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err = fc0011_vcocal_trigger(priv); |
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if (err) |
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return err; |
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err = fc0011_vcocal_read(priv, &vco_cal); |
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if (err) |
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return err; |
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vco_retries = 0; |
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while (!(vco_cal & FC11_VCOCAL_OK) && vco_retries < 3) { |
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/* Reset the tuner and try again */ |
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err = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, |
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FC0011_FE_CALLBACK_RESET, priv->addr); |
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if (err) { |
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dev_err(&priv->i2c->dev, "Failed to reset tuner\n"); |
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return err; |
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} |
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/* Reinit tuner config */ |
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err = 0; |
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for (i = FC11_REG_FA; i <= FC11_REG_VCOSEL; i++) |
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err |= fc0011_writereg(priv, i, regs[i]); |
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err |= fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]); |
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err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]); |
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err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]); |
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err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]); |
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err |= fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]); |
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if (err) |
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return -EIO; |
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/* VCO calibration */ |
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err = fc0011_vcocal_trigger(priv); |
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if (err) |
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return err; |
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err = fc0011_vcocal_read(priv, &vco_cal); |
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if (err) |
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return err; |
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vco_retries++; |
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} |
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if (!(vco_cal & FC11_VCOCAL_OK)) { |
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dev_err(&priv->i2c->dev, |
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"Failed to read VCO calibration value (got %02X)\n", |
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(unsigned int)vco_cal); |
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return -EIO; |
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} |
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vco_cal &= FC11_VCOCAL_VALUEMASK; |
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switch (vco_sel) { |
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default: |
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WARN_ON(1); |
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return -EINVAL; |
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case 0: |
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if (vco_cal < 8) { |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1; |
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err = fc0011_writereg(priv, FC11_REG_VCOSEL, |
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regs[FC11_REG_VCOSEL]); |
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if (err) |
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return err; |
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err = fc0011_vcocal_trigger(priv); |
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if (err) |
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return err; |
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} else { |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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err = fc0011_writereg(priv, FC11_REG_VCOSEL, |
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regs[FC11_REG_VCOSEL]); |
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if (err) |
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return err; |
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} |
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break; |
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case 1: |
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if (vco_cal < 5) { |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2; |
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err = fc0011_writereg(priv, FC11_REG_VCOSEL, |
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regs[FC11_REG_VCOSEL]); |
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if (err) |
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return err; |
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err = fc0011_vcocal_trigger(priv); |
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if (err) |
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return err; |
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} else if (vco_cal <= 48) { |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1; |
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err = fc0011_writereg(priv, FC11_REG_VCOSEL, |
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regs[FC11_REG_VCOSEL]); |
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if (err) |
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return err; |
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} else { |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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err = fc0011_writereg(priv, FC11_REG_VCOSEL, |
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regs[FC11_REG_VCOSEL]); |
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if (err) |
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return err; |
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err = fc0011_vcocal_trigger(priv); |
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if (err) |
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return err; |
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} |
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break; |
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case 2: |
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if (vco_cal > 53) { |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1; |
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err = fc0011_writereg(priv, FC11_REG_VCOSEL, |
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regs[FC11_REG_VCOSEL]); |
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if (err) |
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return err; |
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err = fc0011_vcocal_trigger(priv); |
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if (err) |
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return err; |
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} else { |
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regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); |
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regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2; |
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err = fc0011_writereg(priv, FC11_REG_VCOSEL, |
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regs[FC11_REG_VCOSEL]); |
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if (err) |
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return err; |
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} |
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break; |
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} |
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err = fc0011_vcocal_read(priv, NULL); |
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if (err) |
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return err; |
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usleep_range(10000, 50000); |
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err = fc0011_readreg(priv, FC11_REG_RCCAL, ®s[FC11_REG_RCCAL]); |
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if (err) |
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return err; |
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regs[FC11_REG_RCCAL] |= FC11_RCCAL_FORCE; |
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err = fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]); |
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if (err) |
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return err; |
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regs[FC11_REG_16] = 0xB; |
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err = fc0011_writereg(priv, FC11_REG_16, regs[FC11_REG_16]); |
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if (err) |
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return err; |
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dev_dbg(&priv->i2c->dev, "Tuned to fa=%02X fp=%02X xin=%02X%02X vco=%02X vcosel=%02X vcocal=%02X(%u) bw=%u\n", |
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(unsigned int)regs[FC11_REG_FA], |
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(unsigned int)regs[FC11_REG_FP], |
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(unsigned int)regs[FC11_REG_XINHI], |
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(unsigned int)regs[FC11_REG_XINLO], |
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(unsigned int)regs[FC11_REG_VCO], |
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(unsigned int)regs[FC11_REG_VCOSEL], |
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(unsigned int)vco_cal, vco_retries, |
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(unsigned int)bandwidth); |
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priv->frequency = p->frequency; |
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priv->bandwidth = p->bandwidth_hz; |
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return 0; |
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} |
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static int fc0011_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
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{ |
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struct fc0011_priv *priv = fe->tuner_priv; |
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*frequency = priv->frequency; |
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return 0; |
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} |
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static int fc0011_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) |
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{ |
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*frequency = 0; |
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return 0; |
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} |
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static int fc0011_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) |
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{ |
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struct fc0011_priv *priv = fe->tuner_priv; |
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*bandwidth = priv->bandwidth; |
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return 0; |
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} |
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static const struct dvb_tuner_ops fc0011_tuner_ops = { |
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.info = { |
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.name = "Fitipower FC0011", |
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.frequency_min_hz = 45 * MHz, |
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.frequency_max_hz = 1000 * MHz, |
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}, |
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.release = fc0011_release, |
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.init = fc0011_init, |
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.set_params = fc0011_set_params, |
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.get_frequency = fc0011_get_frequency, |
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.get_if_frequency = fc0011_get_if_frequency, |
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.get_bandwidth = fc0011_get_bandwidth, |
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}; |
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struct dvb_frontend *fc0011_attach(struct dvb_frontend *fe, |
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struct i2c_adapter *i2c, |
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const struct fc0011_config *config) |
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{ |
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struct fc0011_priv *priv; |
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priv = kzalloc(sizeof(struct fc0011_priv), GFP_KERNEL); |
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if (!priv) |
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return NULL; |
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priv->i2c = i2c; |
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priv->addr = config->i2c_address; |
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fe->tuner_priv = priv; |
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fe->ops.tuner_ops = fc0011_tuner_ops; |
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dev_info(&priv->i2c->dev, "Fitipower FC0011 tuner attached\n"); |
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return fe; |
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} |
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EXPORT_SYMBOL(fc0011_attach); |
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MODULE_DESCRIPTION("Fitipower FC0011 silicon tuner driver"); |
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MODULE_AUTHOR("Michael Buesch <[email protected]>"); |
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MODULE_LICENSE("GPL");
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