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250 lines
5.9 KiB
250 lines
5.9 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2020, Jiaxun Yang <[email protected]> |
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* Loongson PCH MSI support |
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*/ |
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#define pr_fmt(fmt) "pch-msi: " fmt |
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#include <linux/irqchip.h> |
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#include <linux/msi.h> |
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#include <linux/of.h> |
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#include <linux/of_address.h> |
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#include <linux/of_irq.h> |
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#include <linux/of_pci.h> |
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#include <linux/pci.h> |
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#include <linux/slab.h> |
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struct pch_msi_data { |
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struct mutex msi_map_lock; |
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phys_addr_t doorbell; |
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u32 irq_first; /* The vector number that MSIs starts */ |
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u32 num_irqs; /* The number of vectors for MSIs */ |
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unsigned long *msi_map; |
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}; |
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static void pch_msi_mask_msi_irq(struct irq_data *d) |
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{ |
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pci_msi_mask_irq(d); |
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irq_chip_mask_parent(d); |
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} |
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static void pch_msi_unmask_msi_irq(struct irq_data *d) |
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{ |
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irq_chip_unmask_parent(d); |
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pci_msi_unmask_irq(d); |
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} |
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static struct irq_chip pch_msi_irq_chip = { |
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.name = "PCH PCI MSI", |
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.irq_mask = pch_msi_mask_msi_irq, |
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.irq_unmask = pch_msi_unmask_msi_irq, |
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.irq_ack = irq_chip_ack_parent, |
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.irq_set_affinity = irq_chip_set_affinity_parent, |
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}; |
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static int pch_msi_allocate_hwirq(struct pch_msi_data *priv, int num_req) |
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{ |
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int first; |
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mutex_lock(&priv->msi_map_lock); |
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first = bitmap_find_free_region(priv->msi_map, priv->num_irqs, |
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get_count_order(num_req)); |
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if (first < 0) { |
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mutex_unlock(&priv->msi_map_lock); |
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return -ENOSPC; |
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} |
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mutex_unlock(&priv->msi_map_lock); |
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return priv->irq_first + first; |
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} |
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static void pch_msi_free_hwirq(struct pch_msi_data *priv, |
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int hwirq, int num_req) |
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{ |
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int first = hwirq - priv->irq_first; |
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mutex_lock(&priv->msi_map_lock); |
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bitmap_release_region(priv->msi_map, first, get_count_order(num_req)); |
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mutex_unlock(&priv->msi_map_lock); |
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} |
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static void pch_msi_compose_msi_msg(struct irq_data *data, |
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struct msi_msg *msg) |
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{ |
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struct pch_msi_data *priv = irq_data_get_irq_chip_data(data); |
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msg->address_hi = upper_32_bits(priv->doorbell); |
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msg->address_lo = lower_32_bits(priv->doorbell); |
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msg->data = data->hwirq; |
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} |
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static struct msi_domain_info pch_msi_domain_info = { |
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | |
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MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX, |
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.chip = &pch_msi_irq_chip, |
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}; |
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static struct irq_chip middle_irq_chip = { |
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.name = "PCH MSI", |
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.irq_mask = irq_chip_mask_parent, |
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.irq_unmask = irq_chip_unmask_parent, |
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.irq_ack = irq_chip_ack_parent, |
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.irq_set_affinity = irq_chip_set_affinity_parent, |
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.irq_compose_msi_msg = pch_msi_compose_msi_msg, |
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}; |
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static int pch_msi_parent_domain_alloc(struct irq_domain *domain, |
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unsigned int virq, int hwirq) |
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{ |
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struct irq_fwspec fwspec; |
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fwspec.fwnode = domain->parent->fwnode; |
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fwspec.param_count = 1; |
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fwspec.param[0] = hwirq; |
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return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); |
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} |
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static int pch_msi_middle_domain_alloc(struct irq_domain *domain, |
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unsigned int virq, |
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unsigned int nr_irqs, void *args) |
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{ |
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struct pch_msi_data *priv = domain->host_data; |
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int hwirq, err, i; |
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hwirq = pch_msi_allocate_hwirq(priv, nr_irqs); |
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if (hwirq < 0) |
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return hwirq; |
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for (i = 0; i < nr_irqs; i++) { |
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err = pch_msi_parent_domain_alloc(domain, virq + i, hwirq + i); |
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if (err) |
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goto err_hwirq; |
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irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, |
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&middle_irq_chip, priv); |
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} |
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return 0; |
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err_hwirq: |
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pch_msi_free_hwirq(priv, hwirq, nr_irqs); |
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irq_domain_free_irqs_parent(domain, virq, i - 1); |
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return err; |
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} |
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static void pch_msi_middle_domain_free(struct irq_domain *domain, |
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unsigned int virq, |
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unsigned int nr_irqs) |
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{ |
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struct irq_data *d = irq_domain_get_irq_data(domain, virq); |
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struct pch_msi_data *priv = irq_data_get_irq_chip_data(d); |
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irq_domain_free_irqs_parent(domain, virq, nr_irqs); |
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pch_msi_free_hwirq(priv, d->hwirq, nr_irqs); |
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} |
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static const struct irq_domain_ops pch_msi_middle_domain_ops = { |
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.alloc = pch_msi_middle_domain_alloc, |
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.free = pch_msi_middle_domain_free, |
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}; |
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static int pch_msi_init_domains(struct pch_msi_data *priv, |
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struct device_node *node, |
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struct irq_domain *parent) |
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{ |
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struct irq_domain *middle_domain, *msi_domain; |
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middle_domain = irq_domain_create_linear(of_node_to_fwnode(node), |
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priv->num_irqs, |
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&pch_msi_middle_domain_ops, |
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priv); |
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if (!middle_domain) { |
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pr_err("Failed to create the MSI middle domain\n"); |
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return -ENOMEM; |
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} |
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middle_domain->parent = parent; |
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irq_domain_update_bus_token(middle_domain, DOMAIN_BUS_NEXUS); |
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msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node), |
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&pch_msi_domain_info, |
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middle_domain); |
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if (!msi_domain) { |
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pr_err("Failed to create PCI MSI domain\n"); |
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irq_domain_remove(middle_domain); |
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return -ENOMEM; |
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} |
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return 0; |
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} |
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static int pch_msi_init(struct device_node *node, |
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struct device_node *parent) |
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{ |
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struct pch_msi_data *priv; |
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struct irq_domain *parent_domain; |
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struct resource res; |
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int ret; |
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parent_domain = irq_find_host(parent); |
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if (!parent_domain) { |
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pr_err("Failed to find the parent domain\n"); |
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return -ENXIO; |
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} |
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priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
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if (!priv) |
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return -ENOMEM; |
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mutex_init(&priv->msi_map_lock); |
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ret = of_address_to_resource(node, 0, &res); |
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if (ret) { |
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pr_err("Failed to allocate resource\n"); |
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goto err_priv; |
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} |
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priv->doorbell = res.start; |
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if (of_property_read_u32(node, "loongson,msi-base-vec", |
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&priv->irq_first)) { |
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pr_err("Unable to parse MSI vec base\n"); |
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ret = -EINVAL; |
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goto err_priv; |
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} |
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if (of_property_read_u32(node, "loongson,msi-num-vecs", |
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&priv->num_irqs)) { |
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pr_err("Unable to parse MSI vec number\n"); |
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ret = -EINVAL; |
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goto err_priv; |
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} |
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priv->msi_map = bitmap_zalloc(priv->num_irqs, GFP_KERNEL); |
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if (!priv->msi_map) { |
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ret = -ENOMEM; |
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goto err_priv; |
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} |
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pr_debug("Registering %d MSIs, starting at %d\n", |
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priv->num_irqs, priv->irq_first); |
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ret = pch_msi_init_domains(priv, node, parent_domain); |
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if (ret) |
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goto err_map; |
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return 0; |
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err_map: |
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kfree(priv->msi_map); |
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err_priv: |
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kfree(priv); |
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return ret; |
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} |
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IRQCHIP_DECLARE(pch_msi, "loongson,pch-msi-1.0", pch_msi_init);
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