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466 lines
11 KiB
466 lines
11 KiB
/* |
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* Copyright 2011, Netlogic Microsystems Inc. |
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* Copyright 2004, Matt Porter <[email protected]> |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without any |
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* warranty of any kind, whether express or implied. |
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*/ |
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#include <linux/err.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/slab.h> |
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#include <linux/ioport.h> |
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#include <linux/delay.h> |
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#include <linux/errno.h> |
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#include <linux/i2c.h> |
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#include <linux/io.h> |
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#include <linux/platform_device.h> |
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#include <linux/of_device.h> |
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#include <linux/clk.h> |
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#include <linux/interrupt.h> |
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#include <linux/wait.h> |
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/* XLR I2C REGISTERS */ |
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#define XLR_I2C_CFG 0x00 |
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#define XLR_I2C_CLKDIV 0x01 |
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#define XLR_I2C_DEVADDR 0x02 |
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#define XLR_I2C_ADDR 0x03 |
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#define XLR_I2C_DATAOUT 0x04 |
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#define XLR_I2C_DATAIN 0x05 |
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#define XLR_I2C_STATUS 0x06 |
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#define XLR_I2C_STARTXFR 0x07 |
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#define XLR_I2C_BYTECNT 0x08 |
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#define XLR_I2C_HDSTATIM 0x09 |
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/* Sigma Designs additional registers */ |
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#define XLR_I2C_INT_EN 0x09 |
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#define XLR_I2C_INT_STAT 0x0a |
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/* XLR I2C REGISTERS FLAGS */ |
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#define XLR_I2C_BUS_BUSY 0x01 |
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#define XLR_I2C_SDOEMPTY 0x02 |
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#define XLR_I2C_RXRDY 0x04 |
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#define XLR_I2C_ACK_ERR 0x08 |
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#define XLR_I2C_ARB_STARTERR 0x30 |
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/* Register Values */ |
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#define XLR_I2C_CFG_ADDR 0xF8 |
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#define XLR_I2C_CFG_NOADDR 0xFA |
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#define XLR_I2C_STARTXFR_ND 0x02 /* No Data */ |
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#define XLR_I2C_STARTXFR_RD 0x01 /* Read */ |
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#define XLR_I2C_STARTXFR_WR 0x00 /* Write */ |
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#define XLR_I2C_TIMEOUT 10 /* timeout per byte in msec */ |
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/* |
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* On XLR/XLS, we need to use __raw_ IO to read the I2C registers |
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* because they are in the big-endian MMIO area on the SoC. |
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* |
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* The readl/writel implementation on XLR/XLS byteswaps, because |
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* those are for its little-endian PCI space (see arch/mips/Kconfig). |
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*/ |
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static inline void xlr_i2c_wreg(u32 __iomem *base, unsigned int reg, u32 val) |
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{ |
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__raw_writel(val, base + reg); |
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} |
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static inline u32 xlr_i2c_rdreg(u32 __iomem *base, unsigned int reg) |
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{ |
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return __raw_readl(base + reg); |
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} |
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#define XLR_I2C_FLAG_IRQ 1 |
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struct xlr_i2c_config { |
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u32 flags; /* optional feature support */ |
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u32 status_busy; /* value of STATUS[0] when busy */ |
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u32 cfg_extra; /* extra CFG bits to set */ |
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}; |
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struct xlr_i2c_private { |
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struct i2c_adapter adap; |
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u32 __iomem *iobase; |
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int irq; |
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int pos; |
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struct i2c_msg *msg; |
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const struct xlr_i2c_config *cfg; |
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wait_queue_head_t wait; |
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struct clk *clk; |
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}; |
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static int xlr_i2c_busy(struct xlr_i2c_private *priv, u32 status) |
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{ |
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return (status & XLR_I2C_BUS_BUSY) == priv->cfg->status_busy; |
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} |
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static int xlr_i2c_idle(struct xlr_i2c_private *priv) |
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{ |
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return !xlr_i2c_busy(priv, xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS)); |
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} |
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static int xlr_i2c_wait(struct xlr_i2c_private *priv, unsigned long timeout) |
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{ |
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int status; |
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int t; |
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t = wait_event_timeout(priv->wait, xlr_i2c_idle(priv), |
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msecs_to_jiffies(timeout)); |
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if (!t) |
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return -ETIMEDOUT; |
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status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); |
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return status & XLR_I2C_ACK_ERR ? -EIO : 0; |
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} |
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static void xlr_i2c_tx_irq(struct xlr_i2c_private *priv, u32 status) |
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{ |
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struct i2c_msg *msg = priv->msg; |
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if (status & XLR_I2C_SDOEMPTY) |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, |
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msg->buf[priv->pos++]); |
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} |
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static void xlr_i2c_rx_irq(struct xlr_i2c_private *priv, u32 status) |
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{ |
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struct i2c_msg *msg = priv->msg; |
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if (status & XLR_I2C_RXRDY) |
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msg->buf[priv->pos++] = |
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xlr_i2c_rdreg(priv->iobase, XLR_I2C_DATAIN); |
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} |
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static irqreturn_t xlr_i2c_irq(int irq, void *dev_id) |
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{ |
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struct xlr_i2c_private *priv = dev_id; |
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struct i2c_msg *msg = priv->msg; |
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u32 int_stat, status; |
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int_stat = xlr_i2c_rdreg(priv->iobase, XLR_I2C_INT_STAT); |
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if (!int_stat) |
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return IRQ_NONE; |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_STAT, int_stat); |
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if (!msg) |
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return IRQ_HANDLED; |
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status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); |
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if (priv->pos < msg->len) { |
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if (msg->flags & I2C_M_RD) |
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xlr_i2c_rx_irq(priv, status); |
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else |
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xlr_i2c_tx_irq(priv, status); |
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} |
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if (!xlr_i2c_busy(priv, status)) |
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wake_up(&priv->wait); |
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return IRQ_HANDLED; |
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} |
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static int xlr_i2c_tx(struct xlr_i2c_private *priv, u16 len, |
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u8 *buf, u16 addr) |
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{ |
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struct i2c_adapter *adap = &priv->adap; |
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unsigned long timeout, stoptime, checktime; |
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u32 i2c_status; |
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int pos, timedout; |
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u8 offset; |
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u32 xfer; |
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offset = buf[0]; |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_ADDR, offset); |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr); |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG, |
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XLR_I2C_CFG_ADDR | priv->cfg->cfg_extra); |
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timeout = msecs_to_jiffies(XLR_I2C_TIMEOUT); |
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stoptime = jiffies + timeout; |
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timedout = 0; |
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if (len == 1) { |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1); |
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xfer = XLR_I2C_STARTXFR_ND; |
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pos = 1; |
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} else { |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 2); |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[1]); |
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xfer = XLR_I2C_STARTXFR_WR; |
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pos = 2; |
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} |
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priv->pos = pos; |
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retry: |
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/* retry can only happen on the first byte */ |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, xfer); |
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if (priv->irq > 0) |
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return xlr_i2c_wait(priv, XLR_I2C_TIMEOUT * len); |
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while (!timedout) { |
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checktime = jiffies; |
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i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); |
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if ((i2c_status & XLR_I2C_SDOEMPTY) && pos < len) { |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[pos++]); |
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/* reset timeout on successful xmit */ |
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stoptime = jiffies + timeout; |
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} |
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timedout = time_after(checktime, stoptime); |
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if (i2c_status & XLR_I2C_ARB_STARTERR) { |
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if (timedout) |
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break; |
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goto retry; |
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} |
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if (i2c_status & XLR_I2C_ACK_ERR) |
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return -EIO; |
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if (!xlr_i2c_busy(priv, i2c_status) && pos >= len) |
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return 0; |
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} |
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dev_err(&adap->dev, "I2C transmit timeout\n"); |
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return -ETIMEDOUT; |
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} |
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static int xlr_i2c_rx(struct xlr_i2c_private *priv, u16 len, u8 *buf, u16 addr) |
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{ |
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struct i2c_adapter *adap = &priv->adap; |
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u32 i2c_status; |
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unsigned long timeout, stoptime, checktime; |
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int nbytes, timedout; |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG, |
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XLR_I2C_CFG_NOADDR | priv->cfg->cfg_extra); |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1); |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr); |
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priv->pos = 0; |
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timeout = msecs_to_jiffies(XLR_I2C_TIMEOUT); |
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stoptime = jiffies + timeout; |
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timedout = 0; |
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nbytes = 0; |
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retry: |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, XLR_I2C_STARTXFR_RD); |
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if (priv->irq > 0) |
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return xlr_i2c_wait(priv, XLR_I2C_TIMEOUT * len); |
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while (!timedout) { |
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checktime = jiffies; |
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i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); |
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if (i2c_status & XLR_I2C_RXRDY) { |
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if (nbytes >= len) |
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return -EIO; /* should not happen */ |
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buf[nbytes++] = |
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xlr_i2c_rdreg(priv->iobase, XLR_I2C_DATAIN); |
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/* reset timeout on successful read */ |
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stoptime = jiffies + timeout; |
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} |
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timedout = time_after(checktime, stoptime); |
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if (i2c_status & XLR_I2C_ARB_STARTERR) { |
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if (timedout) |
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break; |
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goto retry; |
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} |
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if (i2c_status & XLR_I2C_ACK_ERR) |
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return -EIO; |
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if (!xlr_i2c_busy(priv, i2c_status)) |
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return 0; |
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} |
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dev_err(&adap->dev, "I2C receive timeout\n"); |
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return -ETIMEDOUT; |
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} |
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static int xlr_i2c_xfer(struct i2c_adapter *adap, |
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struct i2c_msg *msgs, int num) |
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{ |
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struct i2c_msg *msg; |
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int i; |
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int ret = 0; |
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struct xlr_i2c_private *priv = i2c_get_adapdata(adap); |
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ret = clk_enable(priv->clk); |
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if (ret) |
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return ret; |
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if (priv->irq) |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_EN, 0xf); |
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for (i = 0; ret == 0 && i < num; i++) { |
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msg = &msgs[i]; |
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priv->msg = msg; |
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if (msg->flags & I2C_M_RD) |
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ret = xlr_i2c_rx(priv, msg->len, &msg->buf[0], |
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msg->addr); |
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else |
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ret = xlr_i2c_tx(priv, msg->len, &msg->buf[0], |
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msg->addr); |
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} |
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if (priv->irq) |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_EN, 0); |
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clk_disable(priv->clk); |
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priv->msg = NULL; |
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return (ret != 0) ? ret : num; |
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} |
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static u32 xlr_func(struct i2c_adapter *adap) |
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{ |
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/* Emulate SMBUS over I2C */ |
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return (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) | I2C_FUNC_I2C; |
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} |
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static const struct i2c_algorithm xlr_i2c_algo = { |
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.master_xfer = xlr_i2c_xfer, |
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.functionality = xlr_func, |
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}; |
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static const struct i2c_adapter_quirks xlr_i2c_quirks = { |
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.flags = I2C_AQ_NO_ZERO_LEN, |
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}; |
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static const struct xlr_i2c_config xlr_i2c_config_default = { |
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.status_busy = XLR_I2C_BUS_BUSY, |
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.cfg_extra = 0, |
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}; |
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static const struct xlr_i2c_config xlr_i2c_config_tangox = { |
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.flags = XLR_I2C_FLAG_IRQ, |
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.status_busy = 0, |
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.cfg_extra = 1 << 8, |
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}; |
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static const struct of_device_id xlr_i2c_dt_ids[] = { |
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{ |
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.compatible = "sigma,smp8642-i2c", |
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.data = &xlr_i2c_config_tangox, |
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}, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(of, xlr_i2c_dt_ids); |
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static int xlr_i2c_probe(struct platform_device *pdev) |
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{ |
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const struct of_device_id *match; |
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struct xlr_i2c_private *priv; |
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struct clk *clk; |
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unsigned long clk_rate; |
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unsigned long clk_div; |
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u32 busfreq; |
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int irq; |
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int ret; |
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); |
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if (!priv) |
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return -ENOMEM; |
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match = of_match_device(xlr_i2c_dt_ids, &pdev->dev); |
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if (match) |
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priv->cfg = match->data; |
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else |
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priv->cfg = &xlr_i2c_config_default; |
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priv->iobase = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(priv->iobase)) |
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return PTR_ERR(priv->iobase); |
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irq = platform_get_irq(pdev, 0); |
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if (irq > 0 && (priv->cfg->flags & XLR_I2C_FLAG_IRQ)) { |
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priv->irq = irq; |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_EN, 0); |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_INT_STAT, 0xf); |
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ret = devm_request_irq(&pdev->dev, priv->irq, xlr_i2c_irq, |
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IRQF_SHARED, dev_name(&pdev->dev), |
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priv); |
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if (ret) |
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return ret; |
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init_waitqueue_head(&priv->wait); |
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} |
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if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", |
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&busfreq)) |
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busfreq = I2C_MAX_STANDARD_MODE_FREQ; |
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clk = devm_clk_get(&pdev->dev, NULL); |
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if (!IS_ERR(clk)) { |
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ret = clk_prepare_enable(clk); |
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if (ret) |
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return ret; |
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clk_rate = clk_get_rate(clk); |
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clk_div = DIV_ROUND_UP(clk_rate, 2 * busfreq); |
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xlr_i2c_wreg(priv->iobase, XLR_I2C_CLKDIV, clk_div); |
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clk_disable(clk); |
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priv->clk = clk; |
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} |
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priv->adap.dev.parent = &pdev->dev; |
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priv->adap.dev.of_node = pdev->dev.of_node; |
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priv->adap.owner = THIS_MODULE; |
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priv->adap.algo_data = priv; |
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priv->adap.algo = &xlr_i2c_algo; |
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priv->adap.quirks = &xlr_i2c_quirks; |
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priv->adap.nr = pdev->id; |
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priv->adap.class = I2C_CLASS_HWMON; |
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snprintf(priv->adap.name, sizeof(priv->adap.name), "xlr-i2c"); |
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i2c_set_adapdata(&priv->adap, priv); |
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ret = i2c_add_numbered_adapter(&priv->adap); |
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if (ret < 0) |
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return ret; |
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platform_set_drvdata(pdev, priv); |
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dev_info(&priv->adap.dev, "Added I2C Bus.\n"); |
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return 0; |
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} |
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static int xlr_i2c_remove(struct platform_device *pdev) |
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{ |
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struct xlr_i2c_private *priv; |
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priv = platform_get_drvdata(pdev); |
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i2c_del_adapter(&priv->adap); |
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clk_unprepare(priv->clk); |
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return 0; |
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} |
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static struct platform_driver xlr_i2c_driver = { |
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.probe = xlr_i2c_probe, |
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.remove = xlr_i2c_remove, |
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.driver = { |
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.name = "xlr-i2cbus", |
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.of_match_table = xlr_i2c_dt_ids, |
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}, |
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}; |
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module_platform_driver(xlr_i2c_driver); |
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MODULE_AUTHOR("Ganesan Ramalingam <[email protected]>"); |
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MODULE_DESCRIPTION("XLR/XLS SoC I2C Controller driver"); |
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MODULE_LICENSE("GPL v2"); |
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MODULE_ALIAS("platform:xlr-i2cbus");
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