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544 lines
13 KiB
544 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* ------------------------------------------------------------------------- */ |
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/* i2c-iop3xx.c i2c driver algorithms for Intel XScale IOP3xx & IXP46x */ |
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/* ------------------------------------------------------------------------- */ |
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/* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd |
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* <Peter dot Milne at D hyphen TACQ dot com> |
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* |
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* With acknowledgements to i2c-algo-ibm_ocp.c by |
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* Ian DaSilva, MontaVista Software, Inc. [email protected] |
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* |
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* And i2c-algo-pcf.c, which was created by Simon G. Vogl and Hans Berglund: |
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* |
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* Copyright (C) 1995-1997 Simon G. Vogl, 1998-2000 Hans Berglund |
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* |
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* And which acknowledged Kyösti Mälkki <[email protected]>, |
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* Frodo Looijaard <[email protected]>, Martin Bailey<[email protected]> |
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* |
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* Major cleanup by Deepak Saxena <[email protected]>, 01/2005: |
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* |
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* - Use driver model to pass per-chip info instead of hardcoding and #ifdefs |
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* - Use ioremap/__raw_readl/__raw_writel instead of direct dereference |
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* - Make it work with IXP46x chips |
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* - Cleanup function names, coding style, etc |
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* |
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* - writing to slave address causes latchup on iop331. |
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* fix: driver refuses to address self. |
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*/ |
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|
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#include <linux/interrupt.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/delay.h> |
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#include <linux/slab.h> |
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#include <linux/errno.h> |
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#include <linux/platform_device.h> |
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#include <linux/i2c.h> |
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#include <linux/io.h> |
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#include <linux/gpio/consumer.h> |
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#include "i2c-iop3xx.h" |
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|
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/* global unit counter */ |
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static int i2c_id; |
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|
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static inline unsigned char |
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iic_cook_addr(struct i2c_msg *msg) |
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{ |
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unsigned char addr; |
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addr = i2c_8bit_addr_from_msg(msg); |
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return addr; |
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} |
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static void |
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iop3xx_i2c_reset(struct i2c_algo_iop3xx_data *iop3xx_adap) |
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{ |
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/* Follows devman 9.3 */ |
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__raw_writel(IOP3XX_ICR_UNIT_RESET, iop3xx_adap->ioaddr + CR_OFFSET); |
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__raw_writel(IOP3XX_ISR_CLEARBITS, iop3xx_adap->ioaddr + SR_OFFSET); |
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__raw_writel(0, iop3xx_adap->ioaddr + CR_OFFSET); |
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} |
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static void |
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iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) |
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{ |
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u32 cr = IOP3XX_ICR_GCD | IOP3XX_ICR_SCLEN | IOP3XX_ICR_UE; |
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|
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/* |
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* Every time unit enable is asserted, GPOD needs to be cleared |
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* on IOP3XX to avoid data corruption on the bus. We use the |
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* gpiod_set_raw_value() to make sure the 0 hits the hardware |
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* GPOD register. These descriptors are only passed along to |
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* the device if this is necessary. |
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*/ |
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if (iop3xx_adap->gpio_scl) |
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gpiod_set_raw_value(iop3xx_adap->gpio_scl, 0); |
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if (iop3xx_adap->gpio_sda) |
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gpiod_set_raw_value(iop3xx_adap->gpio_sda, 0); |
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|
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/* NB SR bits not same position as CR IE bits :-( */ |
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iop3xx_adap->SR_enabled = |
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IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD | |
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IOP3XX_ISR_RXFULL | IOP3XX_ISR_TXEMPTY; |
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cr |= IOP3XX_ICR_ALD_IE | IOP3XX_ICR_BERR_IE | |
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IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE; |
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__raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); |
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} |
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static void |
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iop3xx_i2c_transaction_cleanup(struct i2c_algo_iop3xx_data *iop3xx_adap) |
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{ |
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unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); |
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cr &= ~(IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE | |
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IOP3XX_ICR_MSTOP | IOP3XX_ICR_SCLEN); |
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__raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); |
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} |
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|
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/* |
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* NB: the handler has to clear the source of the interrupt! |
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* Then it passes the SR flags of interest to BH via adap data |
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*/ |
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static irqreturn_t |
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iop3xx_i2c_irq_handler(int this_irq, void *dev_id) |
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{ |
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struct i2c_algo_iop3xx_data *iop3xx_adap = dev_id; |
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u32 sr = __raw_readl(iop3xx_adap->ioaddr + SR_OFFSET); |
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if ((sr &= iop3xx_adap->SR_enabled)) { |
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__raw_writel(sr, iop3xx_adap->ioaddr + SR_OFFSET); |
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iop3xx_adap->SR_received |= sr; |
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wake_up_interruptible(&iop3xx_adap->waitq); |
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} |
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return IRQ_HANDLED; |
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} |
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/* check all error conditions, clear them , report most important */ |
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static int |
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iop3xx_i2c_error(u32 sr) |
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{ |
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int rc = 0; |
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if ((sr & IOP3XX_ISR_BERRD)) { |
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if (!rc) |
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rc = -I2C_ERR_BERR; |
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} |
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if ((sr & IOP3XX_ISR_ALD)) { |
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if (!rc) |
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rc = -I2C_ERR_ALD; |
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} |
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return rc; |
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} |
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static inline u32 |
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iop3xx_i2c_get_srstat(struct i2c_algo_iop3xx_data *iop3xx_adap) |
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{ |
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unsigned long flags; |
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u32 sr; |
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spin_lock_irqsave(&iop3xx_adap->lock, flags); |
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sr = iop3xx_adap->SR_received; |
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iop3xx_adap->SR_received = 0; |
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spin_unlock_irqrestore(&iop3xx_adap->lock, flags); |
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return sr; |
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} |
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/* |
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* sleep until interrupted, then recover and analyse the SR |
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* saved by handler |
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*/ |
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typedef int (*compare_func)(unsigned test, unsigned mask); |
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/* returns 1 on correct comparison */ |
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static int |
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iop3xx_i2c_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, |
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unsigned flags, unsigned *status, |
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compare_func compare) |
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{ |
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unsigned sr = 0; |
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int interrupted; |
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int done; |
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int rc = 0; |
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do { |
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interrupted = wait_event_interruptible_timeout ( |
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iop3xx_adap->waitq, |
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(done = compare(sr = iop3xx_i2c_get_srstat(iop3xx_adap), flags)), |
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1 * HZ |
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); |
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if ((rc = iop3xx_i2c_error(sr)) < 0) { |
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*status = sr; |
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return rc; |
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} else if (!interrupted) { |
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*status = sr; |
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return -ETIMEDOUT; |
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} |
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} while (!done); |
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*status = sr; |
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return 0; |
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} |
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/* |
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* Concrete compare_funcs |
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*/ |
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static int |
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all_bits_clear(unsigned test, unsigned mask) |
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{ |
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return (test & mask) == 0; |
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} |
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static int |
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any_bits_set(unsigned test, unsigned mask) |
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{ |
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return (test & mask) != 0; |
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} |
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static int |
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iop3xx_i2c_wait_tx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) |
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{ |
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return iop3xx_i2c_wait_event( |
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iop3xx_adap, |
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IOP3XX_ISR_TXEMPTY | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, |
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status, any_bits_set); |
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} |
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static int |
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iop3xx_i2c_wait_rx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) |
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{ |
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return iop3xx_i2c_wait_event( |
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iop3xx_adap, |
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IOP3XX_ISR_RXFULL | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, |
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status, any_bits_set); |
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} |
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static int |
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iop3xx_i2c_wait_idle(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) |
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{ |
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return iop3xx_i2c_wait_event( |
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iop3xx_adap, IOP3XX_ISR_UNITBUSY, status, all_bits_clear); |
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} |
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static int |
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iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, |
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struct i2c_msg *msg) |
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{ |
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unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); |
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int status; |
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int rc; |
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/* avoid writing to my slave address (hangs on 80331), |
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* forbidden in Intel developer manual |
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*/ |
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if (msg->addr == MYSAR) { |
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return -EBUSY; |
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} |
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__raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET); |
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cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); |
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cr |= IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE; |
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__raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); |
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rc = iop3xx_i2c_wait_tx_done(iop3xx_adap, &status); |
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return rc; |
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} |
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static int |
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iop3xx_i2c_write_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char byte, |
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int stop) |
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{ |
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unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); |
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int status; |
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int rc = 0; |
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__raw_writel(byte, iop3xx_adap->ioaddr + DBR_OFFSET); |
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cr &= ~IOP3XX_ICR_MSTART; |
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if (stop) { |
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cr |= IOP3XX_ICR_MSTOP; |
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} else { |
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cr &= ~IOP3XX_ICR_MSTOP; |
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} |
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cr |= IOP3XX_ICR_TBYTE; |
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__raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); |
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rc = iop3xx_i2c_wait_tx_done(iop3xx_adap, &status); |
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return rc; |
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} |
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static int |
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iop3xx_i2c_read_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char *byte, |
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int stop) |
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{ |
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unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); |
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int status; |
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int rc = 0; |
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cr &= ~IOP3XX_ICR_MSTART; |
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if (stop) { |
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cr |= IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK; |
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} else { |
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cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); |
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} |
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cr |= IOP3XX_ICR_TBYTE; |
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__raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); |
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rc = iop3xx_i2c_wait_rx_done(iop3xx_adap, &status); |
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*byte = __raw_readl(iop3xx_adap->ioaddr + DBR_OFFSET); |
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return rc; |
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} |
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static int |
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iop3xx_i2c_writebytes(struct i2c_adapter *i2c_adap, const char *buf, int count) |
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{ |
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struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; |
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int ii; |
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int rc = 0; |
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for (ii = 0; rc == 0 && ii != count; ++ii) |
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rc = iop3xx_i2c_write_byte(iop3xx_adap, buf[ii], ii == count-1); |
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return rc; |
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} |
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static int |
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iop3xx_i2c_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count) |
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{ |
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struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; |
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int ii; |
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int rc = 0; |
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for (ii = 0; rc == 0 && ii != count; ++ii) |
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rc = iop3xx_i2c_read_byte(iop3xx_adap, &buf[ii], ii == count-1); |
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return rc; |
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} |
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/* |
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* Description: This function implements combined transactions. Combined |
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* transactions consist of combinations of reading and writing blocks of data. |
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* FROM THE SAME ADDRESS |
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* Each transfer (i.e. a read or a write) is separated by a repeated start |
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* condition. |
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*/ |
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static int |
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iop3xx_i2c_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg *pmsg) |
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{ |
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struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; |
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int rc; |
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rc = iop3xx_i2c_send_target_addr(iop3xx_adap, pmsg); |
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if (rc < 0) { |
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return rc; |
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} |
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if ((pmsg->flags&I2C_M_RD)) { |
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return iop3xx_i2c_readbytes(i2c_adap, pmsg->buf, pmsg->len); |
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} else { |
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return iop3xx_i2c_writebytes(i2c_adap, pmsg->buf, pmsg->len); |
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} |
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} |
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/* |
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* master_xfer() - main read/write entry |
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*/ |
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static int |
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iop3xx_i2c_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, |
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int num) |
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{ |
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struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; |
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int im = 0; |
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int ret = 0; |
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int status; |
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iop3xx_i2c_wait_idle(iop3xx_adap, &status); |
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iop3xx_i2c_reset(iop3xx_adap); |
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iop3xx_i2c_enable(iop3xx_adap); |
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|
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for (im = 0; ret == 0 && im != num; im++) { |
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ret = iop3xx_i2c_handle_msg(i2c_adap, &msgs[im]); |
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} |
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iop3xx_i2c_transaction_cleanup(iop3xx_adap); |
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if (ret) |
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return ret; |
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return im; |
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} |
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static u32 |
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iop3xx_i2c_func(struct i2c_adapter *adap) |
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{ |
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
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} |
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static const struct i2c_algorithm iop3xx_i2c_algo = { |
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.master_xfer = iop3xx_i2c_master_xfer, |
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.functionality = iop3xx_i2c_func, |
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}; |
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static int |
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iop3xx_i2c_remove(struct platform_device *pdev) |
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{ |
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struct i2c_adapter *padapter = platform_get_drvdata(pdev); |
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struct i2c_algo_iop3xx_data *adapter_data = |
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(struct i2c_algo_iop3xx_data *)padapter->algo_data; |
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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unsigned long cr = __raw_readl(adapter_data->ioaddr + CR_OFFSET); |
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/* |
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* Disable the actual HW unit |
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*/ |
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cr &= ~(IOP3XX_ICR_ALD_IE | IOP3XX_ICR_BERR_IE | |
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IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE); |
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__raw_writel(cr, adapter_data->ioaddr + CR_OFFSET); |
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|
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iounmap(adapter_data->ioaddr); |
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release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); |
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kfree(adapter_data); |
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kfree(padapter); |
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return 0; |
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} |
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static int |
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iop3xx_i2c_probe(struct platform_device *pdev) |
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{ |
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struct resource *res; |
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int ret, irq; |
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struct i2c_adapter *new_adapter; |
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struct i2c_algo_iop3xx_data *adapter_data; |
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new_adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL); |
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if (!new_adapter) { |
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ret = -ENOMEM; |
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goto out; |
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} |
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adapter_data = kzalloc(sizeof(struct i2c_algo_iop3xx_data), GFP_KERNEL); |
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if (!adapter_data) { |
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ret = -ENOMEM; |
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goto free_adapter; |
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} |
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adapter_data->gpio_scl = devm_gpiod_get_optional(&pdev->dev, |
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"scl", |
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GPIOD_ASIS); |
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if (IS_ERR(adapter_data->gpio_scl)) { |
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ret = PTR_ERR(adapter_data->gpio_scl); |
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goto free_both; |
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} |
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adapter_data->gpio_sda = devm_gpiod_get_optional(&pdev->dev, |
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"sda", |
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GPIOD_ASIS); |
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if (IS_ERR(adapter_data->gpio_sda)) { |
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ret = PTR_ERR(adapter_data->gpio_sda); |
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goto free_both; |
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} |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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if (!res) { |
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ret = -ENODEV; |
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goto free_both; |
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} |
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if (!request_mem_region(res->start, IOP3XX_I2C_IO_SIZE, pdev->name)) { |
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ret = -EBUSY; |
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goto free_both; |
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} |
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/* set the adapter enumeration # */ |
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adapter_data->id = i2c_id++; |
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adapter_data->ioaddr = ioremap(res->start, IOP3XX_I2C_IO_SIZE); |
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if (!adapter_data->ioaddr) { |
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ret = -ENOMEM; |
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goto release_region; |
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} |
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irq = platform_get_irq(pdev, 0); |
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if (irq < 0) { |
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ret = irq; |
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goto unmap; |
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} |
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ret = request_irq(irq, iop3xx_i2c_irq_handler, 0, |
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pdev->name, adapter_data); |
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|
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if (ret) |
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goto unmap; |
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memcpy(new_adapter->name, pdev->name, strlen(pdev->name)); |
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new_adapter->owner = THIS_MODULE; |
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new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; |
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new_adapter->dev.parent = &pdev->dev; |
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new_adapter->dev.of_node = pdev->dev.of_node; |
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new_adapter->nr = pdev->id; |
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|
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/* |
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* Default values...should these come in from board code? |
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*/ |
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new_adapter->timeout = HZ; |
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new_adapter->algo = &iop3xx_i2c_algo; |
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|
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init_waitqueue_head(&adapter_data->waitq); |
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spin_lock_init(&adapter_data->lock); |
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iop3xx_i2c_reset(adapter_data); |
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iop3xx_i2c_enable(adapter_data); |
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platform_set_drvdata(pdev, new_adapter); |
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new_adapter->algo_data = adapter_data; |
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i2c_add_numbered_adapter(new_adapter); |
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|
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return 0; |
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|
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unmap: |
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iounmap(adapter_data->ioaddr); |
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release_region: |
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release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); |
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free_both: |
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kfree(adapter_data); |
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free_adapter: |
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kfree(new_adapter); |
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out: |
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return ret; |
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} |
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static const struct of_device_id i2c_iop3xx_match[] = { |
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{ .compatible = "intel,iop3xx-i2c", }, |
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{ .compatible = "intel,ixp4xx-i2c", }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, i2c_iop3xx_match); |
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|
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static struct platform_driver iop3xx_i2c_driver = { |
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.probe = iop3xx_i2c_probe, |
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.remove = iop3xx_i2c_remove, |
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.driver = { |
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.name = "IOP3xx-I2C", |
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.of_match_table = i2c_iop3xx_match, |
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}, |
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}; |
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|
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module_platform_driver(iop3xx_i2c_driver); |
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MODULE_AUTHOR("D-TACQ Solutions Ltd <www.d-tacq.com>"); |
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MODULE_DESCRIPTION("IOP3xx iic algorithm and driver"); |
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MODULE_LICENSE("GPL"); |
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MODULE_ALIAS("platform:IOP3xx-I2C");
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