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152 lines
3.3 KiB
152 lines
3.3 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* This contains all required hardware related helper functions for |
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* Trace Buffer Extension (TRBE) driver in the coresight framework. |
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* |
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* Copyright (C) 2020 ARM Ltd. |
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* |
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* Author: Anshuman Khandual <[email protected]> |
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*/ |
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#include <linux/coresight.h> |
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#include <linux/device.h> |
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#include <linux/irq.h> |
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#include <linux/kernel.h> |
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#include <linux/of.h> |
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#include <linux/platform_device.h> |
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#include <linux/smp.h> |
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#include "coresight-etm-perf.h" |
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static inline bool is_trbe_available(void) |
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{ |
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u64 aa64dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1); |
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unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0, ID_AA64DFR0_TRBE_SHIFT); |
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return trbe >= 0b0001; |
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} |
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static inline bool is_trbe_enabled(void) |
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{ |
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u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); |
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return trblimitr & TRBLIMITR_ENABLE; |
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} |
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#define TRBE_EC_OTHERS 0 |
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#define TRBE_EC_STAGE1_ABORT 36 |
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#define TRBE_EC_STAGE2_ABORT 37 |
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static inline int get_trbe_ec(u64 trbsr) |
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{ |
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return (trbsr >> TRBSR_EC_SHIFT) & TRBSR_EC_MASK; |
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} |
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#define TRBE_BSC_NOT_STOPPED 0 |
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#define TRBE_BSC_FILLED 1 |
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#define TRBE_BSC_TRIGGERED 2 |
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static inline int get_trbe_bsc(u64 trbsr) |
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{ |
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return (trbsr >> TRBSR_BSC_SHIFT) & TRBSR_BSC_MASK; |
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} |
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static inline void clr_trbe_irq(void) |
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{ |
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u64 trbsr = read_sysreg_s(SYS_TRBSR_EL1); |
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trbsr &= ~TRBSR_IRQ; |
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write_sysreg_s(trbsr, SYS_TRBSR_EL1); |
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} |
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static inline bool is_trbe_irq(u64 trbsr) |
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{ |
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return trbsr & TRBSR_IRQ; |
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} |
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static inline bool is_trbe_trg(u64 trbsr) |
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{ |
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return trbsr & TRBSR_TRG; |
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} |
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static inline bool is_trbe_wrap(u64 trbsr) |
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{ |
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return trbsr & TRBSR_WRAP; |
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} |
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static inline bool is_trbe_abort(u64 trbsr) |
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{ |
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return trbsr & TRBSR_ABORT; |
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} |
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static inline bool is_trbe_running(u64 trbsr) |
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{ |
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return !(trbsr & TRBSR_STOP); |
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} |
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#define TRBE_TRIG_MODE_STOP 0 |
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#define TRBE_TRIG_MODE_IRQ 1 |
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#define TRBE_TRIG_MODE_IGNORE 3 |
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#define TRBE_FILL_MODE_FILL 0 |
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#define TRBE_FILL_MODE_WRAP 1 |
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#define TRBE_FILL_MODE_CIRCULAR_BUFFER 3 |
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static inline void set_trbe_disabled(void) |
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{ |
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u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); |
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trblimitr &= ~TRBLIMITR_ENABLE; |
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write_sysreg_s(trblimitr, SYS_TRBLIMITR_EL1); |
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} |
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static inline bool get_trbe_flag_update(u64 trbidr) |
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{ |
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return trbidr & TRBIDR_FLAG; |
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} |
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static inline bool is_trbe_programmable(u64 trbidr) |
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{ |
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return !(trbidr & TRBIDR_PROG); |
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} |
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static inline int get_trbe_address_align(u64 trbidr) |
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{ |
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return (trbidr >> TRBIDR_ALIGN_SHIFT) & TRBIDR_ALIGN_MASK; |
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} |
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static inline unsigned long get_trbe_write_pointer(void) |
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{ |
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return read_sysreg_s(SYS_TRBPTR_EL1); |
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} |
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static inline void set_trbe_write_pointer(unsigned long addr) |
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{ |
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WARN_ON(is_trbe_enabled()); |
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write_sysreg_s(addr, SYS_TRBPTR_EL1); |
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} |
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static inline unsigned long get_trbe_limit_pointer(void) |
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{ |
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u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); |
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unsigned long addr = trblimitr & (TRBLIMITR_LIMIT_MASK << TRBLIMITR_LIMIT_SHIFT); |
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WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); |
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return addr; |
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} |
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static inline unsigned long get_trbe_base_pointer(void) |
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{ |
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u64 trbbaser = read_sysreg_s(SYS_TRBBASER_EL1); |
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unsigned long addr = trbbaser & (TRBBASER_BASE_MASK << TRBBASER_BASE_SHIFT); |
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WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); |
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return addr; |
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} |
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static inline void set_trbe_base_pointer(unsigned long addr) |
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{ |
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WARN_ON(is_trbe_enabled()); |
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WARN_ON(!IS_ALIGNED(addr, (1UL << TRBBASER_BASE_SHIFT))); |
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WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); |
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write_sysreg_s(addr, SYS_TRBBASER_EL1); |
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}
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