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2502 lines
66 KiB
2502 lines
66 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright(C) 2015 Linaro Limited. All rights reserved. |
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* Author: Mathieu Poirier <[email protected]> |
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*/ |
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|
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#include <linux/pid_namespace.h> |
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#include <linux/pm_runtime.h> |
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#include <linux/sysfs.h> |
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#include "coresight-etm4x.h" |
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#include "coresight-priv.h" |
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#include "coresight-syscfg.h" |
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|
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static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude) |
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{ |
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u8 idx; |
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struct etmv4_config *config = &drvdata->config; |
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|
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idx = config->addr_idx; |
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|
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/* |
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* TRCACATRn.TYPE bit[1:0]: type of comparison |
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* the trace unit performs |
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*/ |
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if (BMVAL(config->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) { |
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if (idx % 2 != 0) |
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return -EINVAL; |
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|
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/* |
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* We are performing instruction address comparison. Set the |
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* relevant bit of ViewInst Include/Exclude Control register |
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* for corresponding address comparator pair. |
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*/ |
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if (config->addr_type[idx] != ETM_ADDR_TYPE_RANGE || |
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config->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE) |
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return -EINVAL; |
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|
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if (exclude == true) { |
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/* |
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* Set exclude bit and unset the include bit |
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* corresponding to comparator pair |
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*/ |
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config->viiectlr |= BIT(idx / 2 + 16); |
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config->viiectlr &= ~BIT(idx / 2); |
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} else { |
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/* |
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* Set include bit and unset exclude bit |
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* corresponding to comparator pair |
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*/ |
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config->viiectlr |= BIT(idx / 2); |
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config->viiectlr &= ~BIT(idx / 2 + 16); |
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} |
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} |
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return 0; |
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} |
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|
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static ssize_t nr_pe_cmp_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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val = drvdata->nr_pe_cmp; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static DEVICE_ATTR_RO(nr_pe_cmp); |
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|
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static ssize_t nr_addr_cmp_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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val = drvdata->nr_addr_cmp; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static DEVICE_ATTR_RO(nr_addr_cmp); |
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|
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static ssize_t nr_cntr_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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val = drvdata->nr_cntr; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static DEVICE_ATTR_RO(nr_cntr); |
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|
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static ssize_t nr_ext_inp_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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val = drvdata->nr_ext_inp; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static DEVICE_ATTR_RO(nr_ext_inp); |
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|
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static ssize_t numcidc_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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val = drvdata->numcidc; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static DEVICE_ATTR_RO(numcidc); |
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|
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static ssize_t numvmidc_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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val = drvdata->numvmidc; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static DEVICE_ATTR_RO(numvmidc); |
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|
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static ssize_t nrseqstate_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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val = drvdata->nrseqstate; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static DEVICE_ATTR_RO(nrseqstate); |
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|
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static ssize_t nr_resource_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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val = drvdata->nr_resource; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static DEVICE_ATTR_RO(nr_resource); |
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|
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static ssize_t nr_ss_cmp_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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val = drvdata->nr_ss_cmp; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static DEVICE_ATTR_RO(nr_ss_cmp); |
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|
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static ssize_t reset_store(struct device *dev, |
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struct device_attribute *attr, |
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const char *buf, size_t size) |
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{ |
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int i; |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct etmv4_config *config = &drvdata->config; |
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|
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if (kstrtoul(buf, 16, &val)) |
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return -EINVAL; |
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|
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spin_lock(&drvdata->spinlock); |
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if (val) |
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config->mode = 0x0; |
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|
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/* Disable data tracing: do not trace load and store data transfers */ |
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config->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE); |
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config->cfg &= ~(BIT(1) | BIT(2)); |
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|
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/* Disable data value and data address tracing */ |
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config->mode &= ~(ETM_MODE_DATA_TRACE_ADDR | |
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ETM_MODE_DATA_TRACE_VAL); |
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config->cfg &= ~(BIT(16) | BIT(17)); |
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|
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/* Disable all events tracing */ |
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config->eventctrl0 = 0x0; |
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config->eventctrl1 = 0x0; |
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|
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/* Disable timestamp event */ |
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config->ts_ctrl = 0x0; |
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|
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/* Disable stalling */ |
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config->stall_ctrl = 0x0; |
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|
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/* Reset trace synchronization period to 2^8 = 256 bytes*/ |
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if (drvdata->syncpr == false) |
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config->syncfreq = 0x8; |
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|
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/* |
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* Enable ViewInst to trace everything with start-stop logic in |
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* started state. ARM recommends start-stop logic is set before |
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* each trace run. |
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*/ |
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config->vinst_ctrl = BIT(0); |
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if (drvdata->nr_addr_cmp > 0) { |
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config->mode |= ETM_MODE_VIEWINST_STARTSTOP; |
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/* SSSTATUS, bit[9] */ |
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config->vinst_ctrl |= BIT(9); |
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} |
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|
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/* No address range filtering for ViewInst */ |
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config->viiectlr = 0x0; |
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|
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/* No start-stop filtering for ViewInst */ |
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config->vissctlr = 0x0; |
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config->vipcssctlr = 0x0; |
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|
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/* Disable seq events */ |
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for (i = 0; i < drvdata->nrseqstate-1; i++) |
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config->seq_ctrl[i] = 0x0; |
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config->seq_rst = 0x0; |
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config->seq_state = 0x0; |
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|
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/* Disable external input events */ |
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config->ext_inp = 0x0; |
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config->cntr_idx = 0x0; |
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for (i = 0; i < drvdata->nr_cntr; i++) { |
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config->cntrldvr[i] = 0x0; |
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config->cntr_ctrl[i] = 0x0; |
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config->cntr_val[i] = 0x0; |
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} |
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config->res_idx = 0x0; |
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for (i = 2; i < 2 * drvdata->nr_resource; i++) |
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config->res_ctrl[i] = 0x0; |
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|
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config->ss_idx = 0x0; |
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for (i = 0; i < drvdata->nr_ss_cmp; i++) { |
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config->ss_ctrl[i] = 0x0; |
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config->ss_pe_cmp[i] = 0x0; |
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} |
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config->addr_idx = 0x0; |
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for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) { |
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config->addr_val[i] = 0x0; |
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config->addr_acc[i] = 0x0; |
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config->addr_type[i] = ETM_ADDR_TYPE_NONE; |
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} |
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config->ctxid_idx = 0x0; |
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for (i = 0; i < drvdata->numcidc; i++) |
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config->ctxid_pid[i] = 0x0; |
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|
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config->ctxid_mask0 = 0x0; |
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config->ctxid_mask1 = 0x0; |
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config->vmid_idx = 0x0; |
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for (i = 0; i < drvdata->numvmidc; i++) |
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config->vmid_val[i] = 0x0; |
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config->vmid_mask0 = 0x0; |
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config->vmid_mask1 = 0x0; |
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|
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drvdata->trcid = drvdata->cpu + 1; |
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spin_unlock(&drvdata->spinlock); |
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cscfg_csdev_reset_feats(to_coresight_device(dev)); |
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return size; |
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} |
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static DEVICE_ATTR_WO(reset); |
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static ssize_t mode_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct etmv4_config *config = &drvdata->config; |
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val = config->mode; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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static ssize_t mode_store(struct device *dev, |
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struct device_attribute *attr, |
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const char *buf, size_t size) |
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{ |
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unsigned long val, mode; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct etmv4_config *config = &drvdata->config; |
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if (kstrtoul(buf, 16, &val)) |
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return -EINVAL; |
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spin_lock(&drvdata->spinlock); |
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config->mode = val & ETMv4_MODE_ALL; |
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if (drvdata->instrp0 == true) { |
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/* start by clearing instruction P0 field */ |
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config->cfg &= ~(BIT(1) | BIT(2)); |
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if (config->mode & ETM_MODE_LOAD) |
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/* 0b01 Trace load instructions as P0 instructions */ |
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config->cfg |= BIT(1); |
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if (config->mode & ETM_MODE_STORE) |
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/* 0b10 Trace store instructions as P0 instructions */ |
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config->cfg |= BIT(2); |
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if (config->mode & ETM_MODE_LOAD_STORE) |
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/* |
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* 0b11 Trace load and store instructions |
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* as P0 instructions |
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*/ |
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config->cfg |= BIT(1) | BIT(2); |
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} |
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|
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/* bit[3], Branch broadcast mode */ |
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if ((config->mode & ETM_MODE_BB) && (drvdata->trcbb == true)) |
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config->cfg |= BIT(3); |
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else |
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config->cfg &= ~BIT(3); |
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|
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/* bit[4], Cycle counting instruction trace bit */ |
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if ((config->mode & ETMv4_MODE_CYCACC) && |
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(drvdata->trccci == true)) |
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config->cfg |= BIT(4); |
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else |
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config->cfg &= ~BIT(4); |
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|
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/* bit[6], Context ID tracing bit */ |
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if ((config->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size)) |
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config->cfg |= BIT(6); |
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else |
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config->cfg &= ~BIT(6); |
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|
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if ((config->mode & ETM_MODE_VMID) && (drvdata->vmid_size)) |
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config->cfg |= BIT(7); |
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else |
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config->cfg &= ~BIT(7); |
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|
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/* bits[10:8], Conditional instruction tracing bit */ |
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mode = ETM_MODE_COND(config->mode); |
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if (drvdata->trccond == true) { |
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config->cfg &= ~(BIT(8) | BIT(9) | BIT(10)); |
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config->cfg |= mode << 8; |
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} |
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|
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/* bit[11], Global timestamp tracing bit */ |
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if ((config->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size)) |
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config->cfg |= BIT(11); |
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else |
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config->cfg &= ~BIT(11); |
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|
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/* bit[12], Return stack enable bit */ |
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if ((config->mode & ETM_MODE_RETURNSTACK) && |
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(drvdata->retstack == true)) |
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config->cfg |= BIT(12); |
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else |
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config->cfg &= ~BIT(12); |
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|
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/* bits[14:13], Q element enable field */ |
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mode = ETM_MODE_QELEM(config->mode); |
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/* start by clearing QE bits */ |
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config->cfg &= ~(BIT(13) | BIT(14)); |
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/* if supported, Q elements with instruction counts are enabled */ |
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if ((mode & BIT(0)) && (drvdata->q_support & BIT(0))) |
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config->cfg |= BIT(13); |
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/* |
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* if supported, Q elements with and without instruction |
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* counts are enabled |
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*/ |
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if ((mode & BIT(1)) && (drvdata->q_support & BIT(1))) |
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config->cfg |= BIT(14); |
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|
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/* bit[11], AMBA Trace Bus (ATB) trigger enable bit */ |
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if ((config->mode & ETM_MODE_ATB_TRIGGER) && |
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(drvdata->atbtrig == true)) |
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config->eventctrl1 |= BIT(11); |
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else |
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config->eventctrl1 &= ~BIT(11); |
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|
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/* bit[12], Low-power state behavior override bit */ |
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if ((config->mode & ETM_MODE_LPOVERRIDE) && |
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(drvdata->lpoverride == true)) |
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config->eventctrl1 |= BIT(12); |
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else |
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config->eventctrl1 &= ~BIT(12); |
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|
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/* bit[8], Instruction stall bit */ |
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if ((config->mode & ETM_MODE_ISTALL_EN) && (drvdata->stallctl == true)) |
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config->stall_ctrl |= BIT(8); |
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else |
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config->stall_ctrl &= ~BIT(8); |
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|
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/* bit[10], Prioritize instruction trace bit */ |
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if (config->mode & ETM_MODE_INSTPRIO) |
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config->stall_ctrl |= BIT(10); |
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else |
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config->stall_ctrl &= ~BIT(10); |
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|
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/* bit[13], Trace overflow prevention bit */ |
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if ((config->mode & ETM_MODE_NOOVERFLOW) && |
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(drvdata->nooverflow == true)) |
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config->stall_ctrl |= BIT(13); |
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else |
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config->stall_ctrl &= ~BIT(13); |
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|
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/* bit[9] Start/stop logic control bit */ |
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if (config->mode & ETM_MODE_VIEWINST_STARTSTOP) |
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config->vinst_ctrl |= BIT(9); |
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else |
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config->vinst_ctrl &= ~BIT(9); |
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|
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/* bit[10], Whether a trace unit must trace a Reset exception */ |
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if (config->mode & ETM_MODE_TRACE_RESET) |
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config->vinst_ctrl |= BIT(10); |
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else |
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config->vinst_ctrl &= ~BIT(10); |
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|
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/* bit[11], Whether a trace unit must trace a system error exception */ |
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if ((config->mode & ETM_MODE_TRACE_ERR) && |
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(drvdata->trc_error == true)) |
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config->vinst_ctrl |= BIT(11); |
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else |
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config->vinst_ctrl &= ~BIT(11); |
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|
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if (config->mode & (ETM_MODE_EXCL_KERN | ETM_MODE_EXCL_USER)) |
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etm4_config_trace_mode(config); |
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|
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spin_unlock(&drvdata->spinlock); |
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|
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return size; |
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} |
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static DEVICE_ATTR_RW(mode); |
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|
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static ssize_t pe_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct etmv4_config *config = &drvdata->config; |
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|
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val = config->pe_sel; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
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|
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static ssize_t pe_store(struct device *dev, |
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struct device_attribute *attr, |
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const char *buf, size_t size) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct etmv4_config *config = &drvdata->config; |
|
|
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if (kstrtoul(buf, 16, &val)) |
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return -EINVAL; |
|
|
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spin_lock(&drvdata->spinlock); |
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if (val > drvdata->nr_pe) { |
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spin_unlock(&drvdata->spinlock); |
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return -EINVAL; |
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} |
|
|
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config->pe_sel = val; |
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spin_unlock(&drvdata->spinlock); |
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return size; |
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} |
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static DEVICE_ATTR_RW(pe); |
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|
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static ssize_t event_show(struct device *dev, |
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struct device_attribute *attr, |
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char *buf) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct etmv4_config *config = &drvdata->config; |
|
|
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val = config->eventctrl0; |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
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} |
|
|
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static ssize_t event_store(struct device *dev, |
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struct device_attribute *attr, |
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const char *buf, size_t size) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct etmv4_config *config = &drvdata->config; |
|
|
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if (kstrtoul(buf, 16, &val)) |
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return -EINVAL; |
|
|
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spin_lock(&drvdata->spinlock); |
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switch (drvdata->nr_event) { |
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case 0x0: |
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/* EVENT0, bits[7:0] */ |
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config->eventctrl0 = val & 0xFF; |
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break; |
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case 0x1: |
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/* EVENT1, bits[15:8] */ |
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config->eventctrl0 = val & 0xFFFF; |
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break; |
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case 0x2: |
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/* EVENT2, bits[23:16] */ |
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config->eventctrl0 = val & 0xFFFFFF; |
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break; |
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case 0x3: |
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/* EVENT3, bits[31:24] */ |
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config->eventctrl0 = val; |
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break; |
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default: |
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break; |
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} |
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spin_unlock(&drvdata->spinlock); |
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return size; |
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} |
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static DEVICE_ATTR_RW(event); |
|
|
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static ssize_t event_instren_show(struct device *dev, |
|
struct device_attribute *attr, |
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char *buf) |
|
{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct etmv4_config *config = &drvdata->config; |
|
|
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val = BMVAL(config->eventctrl1, 0, 3); |
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
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static ssize_t event_instren_store(struct device *dev, |
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struct device_attribute *attr, |
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const char *buf, size_t size) |
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{ |
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unsigned long val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct etmv4_config *config = &drvdata->config; |
|
|
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if (kstrtoul(buf, 16, &val)) |
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return -EINVAL; |
|
|
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spin_lock(&drvdata->spinlock); |
|
/* start by clearing all instruction event enable bits */ |
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config->eventctrl1 &= ~(BIT(0) | BIT(1) | BIT(2) | BIT(3)); |
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switch (drvdata->nr_event) { |
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case 0x0: |
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/* generate Event element for event 1 */ |
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config->eventctrl1 |= val & BIT(1); |
|
break; |
|
case 0x1: |
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/* generate Event element for event 1 and 2 */ |
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config->eventctrl1 |= val & (BIT(0) | BIT(1)); |
|
break; |
|
case 0x2: |
|
/* generate Event element for event 1, 2 and 3 */ |
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config->eventctrl1 |= val & (BIT(0) | BIT(1) | BIT(2)); |
|
break; |
|
case 0x3: |
|
/* generate Event element for all 4 events */ |
|
config->eventctrl1 |= val & 0xF; |
|
break; |
|
default: |
|
break; |
|
} |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(event_instren); |
|
|
|
static ssize_t event_ts_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->ts_ctrl; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t event_ts_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (!drvdata->ts_size) |
|
return -EINVAL; |
|
|
|
config->ts_ctrl = val & ETMv4_EVENT_MASK; |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(event_ts); |
|
|
|
static ssize_t syncfreq_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->syncfreq; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t syncfreq_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (drvdata->syncpr == true) |
|
return -EINVAL; |
|
|
|
config->syncfreq = val & ETMv4_SYNC_MASK; |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(syncfreq); |
|
|
|
static ssize_t cyc_threshold_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->ccctlr; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t cyc_threshold_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
/* mask off max threshold before checking min value */ |
|
val &= ETM_CYC_THRESHOLD_MASK; |
|
if (val < drvdata->ccitmin) |
|
return -EINVAL; |
|
|
|
config->ccctlr = val; |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(cyc_threshold); |
|
|
|
static ssize_t bb_ctrl_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->bb_ctrl; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t bb_ctrl_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (drvdata->trcbb == false) |
|
return -EINVAL; |
|
if (!drvdata->nr_addr_cmp) |
|
return -EINVAL; |
|
|
|
/* |
|
* Bit[8] controls include(1) / exclude(0), bits[0-7] select |
|
* individual range comparators. If include then at least 1 |
|
* range must be selected. |
|
*/ |
|
if ((val & BIT(8)) && (BMVAL(val, 0, 7) == 0)) |
|
return -EINVAL; |
|
|
|
config->bb_ctrl = val & GENMASK(8, 0); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(bb_ctrl); |
|
|
|
static ssize_t event_vinst_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->vinst_ctrl & ETMv4_EVENT_MASK; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t event_vinst_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
val &= ETMv4_EVENT_MASK; |
|
config->vinst_ctrl &= ~ETMv4_EVENT_MASK; |
|
config->vinst_ctrl |= val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(event_vinst); |
|
|
|
static ssize_t s_exlevel_vinst_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = (config->vinst_ctrl & TRCVICTLR_EXLEVEL_S_MASK) >> TRCVICTLR_EXLEVEL_S_SHIFT; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t s_exlevel_vinst_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
/* clear all EXLEVEL_S bits */ |
|
config->vinst_ctrl &= ~(TRCVICTLR_EXLEVEL_S_MASK); |
|
/* enable instruction tracing for corresponding exception level */ |
|
val &= drvdata->s_ex_level; |
|
config->vinst_ctrl |= (val << TRCVICTLR_EXLEVEL_S_SHIFT); |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(s_exlevel_vinst); |
|
|
|
static ssize_t ns_exlevel_vinst_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
/* EXLEVEL_NS, bits[23:20] */ |
|
val = (config->vinst_ctrl & TRCVICTLR_EXLEVEL_NS_MASK) >> TRCVICTLR_EXLEVEL_NS_SHIFT; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t ns_exlevel_vinst_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
/* clear EXLEVEL_NS bits */ |
|
config->vinst_ctrl &= ~(TRCVICTLR_EXLEVEL_NS_MASK); |
|
/* enable instruction tracing for corresponding exception level */ |
|
val &= drvdata->ns_ex_level; |
|
config->vinst_ctrl |= (val << TRCVICTLR_EXLEVEL_NS_SHIFT); |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(ns_exlevel_vinst); |
|
|
|
static ssize_t addr_idx_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->addr_idx; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t addr_idx_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (val >= drvdata->nr_addr_cmp * 2) |
|
return -EINVAL; |
|
|
|
/* |
|
* Use spinlock to ensure index doesn't change while it gets |
|
* dereferenced multiple times within a spinlock block elsewhere. |
|
*/ |
|
spin_lock(&drvdata->spinlock); |
|
config->addr_idx = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(addr_idx); |
|
|
|
static ssize_t addr_instdatatype_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
ssize_t len; |
|
u8 val, idx; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
val = BMVAL(config->addr_acc[idx], 0, 1); |
|
len = scnprintf(buf, PAGE_SIZE, "%s\n", |
|
val == ETM_INSTR_ADDR ? "instr" : |
|
(val == ETM_DATA_LOAD_ADDR ? "data_load" : |
|
(val == ETM_DATA_STORE_ADDR ? "data_store" : |
|
"data_load_store"))); |
|
spin_unlock(&drvdata->spinlock); |
|
return len; |
|
} |
|
|
|
static ssize_t addr_instdatatype_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
char str[20] = ""; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (strlen(buf) >= 20) |
|
return -EINVAL; |
|
if (sscanf(buf, "%s", str) != 1) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
if (!strcmp(str, "instr")) |
|
/* TYPE, bits[1:0] */ |
|
config->addr_acc[idx] &= ~(BIT(0) | BIT(1)); |
|
|
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(addr_instdatatype); |
|
|
|
static ssize_t addr_single_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
idx = config->addr_idx; |
|
spin_lock(&drvdata->spinlock); |
|
if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE || |
|
config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
val = (unsigned long)config->addr_val[idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t addr_single_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE || |
|
config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
|
|
config->addr_val[idx] = (u64)val; |
|
config->addr_type[idx] = ETM_ADDR_TYPE_SINGLE; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(addr_single); |
|
|
|
static ssize_t addr_range_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val1, val2; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
if (idx % 2 != 0) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE && |
|
config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || |
|
(config->addr_type[idx] == ETM_ADDR_TYPE_RANGE && |
|
config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
|
|
val1 = (unsigned long)config->addr_val[idx]; |
|
val2 = (unsigned long)config->addr_val[idx + 1]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); |
|
} |
|
|
|
static ssize_t addr_range_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val1, val2; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
int elements, exclude; |
|
|
|
elements = sscanf(buf, "%lx %lx %x", &val1, &val2, &exclude); |
|
|
|
/* exclude is optional, but need at least two parameter */ |
|
if (elements < 2) |
|
return -EINVAL; |
|
/* lower address comparator cannot have a higher address value */ |
|
if (val1 > val2) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
if (idx % 2 != 0) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
|
|
if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE && |
|
config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) || |
|
(config->addr_type[idx] == ETM_ADDR_TYPE_RANGE && |
|
config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
|
|
config->addr_val[idx] = (u64)val1; |
|
config->addr_type[idx] = ETM_ADDR_TYPE_RANGE; |
|
config->addr_val[idx + 1] = (u64)val2; |
|
config->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE; |
|
/* |
|
* Program include or exclude control bits for vinst or vdata |
|
* whenever we change addr comparators to ETM_ADDR_TYPE_RANGE |
|
* use supplied value, or default to bit set in 'mode' |
|
*/ |
|
if (elements != 3) |
|
exclude = config->mode & ETM_MODE_EXCLUDE; |
|
etm4_set_mode_exclude(drvdata, exclude ? true : false); |
|
|
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(addr_range); |
|
|
|
static ssize_t addr_start_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
|
|
if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE || |
|
config->addr_type[idx] == ETM_ADDR_TYPE_START)) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
|
|
val = (unsigned long)config->addr_val[idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t addr_start_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
if (!drvdata->nr_addr_cmp) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EINVAL; |
|
} |
|
if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE || |
|
config->addr_type[idx] == ETM_ADDR_TYPE_START)) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
|
|
config->addr_val[idx] = (u64)val; |
|
config->addr_type[idx] = ETM_ADDR_TYPE_START; |
|
config->vissctlr |= BIT(idx); |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(addr_start); |
|
|
|
static ssize_t addr_stop_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
|
|
if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE || |
|
config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
|
|
val = (unsigned long)config->addr_val[idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t addr_stop_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
if (!drvdata->nr_addr_cmp) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EINVAL; |
|
} |
|
if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE || |
|
config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) { |
|
spin_unlock(&drvdata->spinlock); |
|
return -EPERM; |
|
} |
|
|
|
config->addr_val[idx] = (u64)val; |
|
config->addr_type[idx] = ETM_ADDR_TYPE_STOP; |
|
config->vissctlr |= BIT(idx + 16); |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(addr_stop); |
|
|
|
static ssize_t addr_ctxtype_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
ssize_t len; |
|
u8 idx, val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
/* CONTEXTTYPE, bits[3:2] */ |
|
val = BMVAL(config->addr_acc[idx], 2, 3); |
|
len = scnprintf(buf, PAGE_SIZE, "%s\n", val == ETM_CTX_NONE ? "none" : |
|
(val == ETM_CTX_CTXID ? "ctxid" : |
|
(val == ETM_CTX_VMID ? "vmid" : "all"))); |
|
spin_unlock(&drvdata->spinlock); |
|
return len; |
|
} |
|
|
|
static ssize_t addr_ctxtype_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
char str[10] = ""; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (strlen(buf) >= 10) |
|
return -EINVAL; |
|
if (sscanf(buf, "%s", str) != 1) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
if (!strcmp(str, "none")) |
|
/* start by clearing context type bits */ |
|
config->addr_acc[idx] &= ~(BIT(2) | BIT(3)); |
|
else if (!strcmp(str, "ctxid")) { |
|
/* 0b01 The trace unit performs a Context ID */ |
|
if (drvdata->numcidc) { |
|
config->addr_acc[idx] |= BIT(2); |
|
config->addr_acc[idx] &= ~BIT(3); |
|
} |
|
} else if (!strcmp(str, "vmid")) { |
|
/* 0b10 The trace unit performs a VMID */ |
|
if (drvdata->numvmidc) { |
|
config->addr_acc[idx] &= ~BIT(2); |
|
config->addr_acc[idx] |= BIT(3); |
|
} |
|
} else if (!strcmp(str, "all")) { |
|
/* |
|
* 0b11 The trace unit performs a Context ID |
|
* comparison and a VMID |
|
*/ |
|
if (drvdata->numcidc) |
|
config->addr_acc[idx] |= BIT(2); |
|
if (drvdata->numvmidc) |
|
config->addr_acc[idx] |= BIT(3); |
|
} |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(addr_ctxtype); |
|
|
|
static ssize_t addr_context_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
/* context ID comparator bits[6:4] */ |
|
val = BMVAL(config->addr_acc[idx], 4, 6); |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t addr_context_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1)) |
|
return -EINVAL; |
|
if (val >= (drvdata->numcidc >= drvdata->numvmidc ? |
|
drvdata->numcidc : drvdata->numvmidc)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
/* clear context ID comparator bits[6:4] */ |
|
config->addr_acc[idx] &= ~(BIT(4) | BIT(5) | BIT(6)); |
|
config->addr_acc[idx] |= (val << 4); |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(addr_context); |
|
|
|
static ssize_t addr_exlevel_s_ns_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
val = BMVAL(config->addr_acc[idx], 8, 14); |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t addr_exlevel_s_ns_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 0, &val)) |
|
return -EINVAL; |
|
|
|
if (val & ~((GENMASK(14, 8) >> 8))) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
/* clear Exlevel_ns & Exlevel_s bits[14:12, 11:8], bit[15] is res0 */ |
|
config->addr_acc[idx] &= ~(GENMASK(14, 8)); |
|
config->addr_acc[idx] |= (val << 8); |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(addr_exlevel_s_ns); |
|
|
|
static const char * const addr_type_names[] = { |
|
"unused", |
|
"single", |
|
"range", |
|
"start", |
|
"stop" |
|
}; |
|
|
|
static ssize_t addr_cmp_view_show(struct device *dev, |
|
struct device_attribute *attr, char *buf) |
|
{ |
|
u8 idx, addr_type; |
|
unsigned long addr_v, addr_v2, addr_ctrl; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
int size = 0; |
|
bool exclude = false; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->addr_idx; |
|
addr_v = config->addr_val[idx]; |
|
addr_ctrl = config->addr_acc[idx]; |
|
addr_type = config->addr_type[idx]; |
|
if (addr_type == ETM_ADDR_TYPE_RANGE) { |
|
if (idx & 0x1) { |
|
idx -= 1; |
|
addr_v2 = addr_v; |
|
addr_v = config->addr_val[idx]; |
|
} else { |
|
addr_v2 = config->addr_val[idx + 1]; |
|
} |
|
exclude = config->viiectlr & BIT(idx / 2 + 16); |
|
} |
|
spin_unlock(&drvdata->spinlock); |
|
if (addr_type) { |
|
size = scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] %s %#lx", idx, |
|
addr_type_names[addr_type], addr_v); |
|
if (addr_type == ETM_ADDR_TYPE_RANGE) { |
|
size += scnprintf(buf + size, PAGE_SIZE - size, |
|
" %#lx %s", addr_v2, |
|
exclude ? "exclude" : "include"); |
|
} |
|
size += scnprintf(buf + size, PAGE_SIZE - size, |
|
" ctrl(%#lx)\n", addr_ctrl); |
|
} else { |
|
size = scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] unused\n", idx); |
|
} |
|
return size; |
|
} |
|
static DEVICE_ATTR_RO(addr_cmp_view); |
|
|
|
static ssize_t vinst_pe_cmp_start_stop_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (!drvdata->nr_pe_cmp) |
|
return -EINVAL; |
|
val = config->vipcssctlr; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
static ssize_t vinst_pe_cmp_start_stop_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (!drvdata->nr_pe_cmp) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
config->vipcssctlr = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(vinst_pe_cmp_start_stop); |
|
|
|
static ssize_t seq_idx_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->seq_idx; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t seq_idx_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (val >= drvdata->nrseqstate - 1) |
|
return -EINVAL; |
|
|
|
/* |
|
* Use spinlock to ensure index doesn't change while it gets |
|
* dereferenced multiple times within a spinlock block elsewhere. |
|
*/ |
|
spin_lock(&drvdata->spinlock); |
|
config->seq_idx = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(seq_idx); |
|
|
|
static ssize_t seq_state_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->seq_state; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t seq_state_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (val >= drvdata->nrseqstate) |
|
return -EINVAL; |
|
|
|
config->seq_state = val; |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(seq_state); |
|
|
|
static ssize_t seq_event_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->seq_idx; |
|
val = config->seq_ctrl[idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t seq_event_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->seq_idx; |
|
/* Seq control has two masks B[15:8] F[7:0] */ |
|
config->seq_ctrl[idx] = val & 0xFFFF; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(seq_event); |
|
|
|
static ssize_t seq_reset_event_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->seq_rst; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t seq_reset_event_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (!(drvdata->nrseqstate)) |
|
return -EINVAL; |
|
|
|
config->seq_rst = val & ETMv4_EVENT_MASK; |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(seq_reset_event); |
|
|
|
static ssize_t cntr_idx_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->cntr_idx; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t cntr_idx_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (val >= drvdata->nr_cntr) |
|
return -EINVAL; |
|
|
|
/* |
|
* Use spinlock to ensure index doesn't change while it gets |
|
* dereferenced multiple times within a spinlock block elsewhere. |
|
*/ |
|
spin_lock(&drvdata->spinlock); |
|
config->cntr_idx = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(cntr_idx); |
|
|
|
static ssize_t cntrldvr_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->cntr_idx; |
|
val = config->cntrldvr[idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t cntrldvr_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (val > ETM_CNTR_MAX_VAL) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->cntr_idx; |
|
config->cntrldvr[idx] = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(cntrldvr); |
|
|
|
static ssize_t cntr_val_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->cntr_idx; |
|
val = config->cntr_val[idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t cntr_val_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (val > ETM_CNTR_MAX_VAL) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->cntr_idx; |
|
config->cntr_val[idx] = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(cntr_val); |
|
|
|
static ssize_t cntr_ctrl_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->cntr_idx; |
|
val = config->cntr_ctrl[idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t cntr_ctrl_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->cntr_idx; |
|
config->cntr_ctrl[idx] = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(cntr_ctrl); |
|
|
|
static ssize_t res_idx_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->res_idx; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t res_idx_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
/* |
|
* Resource selector pair 0 is always implemented and reserved, |
|
* namely an idx with 0 and 1 is illegal. |
|
*/ |
|
if ((val < 2) || (val >= 2 * drvdata->nr_resource)) |
|
return -EINVAL; |
|
|
|
/* |
|
* Use spinlock to ensure index doesn't change while it gets |
|
* dereferenced multiple times within a spinlock block elsewhere. |
|
*/ |
|
spin_lock(&drvdata->spinlock); |
|
config->res_idx = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(res_idx); |
|
|
|
static ssize_t res_ctrl_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->res_idx; |
|
val = config->res_ctrl[idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t res_ctrl_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->res_idx; |
|
/* For odd idx pair inversal bit is RES0 */ |
|
if (idx % 2 != 0) |
|
/* PAIRINV, bit[21] */ |
|
val &= ~BIT(21); |
|
config->res_ctrl[idx] = val & GENMASK(21, 0); |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(res_ctrl); |
|
|
|
static ssize_t sshot_idx_show(struct device *dev, |
|
struct device_attribute *attr, char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->ss_idx; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t sshot_idx_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (val >= drvdata->nr_ss_cmp) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
config->ss_idx = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(sshot_idx); |
|
|
|
static ssize_t sshot_ctrl_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
val = config->ss_ctrl[config->ss_idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t sshot_ctrl_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->ss_idx; |
|
config->ss_ctrl[idx] = val & GENMASK(24, 0); |
|
/* must clear bit 31 in related status register on programming */ |
|
config->ss_status[idx] &= ~BIT(31); |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(sshot_ctrl); |
|
|
|
static ssize_t sshot_status_show(struct device *dev, |
|
struct device_attribute *attr, char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
val = config->ss_status[config->ss_idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
static DEVICE_ATTR_RO(sshot_status); |
|
|
|
static ssize_t sshot_pe_ctrl_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
val = config->ss_pe_cmp[config->ss_idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t sshot_pe_ctrl_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->ss_idx; |
|
config->ss_pe_cmp[idx] = val & GENMASK(7, 0); |
|
/* must clear bit 31 in related status register on programming */ |
|
config->ss_status[idx] &= ~BIT(31); |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(sshot_pe_ctrl); |
|
|
|
static ssize_t ctxid_idx_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->ctxid_idx; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t ctxid_idx_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (val >= drvdata->numcidc) |
|
return -EINVAL; |
|
|
|
/* |
|
* Use spinlock to ensure index doesn't change while it gets |
|
* dereferenced multiple times within a spinlock block elsewhere. |
|
*/ |
|
spin_lock(&drvdata->spinlock); |
|
config->ctxid_idx = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(ctxid_idx); |
|
|
|
static ssize_t ctxid_pid_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
u8 idx; |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
/* |
|
* Don't use contextID tracing if coming from a PID namespace. See |
|
* comment in ctxid_pid_store(). |
|
*/ |
|
if (task_active_pid_ns(current) != &init_pid_ns) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->ctxid_idx; |
|
val = (unsigned long)config->ctxid_pid[idx]; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t ctxid_pid_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 idx; |
|
unsigned long pid; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
/* |
|
* When contextID tracing is enabled the tracers will insert the |
|
* value found in the contextID register in the trace stream. But if |
|
* a process is in a namespace the PID of that process as seen from the |
|
* namespace won't be what the kernel sees, something that makes the |
|
* feature confusing and can potentially leak kernel only information. |
|
* As such refuse to use the feature if @current is not in the initial |
|
* PID namespace. |
|
*/ |
|
if (task_active_pid_ns(current) != &init_pid_ns) |
|
return -EINVAL; |
|
|
|
/* |
|
* only implemented when ctxid tracing is enabled, i.e. at least one |
|
* ctxid comparator is implemented and ctxid is greater than 0 bits |
|
* in length |
|
*/ |
|
if (!drvdata->ctxid_size || !drvdata->numcidc) |
|
return -EINVAL; |
|
if (kstrtoul(buf, 16, &pid)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
idx = config->ctxid_idx; |
|
config->ctxid_pid[idx] = (u64)pid; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(ctxid_pid); |
|
|
|
static ssize_t ctxid_masks_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val1, val2; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
/* |
|
* Don't use contextID tracing if coming from a PID namespace. See |
|
* comment in ctxid_pid_store(). |
|
*/ |
|
if (task_active_pid_ns(current) != &init_pid_ns) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
val1 = config->ctxid_mask0; |
|
val2 = config->ctxid_mask1; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); |
|
} |
|
|
|
static ssize_t ctxid_masks_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 i, j, maskbyte; |
|
unsigned long val1, val2, mask; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
int nr_inputs; |
|
|
|
/* |
|
* Don't use contextID tracing if coming from a PID namespace. See |
|
* comment in ctxid_pid_store(). |
|
*/ |
|
if (task_active_pid_ns(current) != &init_pid_ns) |
|
return -EINVAL; |
|
|
|
/* |
|
* only implemented when ctxid tracing is enabled, i.e. at least one |
|
* ctxid comparator is implemented and ctxid is greater than 0 bits |
|
* in length |
|
*/ |
|
if (!drvdata->ctxid_size || !drvdata->numcidc) |
|
return -EINVAL; |
|
/* one mask if <= 4 comparators, two for up to 8 */ |
|
nr_inputs = sscanf(buf, "%lx %lx", &val1, &val2); |
|
if ((drvdata->numcidc > 4) && (nr_inputs != 2)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
/* |
|
* each byte[0..3] controls mask value applied to ctxid |
|
* comparator[0..3] |
|
*/ |
|
switch (drvdata->numcidc) { |
|
case 0x1: |
|
/* COMP0, bits[7:0] */ |
|
config->ctxid_mask0 = val1 & 0xFF; |
|
break; |
|
case 0x2: |
|
/* COMP1, bits[15:8] */ |
|
config->ctxid_mask0 = val1 & 0xFFFF; |
|
break; |
|
case 0x3: |
|
/* COMP2, bits[23:16] */ |
|
config->ctxid_mask0 = val1 & 0xFFFFFF; |
|
break; |
|
case 0x4: |
|
/* COMP3, bits[31:24] */ |
|
config->ctxid_mask0 = val1; |
|
break; |
|
case 0x5: |
|
/* COMP4, bits[7:0] */ |
|
config->ctxid_mask0 = val1; |
|
config->ctxid_mask1 = val2 & 0xFF; |
|
break; |
|
case 0x6: |
|
/* COMP5, bits[15:8] */ |
|
config->ctxid_mask0 = val1; |
|
config->ctxid_mask1 = val2 & 0xFFFF; |
|
break; |
|
case 0x7: |
|
/* COMP6, bits[23:16] */ |
|
config->ctxid_mask0 = val1; |
|
config->ctxid_mask1 = val2 & 0xFFFFFF; |
|
break; |
|
case 0x8: |
|
/* COMP7, bits[31:24] */ |
|
config->ctxid_mask0 = val1; |
|
config->ctxid_mask1 = val2; |
|
break; |
|
default: |
|
break; |
|
} |
|
/* |
|
* If software sets a mask bit to 1, it must program relevant byte |
|
* of ctxid comparator value 0x0, otherwise behavior is unpredictable. |
|
* For example, if bit[3] of ctxid_mask0 is 1, we must clear bits[31:24] |
|
* of ctxid comparator0 value (corresponding to byte 0) register. |
|
*/ |
|
mask = config->ctxid_mask0; |
|
for (i = 0; i < drvdata->numcidc; i++) { |
|
/* mask value of corresponding ctxid comparator */ |
|
maskbyte = mask & ETMv4_EVENT_MASK; |
|
/* |
|
* each bit corresponds to a byte of respective ctxid comparator |
|
* value register |
|
*/ |
|
for (j = 0; j < 8; j++) { |
|
if (maskbyte & 1) |
|
config->ctxid_pid[i] &= ~(0xFFUL << (j * 8)); |
|
maskbyte >>= 1; |
|
} |
|
/* Select the next ctxid comparator mask value */ |
|
if (i == 3) |
|
/* ctxid comparators[4-7] */ |
|
mask = config->ctxid_mask1; |
|
else |
|
mask >>= 0x8; |
|
} |
|
|
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(ctxid_masks); |
|
|
|
static ssize_t vmid_idx_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = config->vmid_idx; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t vmid_idx_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
if (val >= drvdata->numvmidc) |
|
return -EINVAL; |
|
|
|
/* |
|
* Use spinlock to ensure index doesn't change while it gets |
|
* dereferenced multiple times within a spinlock block elsewhere. |
|
*/ |
|
spin_lock(&drvdata->spinlock); |
|
config->vmid_idx = val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(vmid_idx); |
|
|
|
static ssize_t vmid_val_show(struct device *dev, |
|
struct device_attribute *attr, |
|
char *buf) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
val = (unsigned long)config->vmid_val[config->vmid_idx]; |
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); |
|
} |
|
|
|
static ssize_t vmid_val_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
unsigned long val; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
/* |
|
* only implemented when vmid tracing is enabled, i.e. at least one |
|
* vmid comparator is implemented and at least 8 bit vmid size |
|
*/ |
|
if (!drvdata->vmid_size || !drvdata->numvmidc) |
|
return -EINVAL; |
|
if (kstrtoul(buf, 16, &val)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
config->vmid_val[config->vmid_idx] = (u64)val; |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(vmid_val); |
|
|
|
static ssize_t vmid_masks_show(struct device *dev, |
|
struct device_attribute *attr, char *buf) |
|
{ |
|
unsigned long val1, val2; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
val1 = config->vmid_mask0; |
|
val2 = config->vmid_mask1; |
|
spin_unlock(&drvdata->spinlock); |
|
return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); |
|
} |
|
|
|
static ssize_t vmid_masks_store(struct device *dev, |
|
struct device_attribute *attr, |
|
const char *buf, size_t size) |
|
{ |
|
u8 i, j, maskbyte; |
|
unsigned long val1, val2, mask; |
|
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
|
struct etmv4_config *config = &drvdata->config; |
|
int nr_inputs; |
|
|
|
/* |
|
* only implemented when vmid tracing is enabled, i.e. at least one |
|
* vmid comparator is implemented and at least 8 bit vmid size |
|
*/ |
|
if (!drvdata->vmid_size || !drvdata->numvmidc) |
|
return -EINVAL; |
|
/* one mask if <= 4 comparators, two for up to 8 */ |
|
nr_inputs = sscanf(buf, "%lx %lx", &val1, &val2); |
|
if ((drvdata->numvmidc > 4) && (nr_inputs != 2)) |
|
return -EINVAL; |
|
|
|
spin_lock(&drvdata->spinlock); |
|
|
|
/* |
|
* each byte[0..3] controls mask value applied to vmid |
|
* comparator[0..3] |
|
*/ |
|
switch (drvdata->numvmidc) { |
|
case 0x1: |
|
/* COMP0, bits[7:0] */ |
|
config->vmid_mask0 = val1 & 0xFF; |
|
break; |
|
case 0x2: |
|
/* COMP1, bits[15:8] */ |
|
config->vmid_mask0 = val1 & 0xFFFF; |
|
break; |
|
case 0x3: |
|
/* COMP2, bits[23:16] */ |
|
config->vmid_mask0 = val1 & 0xFFFFFF; |
|
break; |
|
case 0x4: |
|
/* COMP3, bits[31:24] */ |
|
config->vmid_mask0 = val1; |
|
break; |
|
case 0x5: |
|
/* COMP4, bits[7:0] */ |
|
config->vmid_mask0 = val1; |
|
config->vmid_mask1 = val2 & 0xFF; |
|
break; |
|
case 0x6: |
|
/* COMP5, bits[15:8] */ |
|
config->vmid_mask0 = val1; |
|
config->vmid_mask1 = val2 & 0xFFFF; |
|
break; |
|
case 0x7: |
|
/* COMP6, bits[23:16] */ |
|
config->vmid_mask0 = val1; |
|
config->vmid_mask1 = val2 & 0xFFFFFF; |
|
break; |
|
case 0x8: |
|
/* COMP7, bits[31:24] */ |
|
config->vmid_mask0 = val1; |
|
config->vmid_mask1 = val2; |
|
break; |
|
default: |
|
break; |
|
} |
|
|
|
/* |
|
* If software sets a mask bit to 1, it must program relevant byte |
|
* of vmid comparator value 0x0, otherwise behavior is unpredictable. |
|
* For example, if bit[3] of vmid_mask0 is 1, we must clear bits[31:24] |
|
* of vmid comparator0 value (corresponding to byte 0) register. |
|
*/ |
|
mask = config->vmid_mask0; |
|
for (i = 0; i < drvdata->numvmidc; i++) { |
|
/* mask value of corresponding vmid comparator */ |
|
maskbyte = mask & ETMv4_EVENT_MASK; |
|
/* |
|
* each bit corresponds to a byte of respective vmid comparator |
|
* value register |
|
*/ |
|
for (j = 0; j < 8; j++) { |
|
if (maskbyte & 1) |
|
config->vmid_val[i] &= ~(0xFFUL << (j * 8)); |
|
maskbyte >>= 1; |
|
} |
|
/* Select the next vmid comparator mask value */ |
|
if (i == 3) |
|
/* vmid comparators[4-7] */ |
|
mask = config->vmid_mask1; |
|
else |
|
mask >>= 0x8; |
|
} |
|
spin_unlock(&drvdata->spinlock); |
|
return size; |
|
} |
|
static DEVICE_ATTR_RW(vmid_masks); |
|
|
|
static ssize_t cpu_show(struct device *dev, |
|
struct device_attribute *attr, char *buf) |
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{ |
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int val; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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val = drvdata->cpu; |
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return scnprintf(buf, PAGE_SIZE, "%d\n", val); |
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|
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} |
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static DEVICE_ATTR_RO(cpu); |
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|
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static struct attribute *coresight_etmv4_attrs[] = { |
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&dev_attr_nr_pe_cmp.attr, |
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&dev_attr_nr_addr_cmp.attr, |
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&dev_attr_nr_cntr.attr, |
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&dev_attr_nr_ext_inp.attr, |
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&dev_attr_numcidc.attr, |
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&dev_attr_numvmidc.attr, |
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&dev_attr_nrseqstate.attr, |
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&dev_attr_nr_resource.attr, |
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&dev_attr_nr_ss_cmp.attr, |
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&dev_attr_reset.attr, |
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&dev_attr_mode.attr, |
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&dev_attr_pe.attr, |
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&dev_attr_event.attr, |
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&dev_attr_event_instren.attr, |
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&dev_attr_event_ts.attr, |
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&dev_attr_syncfreq.attr, |
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&dev_attr_cyc_threshold.attr, |
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&dev_attr_bb_ctrl.attr, |
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&dev_attr_event_vinst.attr, |
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&dev_attr_s_exlevel_vinst.attr, |
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&dev_attr_ns_exlevel_vinst.attr, |
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&dev_attr_addr_idx.attr, |
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&dev_attr_addr_instdatatype.attr, |
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&dev_attr_addr_single.attr, |
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&dev_attr_addr_range.attr, |
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&dev_attr_addr_start.attr, |
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&dev_attr_addr_stop.attr, |
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&dev_attr_addr_ctxtype.attr, |
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&dev_attr_addr_context.attr, |
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&dev_attr_addr_exlevel_s_ns.attr, |
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&dev_attr_addr_cmp_view.attr, |
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&dev_attr_vinst_pe_cmp_start_stop.attr, |
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&dev_attr_sshot_idx.attr, |
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&dev_attr_sshot_ctrl.attr, |
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&dev_attr_sshot_pe_ctrl.attr, |
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&dev_attr_sshot_status.attr, |
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&dev_attr_seq_idx.attr, |
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&dev_attr_seq_state.attr, |
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&dev_attr_seq_event.attr, |
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&dev_attr_seq_reset_event.attr, |
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&dev_attr_cntr_idx.attr, |
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&dev_attr_cntrldvr.attr, |
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&dev_attr_cntr_val.attr, |
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&dev_attr_cntr_ctrl.attr, |
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&dev_attr_res_idx.attr, |
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&dev_attr_res_ctrl.attr, |
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&dev_attr_ctxid_idx.attr, |
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&dev_attr_ctxid_pid.attr, |
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&dev_attr_ctxid_masks.attr, |
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&dev_attr_vmid_idx.attr, |
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&dev_attr_vmid_val.attr, |
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&dev_attr_vmid_masks.attr, |
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&dev_attr_cpu.attr, |
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NULL, |
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}; |
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|
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struct etmv4_reg { |
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struct coresight_device *csdev; |
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u32 offset; |
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u32 data; |
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}; |
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|
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static void do_smp_cross_read(void *data) |
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{ |
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struct etmv4_reg *reg = data; |
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|
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reg->data = etm4x_relaxed_read32(®->csdev->access, reg->offset); |
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} |
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|
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static u32 etmv4_cross_read(const struct etmv4_drvdata *drvdata, u32 offset) |
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{ |
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struct etmv4_reg reg; |
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|
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reg.offset = offset; |
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reg.csdev = drvdata->csdev; |
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|
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/* |
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* smp cross call ensures the CPU will be powered up before |
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* accessing the ETMv4 trace core registers |
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*/ |
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smp_call_function_single(drvdata->cpu, do_smp_cross_read, ®, 1); |
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return reg.data; |
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} |
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|
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static inline u32 coresight_etm4x_attr_to_offset(struct device_attribute *attr) |
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{ |
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struct dev_ext_attribute *eattr; |
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|
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eattr = container_of(attr, struct dev_ext_attribute, attr); |
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return (u32)(unsigned long)eattr->var; |
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} |
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|
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static ssize_t coresight_etm4x_reg_show(struct device *dev, |
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struct device_attribute *d_attr, |
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char *buf) |
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{ |
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u32 val, offset; |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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|
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offset = coresight_etm4x_attr_to_offset(d_attr); |
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|
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pm_runtime_get_sync(dev->parent); |
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val = etmv4_cross_read(drvdata, offset); |
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pm_runtime_put_sync(dev->parent); |
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|
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return scnprintf(buf, PAGE_SIZE, "0x%x\n", val); |
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} |
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|
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static inline bool |
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etm4x_register_implemented(struct etmv4_drvdata *drvdata, u32 offset) |
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{ |
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switch (offset) { |
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ETM_COMMON_SYSREG_LIST_CASES |
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/* |
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* Common registers to ETE & ETM4x accessible via system |
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* instructions are always implemented. |
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*/ |
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return true; |
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|
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ETM4x_ONLY_SYSREG_LIST_CASES |
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/* |
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* We only support etm4x and ete. So if the device is not |
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* ETE, it must be ETMv4x. |
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*/ |
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return !etm4x_is_ete(drvdata); |
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|
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ETM4x_MMAP_LIST_CASES |
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/* |
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* Registers accessible only via memory-mapped registers |
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* must not be accessed via system instructions. |
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* We cannot access the drvdata->csdev here, as this |
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* function is called during the device creation, via |
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* coresight_register() and the csdev is not initialized |
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* until that is done. So rely on the drvdata->base to |
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* detect if we have a memory mapped access. |
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* Also ETE doesn't implement memory mapped access, thus |
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* it is sufficient to check that we are using mmio. |
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*/ |
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return !!drvdata->base; |
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|
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ETE_ONLY_SYSREG_LIST_CASES |
|
return etm4x_is_ete(drvdata); |
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} |
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|
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return false; |
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} |
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|
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/* |
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* Hide the ETM4x registers that may not be available on the |
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* hardware. |
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* There are certain management registers unavailable via system |
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* instructions. Make those sysfs attributes hidden on such |
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* systems. |
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*/ |
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static umode_t |
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coresight_etm4x_attr_reg_implemented(struct kobject *kobj, |
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struct attribute *attr, int unused) |
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{ |
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struct device *dev = kobj_to_dev(kobj); |
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struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); |
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struct device_attribute *d_attr; |
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u32 offset; |
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|
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d_attr = container_of(attr, struct device_attribute, attr); |
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offset = coresight_etm4x_attr_to_offset(d_attr); |
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|
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if (etm4x_register_implemented(drvdata, offset)) |
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return attr->mode; |
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return 0; |
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} |
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|
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#define coresight_etm4x_reg(name, offset) \ |
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&((struct dev_ext_attribute[]) { \ |
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{ \ |
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__ATTR(name, 0444, coresight_etm4x_reg_show, NULL), \ |
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(void *)(unsigned long)offset \ |
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} \ |
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})[0].attr.attr |
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|
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static struct attribute *coresight_etmv4_mgmt_attrs[] = { |
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coresight_etm4x_reg(trcpdcr, TRCPDCR), |
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coresight_etm4x_reg(trcpdsr, TRCPDSR), |
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coresight_etm4x_reg(trclsr, TRCLSR), |
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coresight_etm4x_reg(trcauthstatus, TRCAUTHSTATUS), |
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coresight_etm4x_reg(trcdevid, TRCDEVID), |
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coresight_etm4x_reg(trcdevtype, TRCDEVTYPE), |
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coresight_etm4x_reg(trcpidr0, TRCPIDR0), |
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coresight_etm4x_reg(trcpidr1, TRCPIDR1), |
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coresight_etm4x_reg(trcpidr2, TRCPIDR2), |
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coresight_etm4x_reg(trcpidr3, TRCPIDR3), |
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coresight_etm4x_reg(trcoslsr, TRCOSLSR), |
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coresight_etm4x_reg(trcconfig, TRCCONFIGR), |
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coresight_etm4x_reg(trctraceid, TRCTRACEIDR), |
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coresight_etm4x_reg(trcdevarch, TRCDEVARCH), |
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NULL, |
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}; |
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|
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static struct attribute *coresight_etmv4_trcidr_attrs[] = { |
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coresight_etm4x_reg(trcidr0, TRCIDR0), |
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coresight_etm4x_reg(trcidr1, TRCIDR1), |
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coresight_etm4x_reg(trcidr2, TRCIDR2), |
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coresight_etm4x_reg(trcidr3, TRCIDR3), |
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coresight_etm4x_reg(trcidr4, TRCIDR4), |
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coresight_etm4x_reg(trcidr5, TRCIDR5), |
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/* trcidr[6,7] are reserved */ |
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coresight_etm4x_reg(trcidr8, TRCIDR8), |
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coresight_etm4x_reg(trcidr9, TRCIDR9), |
|
coresight_etm4x_reg(trcidr10, TRCIDR10), |
|
coresight_etm4x_reg(trcidr11, TRCIDR11), |
|
coresight_etm4x_reg(trcidr12, TRCIDR12), |
|
coresight_etm4x_reg(trcidr13, TRCIDR13), |
|
NULL, |
|
}; |
|
|
|
static const struct attribute_group coresight_etmv4_group = { |
|
.attrs = coresight_etmv4_attrs, |
|
}; |
|
|
|
static const struct attribute_group coresight_etmv4_mgmt_group = { |
|
.is_visible = coresight_etm4x_attr_reg_implemented, |
|
.attrs = coresight_etmv4_mgmt_attrs, |
|
.name = "mgmt", |
|
}; |
|
|
|
static const struct attribute_group coresight_etmv4_trcidr_group = { |
|
.attrs = coresight_etmv4_trcidr_attrs, |
|
.name = "trcidr", |
|
}; |
|
|
|
const struct attribute_group *coresight_etmv4_groups[] = { |
|
&coresight_etmv4_group, |
|
&coresight_etmv4_mgmt_group, |
|
&coresight_etmv4_trcidr_group, |
|
NULL, |
|
};
|
|
|