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844 lines
22 KiB
844 lines
22 KiB
// SPDX-License-Identifier: GPL-2.0 |
|
/* |
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* Copyright(C) 2015 Linaro Limited. All rights reserved. |
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* Author: Mathieu Poirier <[email protected]> |
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*/ |
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|
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#include <linux/coresight.h> |
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#include <linux/coresight-pmu.h> |
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#include <linux/cpumask.h> |
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#include <linux/device.h> |
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#include <linux/list.h> |
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#include <linux/mm.h> |
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#include <linux/init.h> |
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#include <linux/perf_event.h> |
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#include <linux/percpu-defs.h> |
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#include <linux/slab.h> |
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#include <linux/stringhash.h> |
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#include <linux/types.h> |
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#include <linux/workqueue.h> |
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|
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#include "coresight-config.h" |
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#include "coresight-etm-perf.h" |
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#include "coresight-priv.h" |
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#include "coresight-syscfg.h" |
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|
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static struct pmu etm_pmu; |
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static bool etm_perf_up; |
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|
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/* |
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* An ETM context for a running event includes the perf aux handle |
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* and aux_data. For ETM, the aux_data (etm_event_data), consists of |
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* the trace path and the sink configuration. The event data is accessible |
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* via perf_get_aux(handle). However, a sink could "end" a perf output |
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* handle via the IRQ handler. And if the "sink" encounters a failure |
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* to "begin" another session (e.g due to lack of space in the buffer), |
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* the handle will be cleared. Thus, the event_data may not be accessible |
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* from the handle when we get to the etm_event_stop(), which is required |
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* for stopping the trace path. The event_data is guaranteed to stay alive |
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* until "free_aux()", which cannot happen as long as the event is active on |
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* the ETM. Thus the event_data for the session must be part of the ETM context |
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* to make sure we can disable the trace path. |
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*/ |
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struct etm_ctxt { |
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struct perf_output_handle handle; |
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struct etm_event_data *event_data; |
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}; |
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|
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static DEFINE_PER_CPU(struct etm_ctxt, etm_ctxt); |
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static DEFINE_PER_CPU(struct coresight_device *, csdev_src); |
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|
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/* |
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* The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config'; |
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* now take them as general formats and apply on all ETMs. |
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*/ |
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PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC)); |
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/* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */ |
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PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID)); |
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/* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */ |
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PMU_FORMAT_ATTR(contextid2, "config:" __stringify(ETM_OPT_CTXTID2)); |
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PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS)); |
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PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK)); |
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/* preset - if sink ID is used as a configuration selector */ |
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PMU_FORMAT_ATTR(preset, "config:0-3"); |
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/* Sink ID - same for all ETMs */ |
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PMU_FORMAT_ATTR(sinkid, "config2:0-31"); |
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/* config ID - set if a system configuration is selected */ |
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PMU_FORMAT_ATTR(configid, "config2:32-63"); |
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|
|
|
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/* |
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* contextid always traces the "PID". The PID is in CONTEXTIDR_EL1 |
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* when the kernel is running at EL1; when the kernel is at EL2, |
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* the PID is in CONTEXTIDR_EL2. |
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*/ |
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static ssize_t format_attr_contextid_show(struct device *dev, |
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struct device_attribute *attr, |
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char *page) |
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{ |
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int pid_fmt = ETM_OPT_CTXTID; |
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|
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#if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X) |
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pid_fmt = is_kernel_in_hyp_mode() ? ETM_OPT_CTXTID2 : ETM_OPT_CTXTID; |
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#endif |
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return sprintf(page, "config:%d\n", pid_fmt); |
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} |
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|
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static struct device_attribute format_attr_contextid = |
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__ATTR(contextid, 0444, format_attr_contextid_show, NULL); |
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|
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static struct attribute *etm_config_formats_attr[] = { |
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&format_attr_cycacc.attr, |
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&format_attr_contextid.attr, |
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&format_attr_contextid1.attr, |
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&format_attr_contextid2.attr, |
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&format_attr_timestamp.attr, |
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&format_attr_retstack.attr, |
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&format_attr_sinkid.attr, |
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&format_attr_preset.attr, |
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&format_attr_configid.attr, |
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NULL, |
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}; |
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|
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static const struct attribute_group etm_pmu_format_group = { |
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.name = "format", |
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.attrs = etm_config_formats_attr, |
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}; |
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|
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static struct attribute *etm_config_sinks_attr[] = { |
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NULL, |
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}; |
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|
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static const struct attribute_group etm_pmu_sinks_group = { |
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.name = "sinks", |
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.attrs = etm_config_sinks_attr, |
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}; |
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|
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static struct attribute *etm_config_events_attr[] = { |
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NULL, |
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}; |
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|
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static const struct attribute_group etm_pmu_events_group = { |
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.name = "events", |
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.attrs = etm_config_events_attr, |
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}; |
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|
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static const struct attribute_group *etm_pmu_attr_groups[] = { |
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&etm_pmu_format_group, |
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&etm_pmu_sinks_group, |
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&etm_pmu_events_group, |
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NULL, |
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}; |
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|
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static inline struct list_head ** |
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etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu) |
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{ |
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return per_cpu_ptr(data->path, cpu); |
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} |
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|
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static inline struct list_head * |
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etm_event_cpu_path(struct etm_event_data *data, int cpu) |
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{ |
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return *etm_event_cpu_path_ptr(data, cpu); |
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} |
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|
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static void etm_event_read(struct perf_event *event) {} |
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|
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static int etm_addr_filters_alloc(struct perf_event *event) |
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{ |
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struct etm_filters *filters; |
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int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu); |
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|
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filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node); |
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if (!filters) |
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return -ENOMEM; |
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|
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if (event->parent) |
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memcpy(filters, event->parent->hw.addr_filters, |
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sizeof(*filters)); |
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|
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event->hw.addr_filters = filters; |
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|
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return 0; |
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} |
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|
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static void etm_event_destroy(struct perf_event *event) |
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{ |
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kfree(event->hw.addr_filters); |
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event->hw.addr_filters = NULL; |
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} |
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|
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static int etm_event_init(struct perf_event *event) |
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{ |
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int ret = 0; |
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|
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if (event->attr.type != etm_pmu.type) { |
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ret = -ENOENT; |
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goto out; |
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} |
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|
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ret = etm_addr_filters_alloc(event); |
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if (ret) |
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goto out; |
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|
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event->destroy = etm_event_destroy; |
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out: |
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return ret; |
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} |
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|
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static void free_sink_buffer(struct etm_event_data *event_data) |
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{ |
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int cpu; |
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cpumask_t *mask = &event_data->mask; |
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struct coresight_device *sink; |
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|
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if (!event_data->snk_config) |
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return; |
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|
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if (WARN_ON(cpumask_empty(mask))) |
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return; |
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|
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cpu = cpumask_first(mask); |
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sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu)); |
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sink_ops(sink)->free_buffer(event_data->snk_config); |
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} |
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|
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static void free_event_data(struct work_struct *work) |
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{ |
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int cpu; |
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cpumask_t *mask; |
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struct etm_event_data *event_data; |
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|
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event_data = container_of(work, struct etm_event_data, work); |
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mask = &event_data->mask; |
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|
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/* Free the sink buffers, if there are any */ |
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free_sink_buffer(event_data); |
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|
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/* clear any configuration we were using */ |
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if (event_data->cfg_hash) |
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cscfg_deactivate_config(event_data->cfg_hash); |
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|
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for_each_cpu(cpu, mask) { |
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struct list_head **ppath; |
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|
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ppath = etm_event_cpu_path_ptr(event_data, cpu); |
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if (!(IS_ERR_OR_NULL(*ppath))) |
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coresight_release_path(*ppath); |
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*ppath = NULL; |
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} |
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|
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free_percpu(event_data->path); |
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kfree(event_data); |
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} |
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|
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static void *alloc_event_data(int cpu) |
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{ |
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cpumask_t *mask; |
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struct etm_event_data *event_data; |
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|
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/* First get memory for the session's data */ |
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event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL); |
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if (!event_data) |
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return NULL; |
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mask = &event_data->mask; |
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if (cpu != -1) |
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cpumask_set_cpu(cpu, mask); |
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else |
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cpumask_copy(mask, cpu_present_mask); |
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|
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/* |
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* Each CPU has a single path between source and destination. As such |
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* allocate an array using CPU numbers as indexes. That way a path |
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* for any CPU can easily be accessed at any given time. We proceed |
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* the same way for sessions involving a single CPU. The cost of |
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* unused memory when dealing with single CPU trace scenarios is small |
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* compared to the cost of searching through an optimized array. |
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*/ |
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event_data->path = alloc_percpu(struct list_head *); |
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|
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if (!event_data->path) { |
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kfree(event_data); |
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return NULL; |
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} |
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|
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return event_data; |
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} |
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|
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static void etm_free_aux(void *data) |
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{ |
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struct etm_event_data *event_data = data; |
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|
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schedule_work(&event_data->work); |
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} |
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|
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/* |
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* Check if two given sinks are compatible with each other, |
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* so that they can use the same sink buffers, when an event |
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* moves around. |
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*/ |
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static bool sinks_compatible(struct coresight_device *a, |
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struct coresight_device *b) |
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{ |
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if (!a || !b) |
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return false; |
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/* |
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* If the sinks are of the same subtype and driven |
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* by the same driver, we can use the same buffer |
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* on these sinks. |
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*/ |
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return (a->subtype.sink_subtype == b->subtype.sink_subtype) && |
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(sink_ops(a) == sink_ops(b)); |
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} |
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|
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static void *etm_setup_aux(struct perf_event *event, void **pages, |
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int nr_pages, bool overwrite) |
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{ |
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u32 id, cfg_hash; |
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int cpu = event->cpu; |
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cpumask_t *mask; |
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struct coresight_device *sink = NULL; |
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struct coresight_device *user_sink = NULL, *last_sink = NULL; |
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struct etm_event_data *event_data = NULL; |
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|
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event_data = alloc_event_data(cpu); |
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if (!event_data) |
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return NULL; |
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INIT_WORK(&event_data->work, free_event_data); |
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|
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/* First get the selected sink from user space. */ |
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if (event->attr.config2 & GENMASK_ULL(31, 0)) { |
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id = (u32)event->attr.config2; |
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sink = user_sink = coresight_get_sink_by_id(id); |
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} |
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|
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/* check if user wants a coresight configuration selected */ |
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cfg_hash = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32); |
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if (cfg_hash) { |
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if (cscfg_activate_config(cfg_hash)) |
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goto err; |
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event_data->cfg_hash = cfg_hash; |
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} |
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|
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mask = &event_data->mask; |
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|
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/* |
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* Setup the path for each CPU in a trace session. We try to build |
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* trace path for each CPU in the mask. If we don't find an ETM |
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* for the CPU or fail to build a path, we clear the CPU from the |
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* mask and continue with the rest. If ever we try to trace on those |
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* CPUs, we can handle it and fail the session. |
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*/ |
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for_each_cpu(cpu, mask) { |
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struct list_head *path; |
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struct coresight_device *csdev; |
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|
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csdev = per_cpu(csdev_src, cpu); |
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/* |
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* If there is no ETM associated with this CPU clear it from |
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* the mask and continue with the rest. If ever we try to trace |
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* on this CPU, we handle it accordingly. |
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*/ |
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if (!csdev) { |
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cpumask_clear_cpu(cpu, mask); |
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continue; |
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} |
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|
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/* |
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* No sink provided - look for a default sink for all the ETMs, |
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* where this event can be scheduled. |
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* We allocate the sink specific buffers only once for this |
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* event. If the ETMs have different default sink devices, we |
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* can only use a single "type" of sink as the event can carry |
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* only one sink specific buffer. Thus we have to make sure |
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* that the sinks are of the same type and driven by the same |
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* driver, as the one we allocate the buffer for. As such |
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* we choose the first sink and check if the remaining ETMs |
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* have a compatible default sink. We don't trace on a CPU |
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* if the sink is not compatible. |
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*/ |
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if (!user_sink) { |
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/* Find the default sink for this ETM */ |
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sink = coresight_find_default_sink(csdev); |
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if (!sink) { |
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cpumask_clear_cpu(cpu, mask); |
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continue; |
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} |
|
|
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/* Check if this sink compatible with the last sink */ |
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if (last_sink && !sinks_compatible(last_sink, sink)) { |
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cpumask_clear_cpu(cpu, mask); |
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continue; |
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} |
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last_sink = sink; |
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} |
|
|
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/* |
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* Building a path doesn't enable it, it simply builds a |
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* list of devices from source to sink that can be |
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* referenced later when the path is actually needed. |
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*/ |
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path = coresight_build_path(csdev, sink); |
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if (IS_ERR(path)) { |
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cpumask_clear_cpu(cpu, mask); |
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continue; |
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} |
|
|
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*etm_event_cpu_path_ptr(event_data, cpu) = path; |
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} |
|
|
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/* no sink found for any CPU - cannot trace */ |
|
if (!sink) |
|
goto err; |
|
|
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/* If we don't have any CPUs ready for tracing, abort */ |
|
cpu = cpumask_first(mask); |
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if (cpu >= nr_cpu_ids) |
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goto err; |
|
|
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if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer) |
|
goto err; |
|
|
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/* |
|
* Allocate the sink buffer for this session. All the sinks |
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* where this event can be scheduled are ensured to be of the |
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* same type. Thus the same sink configuration is used by the |
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* sinks. |
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*/ |
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event_data->snk_config = |
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sink_ops(sink)->alloc_buffer(sink, event, pages, |
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nr_pages, overwrite); |
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if (!event_data->snk_config) |
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goto err; |
|
|
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out: |
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return event_data; |
|
|
|
err: |
|
etm_free_aux(event_data); |
|
event_data = NULL; |
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goto out; |
|
} |
|
|
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static void etm_event_start(struct perf_event *event, int flags) |
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{ |
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int cpu = smp_processor_id(); |
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struct etm_event_data *event_data; |
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struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt); |
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struct perf_output_handle *handle = &ctxt->handle; |
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struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu); |
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struct list_head *path; |
|
|
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if (!csdev) |
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goto fail; |
|
|
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/* Have we messed up our tracking ? */ |
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if (WARN_ON(ctxt->event_data)) |
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goto fail; |
|
|
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/* |
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* Deal with the ring buffer API and get a handle on the |
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* session's information. |
|
*/ |
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event_data = perf_aux_output_begin(handle, event); |
|
if (!event_data) |
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goto fail; |
|
|
|
/* |
|
* Check if this ETM is allowed to trace, as decided |
|
* at etm_setup_aux(). This could be due to an unreachable |
|
* sink from this ETM. We can't do much in this case if |
|
* the sink was specified or hinted to the driver. For |
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* now, simply don't record anything on this ETM. |
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*/ |
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if (!cpumask_test_cpu(cpu, &event_data->mask)) |
|
goto fail_end_stop; |
|
|
|
path = etm_event_cpu_path(event_data, cpu); |
|
/* We need a sink, no need to continue without one */ |
|
sink = coresight_get_sink(path); |
|
if (WARN_ON_ONCE(!sink)) |
|
goto fail_end_stop; |
|
|
|
/* Nothing will happen without a path */ |
|
if (coresight_enable_path(path, CS_MODE_PERF, handle)) |
|
goto fail_end_stop; |
|
|
|
/* Tell the perf core the event is alive */ |
|
event->hw.state = 0; |
|
|
|
/* Finally enable the tracer */ |
|
if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF)) |
|
goto fail_disable_path; |
|
|
|
/* Save the event_data for this ETM */ |
|
ctxt->event_data = event_data; |
|
out: |
|
return; |
|
|
|
fail_disable_path: |
|
coresight_disable_path(path); |
|
fail_end_stop: |
|
perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED); |
|
perf_aux_output_end(handle, 0); |
|
fail: |
|
event->hw.state = PERF_HES_STOPPED; |
|
goto out; |
|
} |
|
|
|
static void etm_event_stop(struct perf_event *event, int mode) |
|
{ |
|
int cpu = smp_processor_id(); |
|
unsigned long size; |
|
struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu); |
|
struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt); |
|
struct perf_output_handle *handle = &ctxt->handle; |
|
struct etm_event_data *event_data; |
|
struct list_head *path; |
|
|
|
/* |
|
* If we still have access to the event_data via handle, |
|
* confirm that we haven't messed up the tracking. |
|
*/ |
|
if (handle->event && |
|
WARN_ON(perf_get_aux(handle) != ctxt->event_data)) |
|
return; |
|
|
|
event_data = ctxt->event_data; |
|
/* Clear the event_data as this ETM is stopping the trace. */ |
|
ctxt->event_data = NULL; |
|
|
|
if (event->hw.state == PERF_HES_STOPPED) |
|
return; |
|
|
|
/* We must have a valid event_data for a running event */ |
|
if (WARN_ON(!event_data)) |
|
return; |
|
|
|
if (!csdev) |
|
return; |
|
|
|
path = etm_event_cpu_path(event_data, cpu); |
|
if (!path) |
|
return; |
|
|
|
sink = coresight_get_sink(path); |
|
if (!sink) |
|
return; |
|
|
|
/* stop tracer */ |
|
source_ops(csdev)->disable(csdev, event); |
|
|
|
/* tell the core */ |
|
event->hw.state = PERF_HES_STOPPED; |
|
|
|
/* |
|
* If the handle is not bound to an event anymore |
|
* (e.g, the sink driver was unable to restart the |
|
* handle due to lack of buffer space), we don't |
|
* have to do anything here. |
|
*/ |
|
if (handle->event && (mode & PERF_EF_UPDATE)) { |
|
if (WARN_ON_ONCE(handle->event != event)) |
|
return; |
|
|
|
/* update trace information */ |
|
if (!sink_ops(sink)->update_buffer) |
|
return; |
|
|
|
size = sink_ops(sink)->update_buffer(sink, handle, |
|
event_data->snk_config); |
|
perf_aux_output_end(handle, size); |
|
} |
|
|
|
/* Disabling the path make its elements available to other sessions */ |
|
coresight_disable_path(path); |
|
} |
|
|
|
static int etm_event_add(struct perf_event *event, int mode) |
|
{ |
|
int ret = 0; |
|
struct hw_perf_event *hwc = &event->hw; |
|
|
|
if (mode & PERF_EF_START) { |
|
etm_event_start(event, 0); |
|
if (hwc->state & PERF_HES_STOPPED) |
|
ret = -EINVAL; |
|
} else { |
|
hwc->state = PERF_HES_STOPPED; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
static void etm_event_del(struct perf_event *event, int mode) |
|
{ |
|
etm_event_stop(event, PERF_EF_UPDATE); |
|
} |
|
|
|
static int etm_addr_filters_validate(struct list_head *filters) |
|
{ |
|
bool range = false, address = false; |
|
int index = 0; |
|
struct perf_addr_filter *filter; |
|
|
|
list_for_each_entry(filter, filters, entry) { |
|
/* |
|
* No need to go further if there's no more |
|
* room for filters. |
|
*/ |
|
if (++index > ETM_ADDR_CMP_MAX) |
|
return -EOPNOTSUPP; |
|
|
|
/* filter::size==0 means single address trigger */ |
|
if (filter->size) { |
|
/* |
|
* The existing code relies on START/STOP filters |
|
* being address filters. |
|
*/ |
|
if (filter->action == PERF_ADDR_FILTER_ACTION_START || |
|
filter->action == PERF_ADDR_FILTER_ACTION_STOP) |
|
return -EOPNOTSUPP; |
|
|
|
range = true; |
|
} else |
|
address = true; |
|
|
|
/* |
|
* At this time we don't allow range and start/stop filtering |
|
* to cohabitate, they have to be mutually exclusive. |
|
*/ |
|
if (range && address) |
|
return -EOPNOTSUPP; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static void etm_addr_filters_sync(struct perf_event *event) |
|
{ |
|
struct perf_addr_filters_head *head = perf_event_addr_filters(event); |
|
unsigned long start, stop; |
|
struct perf_addr_filter_range *fr = event->addr_filter_ranges; |
|
struct etm_filters *filters = event->hw.addr_filters; |
|
struct etm_filter *etm_filter; |
|
struct perf_addr_filter *filter; |
|
int i = 0; |
|
|
|
list_for_each_entry(filter, &head->list, entry) { |
|
start = fr[i].start; |
|
stop = start + fr[i].size; |
|
etm_filter = &filters->etm_filter[i]; |
|
|
|
switch (filter->action) { |
|
case PERF_ADDR_FILTER_ACTION_FILTER: |
|
etm_filter->start_addr = start; |
|
etm_filter->stop_addr = stop; |
|
etm_filter->type = ETM_ADDR_TYPE_RANGE; |
|
break; |
|
case PERF_ADDR_FILTER_ACTION_START: |
|
etm_filter->start_addr = start; |
|
etm_filter->type = ETM_ADDR_TYPE_START; |
|
break; |
|
case PERF_ADDR_FILTER_ACTION_STOP: |
|
etm_filter->stop_addr = stop; |
|
etm_filter->type = ETM_ADDR_TYPE_STOP; |
|
break; |
|
} |
|
i++; |
|
} |
|
|
|
filters->nr_filters = i; |
|
} |
|
|
|
int etm_perf_symlink(struct coresight_device *csdev, bool link) |
|
{ |
|
char entry[sizeof("cpu9999999")]; |
|
int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev); |
|
struct device *pmu_dev = etm_pmu.dev; |
|
struct device *cs_dev = &csdev->dev; |
|
|
|
sprintf(entry, "cpu%d", cpu); |
|
|
|
if (!etm_perf_up) |
|
return -EPROBE_DEFER; |
|
|
|
if (link) { |
|
ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry); |
|
if (ret) |
|
return ret; |
|
per_cpu(csdev_src, cpu) = csdev; |
|
} else { |
|
sysfs_remove_link(&pmu_dev->kobj, entry); |
|
per_cpu(csdev_src, cpu) = NULL; |
|
} |
|
|
|
return 0; |
|
} |
|
EXPORT_SYMBOL_GPL(etm_perf_symlink); |
|
|
|
static ssize_t etm_perf_sink_name_show(struct device *dev, |
|
struct device_attribute *dattr, |
|
char *buf) |
|
{ |
|
struct dev_ext_attribute *ea; |
|
|
|
ea = container_of(dattr, struct dev_ext_attribute, attr); |
|
return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var)); |
|
} |
|
|
|
static struct dev_ext_attribute * |
|
etm_perf_add_symlink_group(struct device *dev, const char *name, const char *group_name) |
|
{ |
|
struct dev_ext_attribute *ea; |
|
unsigned long hash; |
|
int ret; |
|
struct device *pmu_dev = etm_pmu.dev; |
|
|
|
if (!etm_perf_up) |
|
return ERR_PTR(-EPROBE_DEFER); |
|
|
|
ea = devm_kzalloc(dev, sizeof(*ea), GFP_KERNEL); |
|
if (!ea) |
|
return ERR_PTR(-ENOMEM); |
|
|
|
/* |
|
* If this function is called adding a sink then the hash is used for |
|
* sink selection - see function coresight_get_sink_by_id(). |
|
* If adding a configuration then the hash is used for selection in |
|
* cscfg_activate_config() |
|
*/ |
|
hash = hashlen_hash(hashlen_string(NULL, name)); |
|
|
|
sysfs_attr_init(&ea->attr.attr); |
|
ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL); |
|
if (!ea->attr.attr.name) |
|
return ERR_PTR(-ENOMEM); |
|
|
|
ea->attr.attr.mode = 0444; |
|
ea->var = (unsigned long *)hash; |
|
|
|
ret = sysfs_add_file_to_group(&pmu_dev->kobj, |
|
&ea->attr.attr, group_name); |
|
|
|
return ret ? ERR_PTR(ret) : ea; |
|
} |
|
|
|
int etm_perf_add_symlink_sink(struct coresight_device *csdev) |
|
{ |
|
const char *name; |
|
struct device *dev = &csdev->dev; |
|
int err = 0; |
|
|
|
if (csdev->type != CORESIGHT_DEV_TYPE_SINK && |
|
csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) |
|
return -EINVAL; |
|
|
|
if (csdev->ea != NULL) |
|
return -EINVAL; |
|
|
|
name = dev_name(dev); |
|
csdev->ea = etm_perf_add_symlink_group(dev, name, "sinks"); |
|
if (IS_ERR(csdev->ea)) { |
|
err = PTR_ERR(csdev->ea); |
|
csdev->ea = NULL; |
|
} else |
|
csdev->ea->attr.show = etm_perf_sink_name_show; |
|
|
|
return err; |
|
} |
|
|
|
static void etm_perf_del_symlink_group(struct dev_ext_attribute *ea, const char *group_name) |
|
{ |
|
struct device *pmu_dev = etm_pmu.dev; |
|
|
|
sysfs_remove_file_from_group(&pmu_dev->kobj, |
|
&ea->attr.attr, group_name); |
|
} |
|
|
|
void etm_perf_del_symlink_sink(struct coresight_device *csdev) |
|
{ |
|
if (csdev->type != CORESIGHT_DEV_TYPE_SINK && |
|
csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) |
|
return; |
|
|
|
if (!csdev->ea) |
|
return; |
|
|
|
etm_perf_del_symlink_group(csdev->ea, "sinks"); |
|
csdev->ea = NULL; |
|
} |
|
|
|
static ssize_t etm_perf_cscfg_event_show(struct device *dev, |
|
struct device_attribute *dattr, |
|
char *buf) |
|
{ |
|
struct dev_ext_attribute *ea; |
|
|
|
ea = container_of(dattr, struct dev_ext_attribute, attr); |
|
return scnprintf(buf, PAGE_SIZE, "configid=0x%lx\n", (unsigned long)(ea->var)); |
|
} |
|
|
|
int etm_perf_add_symlink_cscfg(struct device *dev, struct cscfg_config_desc *config_desc) |
|
{ |
|
int err = 0; |
|
|
|
if (config_desc->event_ea != NULL) |
|
return 0; |
|
|
|
config_desc->event_ea = etm_perf_add_symlink_group(dev, config_desc->name, "events"); |
|
|
|
/* set the show function to the custom cscfg event */ |
|
if (!IS_ERR(config_desc->event_ea)) |
|
config_desc->event_ea->attr.show = etm_perf_cscfg_event_show; |
|
else { |
|
err = PTR_ERR(config_desc->event_ea); |
|
config_desc->event_ea = NULL; |
|
} |
|
|
|
return err; |
|
} |
|
|
|
void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc) |
|
{ |
|
if (!config_desc->event_ea) |
|
return; |
|
|
|
etm_perf_del_symlink_group(config_desc->event_ea, "events"); |
|
config_desc->event_ea = NULL; |
|
} |
|
|
|
int __init etm_perf_init(void) |
|
{ |
|
int ret; |
|
|
|
etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE | |
|
PERF_PMU_CAP_ITRACE); |
|
|
|
etm_pmu.attr_groups = etm_pmu_attr_groups; |
|
etm_pmu.task_ctx_nr = perf_sw_context; |
|
etm_pmu.read = etm_event_read; |
|
etm_pmu.event_init = etm_event_init; |
|
etm_pmu.setup_aux = etm_setup_aux; |
|
etm_pmu.free_aux = etm_free_aux; |
|
etm_pmu.start = etm_event_start; |
|
etm_pmu.stop = etm_event_stop; |
|
etm_pmu.add = etm_event_add; |
|
etm_pmu.del = etm_event_del; |
|
etm_pmu.addr_filters_sync = etm_addr_filters_sync; |
|
etm_pmu.addr_filters_validate = etm_addr_filters_validate; |
|
etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX; |
|
|
|
ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1); |
|
if (ret == 0) |
|
etm_perf_up = true; |
|
|
|
return ret; |
|
} |
|
|
|
void etm_perf_exit(void) |
|
{ |
|
perf_pmu_unregister(&etm_pmu); |
|
}
|
|
|