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1278 lines
34 KiB
1278 lines
34 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* PCA953x 4/8/16/24/40 bit I/O ports |
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* |
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* Copyright (C) 2005 Ben Gardner <[email protected]> |
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* Copyright (C) 2007 Marvell International Ltd. |
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* |
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* Derived from drivers/i2c/chips/pca9539.c |
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*/ |
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#include <linux/acpi.h> |
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#include <linux/bitmap.h> |
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#include <linux/gpio/driver.h> |
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#include <linux/gpio/consumer.h> |
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#include <linux/i2c.h> |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/module.h> |
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#include <linux/of_platform.h> |
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#include <linux/platform_data/pca953x.h> |
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#include <linux/regmap.h> |
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#include <linux/regulator/consumer.h> |
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#include <linux/slab.h> |
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#include <asm/unaligned.h> |
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#define PCA953X_INPUT 0x00 |
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#define PCA953X_OUTPUT 0x01 |
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#define PCA953X_INVERT 0x02 |
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#define PCA953X_DIRECTION 0x03 |
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#define REG_ADDR_MASK GENMASK(5, 0) |
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#define REG_ADDR_EXT BIT(6) |
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#define REG_ADDR_AI BIT(7) |
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#define PCA957X_IN 0x00 |
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#define PCA957X_INVRT 0x01 |
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#define PCA957X_BKEN 0x02 |
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#define PCA957X_PUPD 0x03 |
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#define PCA957X_CFG 0x04 |
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#define PCA957X_OUT 0x05 |
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#define PCA957X_MSK 0x06 |
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#define PCA957X_INTS 0x07 |
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#define PCAL953X_OUT_STRENGTH 0x20 |
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#define PCAL953X_IN_LATCH 0x22 |
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#define PCAL953X_PULL_EN 0x23 |
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#define PCAL953X_PULL_SEL 0x24 |
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#define PCAL953X_INT_MASK 0x25 |
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#define PCAL953X_INT_STAT 0x26 |
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#define PCAL953X_OUT_CONF 0x27 |
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#define PCAL6524_INT_EDGE 0x28 |
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#define PCAL6524_INT_CLR 0x2a |
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#define PCAL6524_IN_STATUS 0x2b |
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#define PCAL6524_OUT_INDCONF 0x2c |
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#define PCAL6524_DEBOUNCE 0x2d |
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#define PCA_GPIO_MASK GENMASK(7, 0) |
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#define PCAL_GPIO_MASK GENMASK(4, 0) |
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#define PCAL_PINCTRL_MASK GENMASK(6, 5) |
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#define PCA_INT BIT(8) |
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#define PCA_PCAL BIT(9) |
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#define PCA_LATCH_INT (PCA_PCAL | PCA_INT) |
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#define PCA953X_TYPE BIT(12) |
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#define PCA957X_TYPE BIT(13) |
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#define PCA_TYPE_MASK GENMASK(15, 12) |
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#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) |
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static const struct i2c_device_id pca953x_id[] = { |
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{ "pca6416", 16 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9506", 40 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9536", 4 | PCA953X_TYPE, }, |
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{ "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca9556", 8 | PCA953X_TYPE, }, |
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{ "pca9557", 8 | PCA953X_TYPE, }, |
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{ "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, |
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{ "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, |
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{ "pca9698", 40 | PCA953X_TYPE, }, |
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{ "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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{ "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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{ "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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{ "pcal9554b", 8 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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{ "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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{ "max7310", 8 | PCA953X_TYPE, }, |
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{ "max7312", 16 | PCA953X_TYPE | PCA_INT, }, |
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{ "max7313", 16 | PCA953X_TYPE | PCA_INT, }, |
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{ "max7315", 8 | PCA953X_TYPE | PCA_INT, }, |
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{ "max7318", 16 | PCA953X_TYPE | PCA_INT, }, |
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{ "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, |
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{ "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, |
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{ "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, |
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{ "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, |
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{ "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, |
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{ "tca9554", 8 | PCA953X_TYPE | PCA_INT, }, |
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{ "xra1202", 8 | PCA953X_TYPE }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(i2c, pca953x_id); |
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#ifdef CONFIG_GPIO_PCA953X_IRQ |
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#include <linux/dmi.h> |
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static const struct acpi_gpio_params pca953x_irq_gpios = { 0, 0, true }; |
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static const struct acpi_gpio_mapping pca953x_acpi_irq_gpios[] = { |
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{ "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER }, |
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{ } |
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}; |
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static int pca953x_acpi_get_irq(struct device *dev) |
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{ |
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int ret; |
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ret = devm_acpi_dev_add_driver_gpios(dev, pca953x_acpi_irq_gpios); |
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if (ret) |
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dev_warn(dev, "can't add GPIO ACPI mapping\n"); |
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ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); |
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if (ret < 0) |
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return ret; |
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dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret); |
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return ret; |
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} |
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static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = { |
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{ |
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/* |
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* On Intel Galileo Gen 2 board the IRQ pin of one of |
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* the I²C GPIO expanders, which has GpioInt() resource, |
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* is provided as an absolute number instead of being |
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* relative. Since first controller (gpio-sch.c) and |
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* second (gpio-dwapb.c) are at the fixed bases, we may |
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* safely refer to the number in the global space to get |
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* an IRQ out of it. |
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*/ |
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.matches = { |
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DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"), |
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}, |
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}, |
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{} |
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}; |
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#endif |
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static const struct acpi_device_id pca953x_acpi_ids[] = { |
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{ "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); |
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#define MAX_BANK 5 |
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#define BANK_SZ 8 |
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#define MAX_LINE (MAX_BANK * BANK_SZ) |
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#define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) |
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struct pca953x_reg_config { |
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int direction; |
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int output; |
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int input; |
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int invert; |
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}; |
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static const struct pca953x_reg_config pca953x_regs = { |
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.direction = PCA953X_DIRECTION, |
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.output = PCA953X_OUTPUT, |
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.input = PCA953X_INPUT, |
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.invert = PCA953X_INVERT, |
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}; |
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static const struct pca953x_reg_config pca957x_regs = { |
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.direction = PCA957X_CFG, |
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.output = PCA957X_OUT, |
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.input = PCA957X_IN, |
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.invert = PCA957X_INVRT, |
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}; |
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struct pca953x_chip { |
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unsigned gpio_start; |
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struct mutex i2c_lock; |
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struct regmap *regmap; |
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#ifdef CONFIG_GPIO_PCA953X_IRQ |
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struct mutex irq_lock; |
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DECLARE_BITMAP(irq_mask, MAX_LINE); |
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DECLARE_BITMAP(irq_stat, MAX_LINE); |
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DECLARE_BITMAP(irq_trig_raise, MAX_LINE); |
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DECLARE_BITMAP(irq_trig_fall, MAX_LINE); |
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struct irq_chip irq_chip; |
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#endif |
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atomic_t wakeup_path; |
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struct i2c_client *client; |
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struct gpio_chip gpio_chip; |
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const char *const *names; |
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unsigned long driver_data; |
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struct regulator *regulator; |
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const struct pca953x_reg_config *regs; |
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}; |
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static int pca953x_bank_shift(struct pca953x_chip *chip) |
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{ |
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return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
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} |
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#define PCA953x_BANK_INPUT BIT(0) |
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#define PCA953x_BANK_OUTPUT BIT(1) |
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#define PCA953x_BANK_POLARITY BIT(2) |
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#define PCA953x_BANK_CONFIG BIT(3) |
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#define PCA957x_BANK_INPUT BIT(0) |
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#define PCA957x_BANK_POLARITY BIT(1) |
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#define PCA957x_BANK_BUSHOLD BIT(2) |
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#define PCA957x_BANK_CONFIG BIT(4) |
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#define PCA957x_BANK_OUTPUT BIT(5) |
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#define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2) |
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#define PCAL9xxx_BANK_PULL_EN BIT(8 + 3) |
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#define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4) |
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#define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5) |
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#define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6) |
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/* |
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* We care about the following registers: |
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* - Standard set, below 0x40, each port can be replicated up to 8 times |
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* - PCA953x standard |
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* Input port 0x00 + 0 * bank_size R |
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* Output port 0x00 + 1 * bank_size RW |
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* Polarity Inversion port 0x00 + 2 * bank_size RW |
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* Configuration port 0x00 + 3 * bank_size RW |
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* - PCA957x with mixed up registers |
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* Input port 0x00 + 0 * bank_size R |
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* Polarity Inversion port 0x00 + 1 * bank_size RW |
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* Bus hold port 0x00 + 2 * bank_size RW |
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* Configuration port 0x00 + 4 * bank_size RW |
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* Output port 0x00 + 5 * bank_size RW |
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* |
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* - Extended set, above 0x40, often chip specific. |
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* - PCAL6524/PCAL9555A with custom PCAL IRQ handling: |
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* Input latch register 0x40 + 2 * bank_size RW |
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* Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW |
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* Pull-up/pull-down select reg 0x40 + 4 * bank_size RW |
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* Interrupt mask register 0x40 + 5 * bank_size RW |
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* Interrupt status register 0x40 + 6 * bank_size R |
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* |
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* - Registers with bit 0x80 set, the AI bit |
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* The bit is cleared and the registers fall into one of the |
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* categories above. |
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*/ |
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static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, |
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u32 checkbank) |
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{ |
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int bank_shift = pca953x_bank_shift(chip); |
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int bank = (reg & REG_ADDR_MASK) >> bank_shift; |
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int offset = reg & (BIT(bank_shift) - 1); |
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/* Special PCAL extended register check. */ |
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if (reg & REG_ADDR_EXT) { |
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if (!(chip->driver_data & PCA_PCAL)) |
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return false; |
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bank += 8; |
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} |
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/* Register is not in the matching bank. */ |
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if (!(BIT(bank) & checkbank)) |
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return false; |
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/* Register is not within allowed range of bank. */ |
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if (offset >= NBANK(chip)) |
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return false; |
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return true; |
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} |
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static bool pca953x_readable_register(struct device *dev, unsigned int reg) |
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{ |
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struct pca953x_chip *chip = dev_get_drvdata(dev); |
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u32 bank; |
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if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { |
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bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT | |
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PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG; |
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} else { |
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bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT | |
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PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG | |
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PCA957x_BANK_BUSHOLD; |
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} |
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if (chip->driver_data & PCA_PCAL) { |
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bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | |
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PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK | |
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PCAL9xxx_BANK_IRQ_STAT; |
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} |
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return pca953x_check_register(chip, reg, bank); |
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} |
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static bool pca953x_writeable_register(struct device *dev, unsigned int reg) |
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{ |
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struct pca953x_chip *chip = dev_get_drvdata(dev); |
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u32 bank; |
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if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { |
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bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY | |
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PCA953x_BANK_CONFIG; |
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} else { |
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bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY | |
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PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD; |
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} |
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if (chip->driver_data & PCA_PCAL) |
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bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | |
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PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK; |
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return pca953x_check_register(chip, reg, bank); |
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} |
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static bool pca953x_volatile_register(struct device *dev, unsigned int reg) |
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{ |
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struct pca953x_chip *chip = dev_get_drvdata(dev); |
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u32 bank; |
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if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) |
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bank = PCA953x_BANK_INPUT; |
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else |
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bank = PCA957x_BANK_INPUT; |
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if (chip->driver_data & PCA_PCAL) |
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bank |= PCAL9xxx_BANK_IRQ_STAT; |
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return pca953x_check_register(chip, reg, bank); |
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} |
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static const struct regmap_config pca953x_i2c_regmap = { |
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.reg_bits = 8, |
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.val_bits = 8, |
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.readable_reg = pca953x_readable_register, |
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.writeable_reg = pca953x_writeable_register, |
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.volatile_reg = pca953x_volatile_register, |
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.disable_locking = true, |
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.cache_type = REGCACHE_RBTREE, |
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.max_register = 0x7f, |
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}; |
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static const struct regmap_config pca953x_ai_i2c_regmap = { |
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.reg_bits = 8, |
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.val_bits = 8, |
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.read_flag_mask = REG_ADDR_AI, |
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.write_flag_mask = REG_ADDR_AI, |
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.readable_reg = pca953x_readable_register, |
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.writeable_reg = pca953x_writeable_register, |
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.volatile_reg = pca953x_volatile_register, |
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.disable_locking = true, |
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.cache_type = REGCACHE_RBTREE, |
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.max_register = 0x7f, |
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}; |
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static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off) |
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{ |
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int bank_shift = pca953x_bank_shift(chip); |
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int addr = (reg & PCAL_GPIO_MASK) << bank_shift; |
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int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; |
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u8 regaddr = pinctrl | addr | (off / BANK_SZ); |
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return regaddr; |
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} |
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static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val) |
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{ |
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u8 regaddr = pca953x_recalc_addr(chip, reg, 0); |
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u8 value[MAX_BANK]; |
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int i, ret; |
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for (i = 0; i < NBANK(chip); i++) |
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value[i] = bitmap_get_value8(val, i * BANK_SZ); |
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ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip)); |
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if (ret < 0) { |
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dev_err(&chip->client->dev, "failed writing register\n"); |
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return ret; |
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} |
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return 0; |
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} |
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static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val) |
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{ |
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u8 regaddr = pca953x_recalc_addr(chip, reg, 0); |
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u8 value[MAX_BANK]; |
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int i, ret; |
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ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip)); |
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if (ret < 0) { |
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dev_err(&chip->client->dev, "failed reading register\n"); |
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return ret; |
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} |
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for (i = 0; i < NBANK(chip); i++) |
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bitmap_set_value8(val, value[i], i * BANK_SZ); |
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return 0; |
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} |
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static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
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{ |
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struct pca953x_chip *chip = gpiochip_get_data(gc); |
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u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); |
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u8 bit = BIT(off % BANK_SZ); |
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int ret; |
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|
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mutex_lock(&chip->i2c_lock); |
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ret = regmap_write_bits(chip->regmap, dirreg, bit, bit); |
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mutex_unlock(&chip->i2c_lock); |
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return ret; |
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} |
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static int pca953x_gpio_direction_output(struct gpio_chip *gc, |
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unsigned off, int val) |
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{ |
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struct pca953x_chip *chip = gpiochip_get_data(gc); |
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u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); |
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u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); |
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u8 bit = BIT(off % BANK_SZ); |
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int ret; |
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|
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mutex_lock(&chip->i2c_lock); |
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/* set output level */ |
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ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); |
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if (ret) |
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goto exit; |
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|
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/* then direction */ |
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ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); |
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exit: |
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mutex_unlock(&chip->i2c_lock); |
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return ret; |
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} |
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|
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static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) |
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{ |
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struct pca953x_chip *chip = gpiochip_get_data(gc); |
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u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off); |
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u8 bit = BIT(off % BANK_SZ); |
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u32 reg_val; |
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int ret; |
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|
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mutex_lock(&chip->i2c_lock); |
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ret = regmap_read(chip->regmap, inreg, ®_val); |
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mutex_unlock(&chip->i2c_lock); |
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if (ret < 0) |
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return ret; |
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|
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return !!(reg_val & bit); |
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} |
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|
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static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
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{ |
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struct pca953x_chip *chip = gpiochip_get_data(gc); |
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u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); |
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u8 bit = BIT(off % BANK_SZ); |
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|
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mutex_lock(&chip->i2c_lock); |
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regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); |
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mutex_unlock(&chip->i2c_lock); |
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} |
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|
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static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) |
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{ |
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struct pca953x_chip *chip = gpiochip_get_data(gc); |
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u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); |
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u8 bit = BIT(off % BANK_SZ); |
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u32 reg_val; |
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int ret; |
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|
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mutex_lock(&chip->i2c_lock); |
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ret = regmap_read(chip->regmap, dirreg, ®_val); |
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mutex_unlock(&chip->i2c_lock); |
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if (ret < 0) |
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return ret; |
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|
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if (reg_val & bit) |
|
return GPIO_LINE_DIRECTION_IN; |
|
|
|
return GPIO_LINE_DIRECTION_OUT; |
|
} |
|
|
|
static int pca953x_gpio_get_multiple(struct gpio_chip *gc, |
|
unsigned long *mask, unsigned long *bits) |
|
{ |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
DECLARE_BITMAP(reg_val, MAX_LINE); |
|
int ret; |
|
|
|
mutex_lock(&chip->i2c_lock); |
|
ret = pca953x_read_regs(chip, chip->regs->input, reg_val); |
|
mutex_unlock(&chip->i2c_lock); |
|
if (ret) |
|
return ret; |
|
|
|
bitmap_replace(bits, bits, reg_val, mask, gc->ngpio); |
|
return 0; |
|
} |
|
|
|
static void pca953x_gpio_set_multiple(struct gpio_chip *gc, |
|
unsigned long *mask, unsigned long *bits) |
|
{ |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
DECLARE_BITMAP(reg_val, MAX_LINE); |
|
int ret; |
|
|
|
mutex_lock(&chip->i2c_lock); |
|
ret = pca953x_read_regs(chip, chip->regs->output, reg_val); |
|
if (ret) |
|
goto exit; |
|
|
|
bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio); |
|
|
|
pca953x_write_regs(chip, chip->regs->output, reg_val); |
|
exit: |
|
mutex_unlock(&chip->i2c_lock); |
|
} |
|
|
|
static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip, |
|
unsigned int offset, |
|
unsigned long config) |
|
{ |
|
u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset); |
|
u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset); |
|
u8 bit = BIT(offset % BANK_SZ); |
|
int ret; |
|
|
|
/* |
|
* pull-up/pull-down configuration requires PCAL extended |
|
* registers |
|
*/ |
|
if (!(chip->driver_data & PCA_PCAL)) |
|
return -ENOTSUPP; |
|
|
|
mutex_lock(&chip->i2c_lock); |
|
|
|
/* Configure pull-up/pull-down */ |
|
if (config == PIN_CONFIG_BIAS_PULL_UP) |
|
ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit); |
|
else if (config == PIN_CONFIG_BIAS_PULL_DOWN) |
|
ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0); |
|
else |
|
ret = 0; |
|
if (ret) |
|
goto exit; |
|
|
|
/* Disable/Enable pull-up/pull-down */ |
|
if (config == PIN_CONFIG_BIAS_DISABLE) |
|
ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0); |
|
else |
|
ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit); |
|
|
|
exit: |
|
mutex_unlock(&chip->i2c_lock); |
|
return ret; |
|
} |
|
|
|
static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset, |
|
unsigned long config) |
|
{ |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
|
|
switch (pinconf_to_config_param(config)) { |
|
case PIN_CONFIG_BIAS_PULL_UP: |
|
case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: |
|
case PIN_CONFIG_BIAS_PULL_DOWN: |
|
case PIN_CONFIG_BIAS_DISABLE: |
|
return pca953x_gpio_set_pull_up_down(chip, offset, config); |
|
default: |
|
return -ENOTSUPP; |
|
} |
|
} |
|
|
|
static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) |
|
{ |
|
struct gpio_chip *gc; |
|
|
|
gc = &chip->gpio_chip; |
|
|
|
gc->direction_input = pca953x_gpio_direction_input; |
|
gc->direction_output = pca953x_gpio_direction_output; |
|
gc->get = pca953x_gpio_get_value; |
|
gc->set = pca953x_gpio_set_value; |
|
gc->get_direction = pca953x_gpio_get_direction; |
|
gc->get_multiple = pca953x_gpio_get_multiple; |
|
gc->set_multiple = pca953x_gpio_set_multiple; |
|
gc->set_config = pca953x_gpio_set_config; |
|
gc->can_sleep = true; |
|
|
|
gc->base = chip->gpio_start; |
|
gc->ngpio = gpios; |
|
gc->label = dev_name(&chip->client->dev); |
|
gc->parent = &chip->client->dev; |
|
gc->owner = THIS_MODULE; |
|
gc->names = chip->names; |
|
} |
|
|
|
#ifdef CONFIG_GPIO_PCA953X_IRQ |
|
static void pca953x_irq_mask(struct irq_data *d) |
|
{ |
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
irq_hw_number_t hwirq = irqd_to_hwirq(d); |
|
|
|
clear_bit(hwirq, chip->irq_mask); |
|
} |
|
|
|
static void pca953x_irq_unmask(struct irq_data *d) |
|
{ |
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
irq_hw_number_t hwirq = irqd_to_hwirq(d); |
|
|
|
set_bit(hwirq, chip->irq_mask); |
|
} |
|
|
|
static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on) |
|
{ |
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
|
|
if (on) |
|
atomic_inc(&chip->wakeup_path); |
|
else |
|
atomic_dec(&chip->wakeup_path); |
|
|
|
return irq_set_irq_wake(chip->client->irq, on); |
|
} |
|
|
|
static void pca953x_irq_bus_lock(struct irq_data *d) |
|
{ |
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
|
|
mutex_lock(&chip->irq_lock); |
|
} |
|
|
|
static void pca953x_irq_bus_sync_unlock(struct irq_data *d) |
|
{ |
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
DECLARE_BITMAP(irq_mask, MAX_LINE); |
|
DECLARE_BITMAP(reg_direction, MAX_LINE); |
|
int level; |
|
|
|
if (chip->driver_data & PCA_PCAL) { |
|
/* Enable latch on interrupt-enabled inputs */ |
|
pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); |
|
|
|
bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio); |
|
|
|
/* Unmask enabled interrupts */ |
|
pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask); |
|
} |
|
|
|
/* Switch direction to input if needed */ |
|
pca953x_read_regs(chip, chip->regs->direction, reg_direction); |
|
|
|
bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio); |
|
bitmap_complement(reg_direction, reg_direction, gc->ngpio); |
|
bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio); |
|
|
|
/* Look for any newly setup interrupt */ |
|
for_each_set_bit(level, irq_mask, gc->ngpio) |
|
pca953x_gpio_direction_input(&chip->gpio_chip, level); |
|
|
|
mutex_unlock(&chip->irq_lock); |
|
} |
|
|
|
static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) |
|
{ |
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
irq_hw_number_t hwirq = irqd_to_hwirq(d); |
|
|
|
if (!(type & IRQ_TYPE_EDGE_BOTH)) { |
|
dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", |
|
d->irq, type); |
|
return -EINVAL; |
|
} |
|
|
|
assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING); |
|
assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING); |
|
|
|
return 0; |
|
} |
|
|
|
static void pca953x_irq_shutdown(struct irq_data *d) |
|
{ |
|
struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
|
struct pca953x_chip *chip = gpiochip_get_data(gc); |
|
irq_hw_number_t hwirq = irqd_to_hwirq(d); |
|
|
|
clear_bit(hwirq, chip->irq_trig_raise); |
|
clear_bit(hwirq, chip->irq_trig_fall); |
|
} |
|
|
|
static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending) |
|
{ |
|
struct gpio_chip *gc = &chip->gpio_chip; |
|
DECLARE_BITMAP(reg_direction, MAX_LINE); |
|
DECLARE_BITMAP(old_stat, MAX_LINE); |
|
DECLARE_BITMAP(cur_stat, MAX_LINE); |
|
DECLARE_BITMAP(new_stat, MAX_LINE); |
|
DECLARE_BITMAP(trigger, MAX_LINE); |
|
int ret; |
|
|
|
if (chip->driver_data & PCA_PCAL) { |
|
/* Read the current interrupt status from the device */ |
|
ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); |
|
if (ret) |
|
return false; |
|
|
|
/* Check latched inputs and clear interrupt status */ |
|
ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); |
|
if (ret) |
|
return false; |
|
|
|
/* Apply filter for rising/falling edge selection */ |
|
bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio); |
|
|
|
bitmap_and(pending, new_stat, trigger, gc->ngpio); |
|
|
|
return !bitmap_empty(pending, gc->ngpio); |
|
} |
|
|
|
ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); |
|
if (ret) |
|
return false; |
|
|
|
/* Remove output pins from the equation */ |
|
pca953x_read_regs(chip, chip->regs->direction, reg_direction); |
|
|
|
bitmap_copy(old_stat, chip->irq_stat, gc->ngpio); |
|
|
|
bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio); |
|
bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio); |
|
bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio); |
|
|
|
if (bitmap_empty(trigger, gc->ngpio)) |
|
return false; |
|
|
|
bitmap_copy(chip->irq_stat, new_stat, gc->ngpio); |
|
|
|
bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio); |
|
bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio); |
|
bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio); |
|
bitmap_and(pending, new_stat, trigger, gc->ngpio); |
|
|
|
return !bitmap_empty(pending, gc->ngpio); |
|
} |
|
|
|
static irqreturn_t pca953x_irq_handler(int irq, void *devid) |
|
{ |
|
struct pca953x_chip *chip = devid; |
|
struct gpio_chip *gc = &chip->gpio_chip; |
|
DECLARE_BITMAP(pending, MAX_LINE); |
|
int level; |
|
bool ret; |
|
|
|
bitmap_zero(pending, MAX_LINE); |
|
|
|
mutex_lock(&chip->i2c_lock); |
|
ret = pca953x_irq_pending(chip, pending); |
|
mutex_unlock(&chip->i2c_lock); |
|
|
|
if (ret) { |
|
ret = 0; |
|
|
|
for_each_set_bit(level, pending, gc->ngpio) { |
|
int nested_irq = irq_find_mapping(gc->irq.domain, level); |
|
|
|
if (unlikely(nested_irq <= 0)) { |
|
dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level); |
|
continue; |
|
} |
|
|
|
handle_nested_irq(nested_irq); |
|
ret = 1; |
|
} |
|
} |
|
|
|
return IRQ_RETVAL(ret); |
|
} |
|
|
|
static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) |
|
{ |
|
struct i2c_client *client = chip->client; |
|
struct irq_chip *irq_chip = &chip->irq_chip; |
|
DECLARE_BITMAP(reg_direction, MAX_LINE); |
|
DECLARE_BITMAP(irq_stat, MAX_LINE); |
|
struct gpio_irq_chip *girq; |
|
int ret; |
|
|
|
if (dmi_first_match(pca953x_dmi_acpi_irq_info)) { |
|
ret = pca953x_acpi_get_irq(&client->dev); |
|
if (ret > 0) |
|
client->irq = ret; |
|
} |
|
|
|
if (!client->irq) |
|
return 0; |
|
|
|
if (irq_base == -1) |
|
return 0; |
|
|
|
if (!(chip->driver_data & PCA_INT)) |
|
return 0; |
|
|
|
ret = pca953x_read_regs(chip, chip->regs->input, irq_stat); |
|
if (ret) |
|
return ret; |
|
|
|
/* |
|
* There is no way to know which GPIO line generated the |
|
* interrupt. We have to rely on the previous read for |
|
* this purpose. |
|
*/ |
|
pca953x_read_regs(chip, chip->regs->direction, reg_direction); |
|
bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio); |
|
mutex_init(&chip->irq_lock); |
|
|
|
irq_chip->name = dev_name(&client->dev); |
|
irq_chip->irq_mask = pca953x_irq_mask; |
|
irq_chip->irq_unmask = pca953x_irq_unmask; |
|
irq_chip->irq_set_wake = pca953x_irq_set_wake; |
|
irq_chip->irq_bus_lock = pca953x_irq_bus_lock; |
|
irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock; |
|
irq_chip->irq_set_type = pca953x_irq_set_type; |
|
irq_chip->irq_shutdown = pca953x_irq_shutdown; |
|
|
|
girq = &chip->gpio_chip.irq; |
|
girq->chip = irq_chip; |
|
/* This will let us handle the parent IRQ in the driver */ |
|
girq->parent_handler = NULL; |
|
girq->num_parents = 0; |
|
girq->parents = NULL; |
|
girq->default_type = IRQ_TYPE_NONE; |
|
girq->handler = handle_simple_irq; |
|
girq->threaded = true; |
|
girq->first = irq_base; /* FIXME: get rid of this */ |
|
|
|
ret = devm_request_threaded_irq(&client->dev, client->irq, |
|
NULL, pca953x_irq_handler, |
|
IRQF_ONESHOT | IRQF_SHARED, |
|
dev_name(&client->dev), chip); |
|
if (ret) { |
|
dev_err(&client->dev, "failed to request irq %d\n", |
|
client->irq); |
|
return ret; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
#else /* CONFIG_GPIO_PCA953X_IRQ */ |
|
static int pca953x_irq_setup(struct pca953x_chip *chip, |
|
int irq_base) |
|
{ |
|
struct i2c_client *client = chip->client; |
|
|
|
if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT)) |
|
dev_warn(&client->dev, "interrupt support not compiled in\n"); |
|
|
|
return 0; |
|
} |
|
#endif |
|
|
|
static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) |
|
{ |
|
DECLARE_BITMAP(val, MAX_LINE); |
|
int ret; |
|
|
|
ret = regcache_sync_region(chip->regmap, chip->regs->output, |
|
chip->regs->output + NBANK(chip)); |
|
if (ret) |
|
goto out; |
|
|
|
ret = regcache_sync_region(chip->regmap, chip->regs->direction, |
|
chip->regs->direction + NBANK(chip)); |
|
if (ret) |
|
goto out; |
|
|
|
/* set platform specific polarity inversion */ |
|
if (invert) |
|
bitmap_fill(val, MAX_LINE); |
|
else |
|
bitmap_zero(val, MAX_LINE); |
|
|
|
ret = pca953x_write_regs(chip, chip->regs->invert, val); |
|
out: |
|
return ret; |
|
} |
|
|
|
static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) |
|
{ |
|
DECLARE_BITMAP(val, MAX_LINE); |
|
unsigned int i; |
|
int ret; |
|
|
|
ret = device_pca95xx_init(chip, invert); |
|
if (ret) |
|
goto out; |
|
|
|
/* To enable register 6, 7 to control pull up and pull down */ |
|
for (i = 0; i < NBANK(chip); i++) |
|
bitmap_set_value8(val, 0x02, i * BANK_SZ); |
|
|
|
ret = pca953x_write_regs(chip, PCA957X_BKEN, val); |
|
if (ret) |
|
goto out; |
|
|
|
return 0; |
|
out: |
|
return ret; |
|
} |
|
|
|
static int pca953x_probe(struct i2c_client *client, |
|
const struct i2c_device_id *i2c_id) |
|
{ |
|
struct pca953x_platform_data *pdata; |
|
struct pca953x_chip *chip; |
|
int irq_base = 0; |
|
int ret; |
|
u32 invert = 0; |
|
struct regulator *reg; |
|
const struct regmap_config *regmap_config; |
|
|
|
chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); |
|
if (chip == NULL) |
|
return -ENOMEM; |
|
|
|
pdata = dev_get_platdata(&client->dev); |
|
if (pdata) { |
|
irq_base = pdata->irq_base; |
|
chip->gpio_start = pdata->gpio_base; |
|
invert = pdata->invert; |
|
chip->names = pdata->names; |
|
} else { |
|
struct gpio_desc *reset_gpio; |
|
|
|
chip->gpio_start = -1; |
|
irq_base = 0; |
|
|
|
/* |
|
* See if we need to de-assert a reset pin. |
|
* |
|
* There is no known ACPI-enabled platforms that are |
|
* using "reset" GPIO. Otherwise any of those platform |
|
* must use _DSD method with corresponding property. |
|
*/ |
|
reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", |
|
GPIOD_OUT_LOW); |
|
if (IS_ERR(reset_gpio)) |
|
return PTR_ERR(reset_gpio); |
|
} |
|
|
|
chip->client = client; |
|
|
|
reg = devm_regulator_get(&client->dev, "vcc"); |
|
if (IS_ERR(reg)) |
|
return dev_err_probe(&client->dev, PTR_ERR(reg), "reg get err\n"); |
|
|
|
ret = regulator_enable(reg); |
|
if (ret) { |
|
dev_err(&client->dev, "reg en err: %d\n", ret); |
|
return ret; |
|
} |
|
chip->regulator = reg; |
|
|
|
if (i2c_id) { |
|
chip->driver_data = i2c_id->driver_data; |
|
} else { |
|
const void *match; |
|
|
|
match = device_get_match_data(&client->dev); |
|
if (!match) { |
|
ret = -ENODEV; |
|
goto err_exit; |
|
} |
|
|
|
chip->driver_data = (uintptr_t)match; |
|
} |
|
|
|
i2c_set_clientdata(client, chip); |
|
|
|
pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); |
|
|
|
if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) { |
|
dev_info(&client->dev, "using AI\n"); |
|
regmap_config = &pca953x_ai_i2c_regmap; |
|
} else { |
|
dev_info(&client->dev, "using no AI\n"); |
|
regmap_config = &pca953x_i2c_regmap; |
|
} |
|
|
|
chip->regmap = devm_regmap_init_i2c(client, regmap_config); |
|
if (IS_ERR(chip->regmap)) { |
|
ret = PTR_ERR(chip->regmap); |
|
goto err_exit; |
|
} |
|
|
|
regcache_mark_dirty(chip->regmap); |
|
|
|
mutex_init(&chip->i2c_lock); |
|
/* |
|
* In case we have an i2c-mux controlled by a GPIO provided by an |
|
* expander using the same driver higher on the device tree, read the |
|
* i2c adapter nesting depth and use the retrieved value as lockdep |
|
* subclass for chip->i2c_lock. |
|
* |
|
* REVISIT: This solution is not complete. It protects us from lockdep |
|
* false positives when the expander controlling the i2c-mux is on |
|
* a different level on the device tree, but not when it's on the same |
|
* level on a different branch (in which case the subclass number |
|
* would be the same). |
|
* |
|
* TODO: Once a correct solution is developed, a similar fix should be |
|
* applied to all other i2c-controlled GPIO expanders (and potentially |
|
* regmap-i2c). |
|
*/ |
|
lockdep_set_subclass(&chip->i2c_lock, |
|
i2c_adapter_depth(client->adapter)); |
|
|
|
/* initialize cached registers from their original values. |
|
* we can't share this chip with another i2c master. |
|
*/ |
|
|
|
if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { |
|
chip->regs = &pca953x_regs; |
|
ret = device_pca95xx_init(chip, invert); |
|
} else { |
|
chip->regs = &pca957x_regs; |
|
ret = device_pca957x_init(chip, invert); |
|
} |
|
if (ret) |
|
goto err_exit; |
|
|
|
ret = pca953x_irq_setup(chip, irq_base); |
|
if (ret) |
|
goto err_exit; |
|
|
|
ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); |
|
if (ret) |
|
goto err_exit; |
|
|
|
if (pdata && pdata->setup) { |
|
ret = pdata->setup(client, chip->gpio_chip.base, |
|
chip->gpio_chip.ngpio, pdata->context); |
|
if (ret < 0) |
|
dev_warn(&client->dev, "setup failed, %d\n", ret); |
|
} |
|
|
|
return 0; |
|
|
|
err_exit: |
|
regulator_disable(chip->regulator); |
|
return ret; |
|
} |
|
|
|
static int pca953x_remove(struct i2c_client *client) |
|
{ |
|
struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); |
|
struct pca953x_chip *chip = i2c_get_clientdata(client); |
|
int ret; |
|
|
|
if (pdata && pdata->teardown) { |
|
ret = pdata->teardown(client, chip->gpio_chip.base, |
|
chip->gpio_chip.ngpio, pdata->context); |
|
if (ret < 0) |
|
dev_err(&client->dev, "teardown failed, %d\n", ret); |
|
} else { |
|
ret = 0; |
|
} |
|
|
|
regulator_disable(chip->regulator); |
|
|
|
return ret; |
|
} |
|
|
|
#ifdef CONFIG_PM_SLEEP |
|
static int pca953x_regcache_sync(struct device *dev) |
|
{ |
|
struct pca953x_chip *chip = dev_get_drvdata(dev); |
|
int ret; |
|
|
|
/* |
|
* The ordering between direction and output is important, |
|
* sync these registers first and only then sync the rest. |
|
*/ |
|
ret = regcache_sync_region(chip->regmap, chip->regs->direction, |
|
chip->regs->direction + NBANK(chip)); |
|
if (ret) { |
|
dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); |
|
return ret; |
|
} |
|
|
|
ret = regcache_sync_region(chip->regmap, chip->regs->output, |
|
chip->regs->output + NBANK(chip)); |
|
if (ret) { |
|
dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); |
|
return ret; |
|
} |
|
|
|
#ifdef CONFIG_GPIO_PCA953X_IRQ |
|
if (chip->driver_data & PCA_PCAL) { |
|
ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, |
|
PCAL953X_IN_LATCH + NBANK(chip)); |
|
if (ret) { |
|
dev_err(dev, "Failed to sync INT latch registers: %d\n", |
|
ret); |
|
return ret; |
|
} |
|
|
|
ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, |
|
PCAL953X_INT_MASK + NBANK(chip)); |
|
if (ret) { |
|
dev_err(dev, "Failed to sync INT mask registers: %d\n", |
|
ret); |
|
return ret; |
|
} |
|
} |
|
#endif |
|
|
|
return 0; |
|
} |
|
|
|
static int pca953x_suspend(struct device *dev) |
|
{ |
|
struct pca953x_chip *chip = dev_get_drvdata(dev); |
|
|
|
regcache_cache_only(chip->regmap, true); |
|
|
|
if (atomic_read(&chip->wakeup_path)) |
|
device_set_wakeup_path(dev); |
|
else |
|
regulator_disable(chip->regulator); |
|
|
|
return 0; |
|
} |
|
|
|
static int pca953x_resume(struct device *dev) |
|
{ |
|
struct pca953x_chip *chip = dev_get_drvdata(dev); |
|
int ret; |
|
|
|
if (!atomic_read(&chip->wakeup_path)) { |
|
ret = regulator_enable(chip->regulator); |
|
if (ret) { |
|
dev_err(dev, "Failed to enable regulator: %d\n", ret); |
|
return 0; |
|
} |
|
} |
|
|
|
regcache_cache_only(chip->regmap, false); |
|
regcache_mark_dirty(chip->regmap); |
|
ret = pca953x_regcache_sync(dev); |
|
if (ret) |
|
return ret; |
|
|
|
ret = regcache_sync(chip->regmap); |
|
if (ret) { |
|
dev_err(dev, "Failed to restore register map: %d\n", ret); |
|
return ret; |
|
} |
|
|
|
return 0; |
|
} |
|
#endif |
|
|
|
/* convenience to stop overlong match-table lines */ |
|
#define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) |
|
#define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) |
|
|
|
static const struct of_device_id pca953x_dt_ids[] = { |
|
{ .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), }, |
|
{ .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, |
|
{ .compatible = "nxp,pca9506", .data = OF_953X(40, PCA_INT), }, |
|
{ .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, |
|
{ .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, |
|
{ .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, |
|
{ .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, |
|
{ .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, |
|
{ .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, |
|
{ .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, |
|
{ .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, |
|
{ .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, |
|
{ .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, |
|
{ .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, |
|
{ .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, |
|
{ .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, |
|
|
|
{ .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), }, |
|
{ .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), }, |
|
{ .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), }, |
|
{ .compatible = "nxp,pcal9554b", .data = OF_953X( 8, PCA_LATCH_INT), }, |
|
{ .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), }, |
|
|
|
{ .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, |
|
{ .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, |
|
{ .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, |
|
{ .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, |
|
{ .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), }, |
|
|
|
{ .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, |
|
{ .compatible = "ti,pca9536", .data = OF_953X( 4, 0), }, |
|
{ .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, |
|
{ .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, |
|
{ .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, |
|
{ .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), }, |
|
|
|
{ .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), }, |
|
{ .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), }, |
|
{ .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), }, |
|
|
|
{ .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, |
|
{ } |
|
}; |
|
|
|
MODULE_DEVICE_TABLE(of, pca953x_dt_ids); |
|
|
|
static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume); |
|
|
|
static struct i2c_driver pca953x_driver = { |
|
.driver = { |
|
.name = "pca953x", |
|
.pm = &pca953x_pm_ops, |
|
.of_match_table = pca953x_dt_ids, |
|
.acpi_match_table = pca953x_acpi_ids, |
|
}, |
|
.probe = pca953x_probe, |
|
.remove = pca953x_remove, |
|
.id_table = pca953x_id, |
|
}; |
|
|
|
static int __init pca953x_init(void) |
|
{ |
|
return i2c_add_driver(&pca953x_driver); |
|
} |
|
/* register after i2c postcore initcall and before |
|
* subsys initcalls that may rely on these GPIOs |
|
*/ |
|
subsys_initcall(pca953x_init); |
|
|
|
static void __exit pca953x_exit(void) |
|
{ |
|
i2c_del_driver(&pca953x_driver); |
|
} |
|
module_exit(pca953x_exit); |
|
|
|
MODULE_AUTHOR("eric miao <[email protected]>"); |
|
MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); |
|
MODULE_LICENSE("GPL");
|
|
|