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659 lines
18 KiB
659 lines
18 KiB
/* |
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* For documentation on the i460 AGP interface, see Chapter 7 (AGP Subsystem) of |
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* the "Intel 460GTX Chipset Software Developer's Manual": |
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* http://www.intel.com/design/archives/itanium/downloads/248704.htm |
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*/ |
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/* |
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* 460GX support by Chris Ahna <[email protected]> |
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* Clean up & simplification by David Mosberger-Tang <[email protected]> |
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*/ |
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#include <linux/module.h> |
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#include <linux/pci.h> |
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#include <linux/init.h> |
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#include <linux/string.h> |
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#include <linux/slab.h> |
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#include <linux/agp_backend.h> |
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#include <linux/log2.h> |
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|
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#include "agp.h" |
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|
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#define INTEL_I460_BAPBASE 0x98 |
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#define INTEL_I460_GXBCTL 0xa0 |
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#define INTEL_I460_AGPSIZ 0xa2 |
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#define INTEL_I460_ATTBASE 0xfe200000 |
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#define INTEL_I460_GATT_VALID (1UL << 24) |
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#define INTEL_I460_GATT_COHERENT (1UL << 25) |
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|
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/* |
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* The i460 can operate with large (4MB) pages, but there is no sane way to support this |
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* within the current kernel/DRM environment, so we disable the relevant code for now. |
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* See also comments in ia64_alloc_page()... |
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*/ |
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#define I460_LARGE_IO_PAGES 0 |
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|
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#if I460_LARGE_IO_PAGES |
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# define I460_IO_PAGE_SHIFT i460.io_page_shift |
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#else |
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# define I460_IO_PAGE_SHIFT 12 |
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#endif |
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|
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#define I460_IOPAGES_PER_KPAGE (PAGE_SIZE >> I460_IO_PAGE_SHIFT) |
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#define I460_KPAGES_PER_IOPAGE (1 << (I460_IO_PAGE_SHIFT - PAGE_SHIFT)) |
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#define I460_SRAM_IO_DISABLE (1 << 4) |
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#define I460_BAPBASE_ENABLE (1 << 3) |
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#define I460_AGPSIZ_MASK 0x7 |
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#define I460_4M_PS (1 << 1) |
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|
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/* Control bits for Out-Of-GART coherency and Burst Write Combining */ |
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#define I460_GXBCTL_OOG (1UL << 0) |
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#define I460_GXBCTL_BWC (1UL << 2) |
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|
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/* |
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* gatt_table entries are 32-bits wide on the i460; the generic code ought to declare the |
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* gatt_table and gatt_table_real pointers a "void *"... |
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*/ |
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#define RD_GATT(index) readl((u32 *) i460.gatt + (index)) |
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#define WR_GATT(index, val) writel((val), (u32 *) i460.gatt + (index)) |
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/* |
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* The 460 spec says we have to read the last location written to make sure that all |
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* writes have taken effect |
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*/ |
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#define WR_FLUSH_GATT(index) RD_GATT(index) |
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|
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static unsigned long i460_mask_memory (struct agp_bridge_data *bridge, |
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dma_addr_t addr, int type); |
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|
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static struct { |
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void *gatt; /* ioremap'd GATT area */ |
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|
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/* i460 supports multiple GART page sizes, so GART pageshift is dynamic: */ |
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u8 io_page_shift; |
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|
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/* BIOS configures chipset to one of 2 possible apbase values: */ |
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u8 dynamic_apbase; |
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|
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/* structure for tracking partial use of 4MB GART pages: */ |
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struct lp_desc { |
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unsigned long *alloced_map; /* bitmap of kernel-pages in use */ |
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int refcount; /* number of kernel pages using the large page */ |
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u64 paddr; /* physical address of large page */ |
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struct page *page; /* page pointer */ |
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} *lp_desc; |
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} i460; |
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static const struct aper_size_info_8 i460_sizes[3] = |
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{ |
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/* |
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* The 32GB aperture is only available with a 4M GART page size. Due to the |
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* dynamic GART page size, we can't figure out page_order or num_entries until |
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* runtime. |
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*/ |
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{32768, 0, 0, 4}, |
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{1024, 0, 0, 2}, |
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{256, 0, 0, 1} |
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}; |
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static struct gatt_mask i460_masks[] = |
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{ |
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{ |
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.mask = INTEL_I460_GATT_VALID | INTEL_I460_GATT_COHERENT, |
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.type = 0 |
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} |
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}; |
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static int i460_fetch_size (void) |
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{ |
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int i; |
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u8 temp; |
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struct aper_size_info_8 *values; |
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|
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/* Determine the GART page size */ |
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pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &temp); |
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i460.io_page_shift = (temp & I460_4M_PS) ? 22 : 12; |
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pr_debug("i460_fetch_size: io_page_shift=%d\n", i460.io_page_shift); |
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if (i460.io_page_shift != I460_IO_PAGE_SHIFT) { |
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printk(KERN_ERR PFX |
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"I/O (GART) page-size %luKB doesn't match expected " |
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"size %luKB\n", |
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1UL << (i460.io_page_shift - 10), |
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1UL << (I460_IO_PAGE_SHIFT)); |
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return 0; |
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} |
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values = A_SIZE_8(agp_bridge->driver->aperture_sizes); |
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pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp); |
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|
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/* Exit now if the IO drivers for the GART SRAMS are turned off */ |
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if (temp & I460_SRAM_IO_DISABLE) { |
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printk(KERN_ERR PFX "GART SRAMS disabled on 460GX chipset\n"); |
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printk(KERN_ERR PFX "AGPGART operation not possible\n"); |
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return 0; |
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} |
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|
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/* Make sure we don't try to create an 2 ^ 23 entry GATT */ |
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if ((i460.io_page_shift == 0) && ((temp & I460_AGPSIZ_MASK) == 4)) { |
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printk(KERN_ERR PFX "We can't have a 32GB aperture with 4KB GART pages\n"); |
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return 0; |
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} |
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|
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/* Determine the proper APBASE register */ |
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if (temp & I460_BAPBASE_ENABLE) |
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i460.dynamic_apbase = INTEL_I460_BAPBASE; |
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else |
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i460.dynamic_apbase = AGP_APBASE; |
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|
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for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { |
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/* |
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* Dynamically calculate the proper num_entries and page_order values for |
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* the define aperture sizes. Take care not to shift off the end of |
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* values[i].size. |
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*/ |
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values[i].num_entries = (values[i].size << 8) >> (I460_IO_PAGE_SHIFT - 12); |
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values[i].page_order = ilog2((sizeof(u32)*values[i].num_entries) >> PAGE_SHIFT); |
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} |
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for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { |
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/* Neglect control bits when matching up size_value */ |
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if ((temp & I460_AGPSIZ_MASK) == values[i].size_value) { |
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agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i); |
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agp_bridge->aperture_size_idx = i; |
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return values[i].size; |
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} |
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} |
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|
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return 0; |
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} |
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|
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/* There isn't anything to do here since 460 has no GART TLB. */ |
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static void i460_tlb_flush (struct agp_memory *mem) |
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{ |
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return; |
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} |
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|
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/* |
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* This utility function is needed to prevent corruption of the control bits |
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* which are stored along with the aperture size in 460's AGPSIZ register |
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*/ |
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static void i460_write_agpsiz (u8 size_value) |
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{ |
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u8 temp; |
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pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp); |
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pci_write_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, |
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((temp & ~I460_AGPSIZ_MASK) | size_value)); |
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} |
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static void i460_cleanup (void) |
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{ |
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struct aper_size_info_8 *previous_size; |
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previous_size = A_SIZE_8(agp_bridge->previous_size); |
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i460_write_agpsiz(previous_size->size_value); |
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if (I460_IO_PAGE_SHIFT > PAGE_SHIFT) |
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kfree(i460.lp_desc); |
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} |
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static int i460_configure (void) |
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{ |
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union { |
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u32 small[2]; |
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u64 large; |
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} temp; |
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size_t size; |
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u8 scratch; |
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struct aper_size_info_8 *current_size; |
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temp.large = 0; |
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current_size = A_SIZE_8(agp_bridge->current_size); |
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i460_write_agpsiz(current_size->size_value); |
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|
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/* |
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* Do the necessary rigmarole to read all eight bytes of APBASE. |
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* This has to be done since the AGP aperture can be above 4GB on |
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* 460 based systems. |
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*/ |
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pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase, &(temp.small[0])); |
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pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase + 4, &(temp.small[1])); |
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/* Clear BAR control bits */ |
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agp_bridge->gart_bus_addr = temp.large & ~((1UL << 3) - 1); |
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pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &scratch); |
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pci_write_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, |
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(scratch & 0x02) | I460_GXBCTL_OOG | I460_GXBCTL_BWC); |
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/* |
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* Initialize partial allocation trackers if a GART page is bigger than a kernel |
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* page. |
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*/ |
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if (I460_IO_PAGE_SHIFT > PAGE_SHIFT) { |
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size = current_size->num_entries * sizeof(i460.lp_desc[0]); |
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i460.lp_desc = kzalloc(size, GFP_KERNEL); |
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if (!i460.lp_desc) |
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return -ENOMEM; |
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} |
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return 0; |
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} |
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static int i460_create_gatt_table (struct agp_bridge_data *bridge) |
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{ |
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int page_order, num_entries, i; |
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void *temp; |
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|
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/* |
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* Load up the fixed address of the GART SRAMS which hold our GATT table. |
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*/ |
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temp = agp_bridge->current_size; |
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page_order = A_SIZE_8(temp)->page_order; |
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num_entries = A_SIZE_8(temp)->num_entries; |
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i460.gatt = ioremap(INTEL_I460_ATTBASE, PAGE_SIZE << page_order); |
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if (!i460.gatt) { |
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printk(KERN_ERR PFX "ioremap failed\n"); |
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return -ENOMEM; |
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} |
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/* These are no good, the should be removed from the agp_bridge strucure... */ |
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agp_bridge->gatt_table_real = NULL; |
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agp_bridge->gatt_table = NULL; |
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agp_bridge->gatt_bus_addr = 0; |
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for (i = 0; i < num_entries; ++i) |
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WR_GATT(i, 0); |
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WR_FLUSH_GATT(i - 1); |
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return 0; |
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} |
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static int i460_free_gatt_table (struct agp_bridge_data *bridge) |
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{ |
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int num_entries, i; |
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void *temp; |
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temp = agp_bridge->current_size; |
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num_entries = A_SIZE_8(temp)->num_entries; |
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for (i = 0; i < num_entries; ++i) |
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WR_GATT(i, 0); |
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WR_FLUSH_GATT(num_entries - 1); |
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iounmap(i460.gatt); |
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return 0; |
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} |
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/* |
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* The following functions are called when the I/O (GART) page size is smaller than |
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* PAGE_SIZE. |
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*/ |
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static int i460_insert_memory_small_io_page (struct agp_memory *mem, |
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off_t pg_start, int type) |
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{ |
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unsigned long paddr, io_pg_start, io_page_size; |
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int i, j, k, num_entries; |
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void *temp; |
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pr_debug("i460_insert_memory_small_io_page(mem=%p, pg_start=%ld, type=%d, paddr0=0x%lx)\n", |
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mem, pg_start, type, page_to_phys(mem->pages[0])); |
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if (type >= AGP_USER_TYPES || mem->type >= AGP_USER_TYPES) |
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return -EINVAL; |
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io_pg_start = I460_IOPAGES_PER_KPAGE * pg_start; |
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temp = agp_bridge->current_size; |
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num_entries = A_SIZE_8(temp)->num_entries; |
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if ((io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count) > num_entries) { |
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printk(KERN_ERR PFX "Looks like we're out of AGP memory\n"); |
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return -EINVAL; |
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} |
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j = io_pg_start; |
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while (j < (io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count)) { |
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if (!PGE_EMPTY(agp_bridge, RD_GATT(j))) { |
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pr_debug("i460_insert_memory_small_io_page: GATT[%d]=0x%x is busy\n", |
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j, RD_GATT(j)); |
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return -EBUSY; |
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} |
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j++; |
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} |
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io_page_size = 1UL << I460_IO_PAGE_SHIFT; |
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for (i = 0, j = io_pg_start; i < mem->page_count; i++) { |
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paddr = page_to_phys(mem->pages[i]); |
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for (k = 0; k < I460_IOPAGES_PER_KPAGE; k++, j++, paddr += io_page_size) |
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WR_GATT(j, i460_mask_memory(agp_bridge, paddr, mem->type)); |
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} |
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WR_FLUSH_GATT(j - 1); |
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return 0; |
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} |
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static int i460_remove_memory_small_io_page(struct agp_memory *mem, |
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off_t pg_start, int type) |
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{ |
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int i; |
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pr_debug("i460_remove_memory_small_io_page(mem=%p, pg_start=%ld, type=%d)\n", |
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mem, pg_start, type); |
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pg_start = I460_IOPAGES_PER_KPAGE * pg_start; |
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for (i = pg_start; i < (pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count); i++) |
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WR_GATT(i, 0); |
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WR_FLUSH_GATT(i - 1); |
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return 0; |
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} |
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|
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#if I460_LARGE_IO_PAGES |
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|
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/* |
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* These functions are called when the I/O (GART) page size exceeds PAGE_SIZE. |
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* |
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* This situation is interesting since AGP memory allocations that are smaller than a |
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* single GART page are possible. The i460.lp_desc array tracks partial allocation of the |
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* large GART pages to work around this issue. |
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* |
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* i460.lp_desc[pg_num].refcount tracks the number of kernel pages in use within GART page |
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* pg_num. i460.lp_desc[pg_num].paddr is the physical address of the large page and |
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* i460.lp_desc[pg_num].alloced_map is a bitmap of kernel pages that are in use (allocated). |
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*/ |
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|
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static int i460_alloc_large_page (struct lp_desc *lp) |
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{ |
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unsigned long order = I460_IO_PAGE_SHIFT - PAGE_SHIFT; |
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size_t map_size; |
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lp->page = alloc_pages(GFP_KERNEL, order); |
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if (!lp->page) { |
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printk(KERN_ERR PFX "Couldn't alloc 4M GART page...\n"); |
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return -ENOMEM; |
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} |
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map_size = ((I460_KPAGES_PER_IOPAGE + BITS_PER_LONG - 1) & -BITS_PER_LONG)/8; |
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lp->alloced_map = kzalloc(map_size, GFP_KERNEL); |
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if (!lp->alloced_map) { |
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__free_pages(lp->page, order); |
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printk(KERN_ERR PFX "Out of memory, we're in trouble...\n"); |
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return -ENOMEM; |
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} |
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lp->paddr = page_to_phys(lp->page); |
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lp->refcount = 0; |
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atomic_add(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp); |
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return 0; |
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} |
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static void i460_free_large_page (struct lp_desc *lp) |
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{ |
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kfree(lp->alloced_map); |
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lp->alloced_map = NULL; |
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__free_pages(lp->page, I460_IO_PAGE_SHIFT - PAGE_SHIFT); |
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atomic_sub(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp); |
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} |
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static int i460_insert_memory_large_io_page (struct agp_memory *mem, |
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off_t pg_start, int type) |
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{ |
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int i, start_offset, end_offset, idx, pg, num_entries; |
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struct lp_desc *start, *end, *lp; |
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void *temp; |
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if (type >= AGP_USER_TYPES || mem->type >= AGP_USER_TYPES) |
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return -EINVAL; |
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temp = agp_bridge->current_size; |
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num_entries = A_SIZE_8(temp)->num_entries; |
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|
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/* Figure out what pg_start means in terms of our large GART pages */ |
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start = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE]; |
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end = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE]; |
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start_offset = pg_start % I460_KPAGES_PER_IOPAGE; |
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end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE; |
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if (end > i460.lp_desc + num_entries) { |
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printk(KERN_ERR PFX "Looks like we're out of AGP memory\n"); |
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return -EINVAL; |
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} |
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|
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/* Check if the requested region of the aperture is free */ |
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for (lp = start; lp <= end; ++lp) { |
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if (!lp->alloced_map) |
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continue; /* OK, the entire large page is available... */ |
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|
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for (idx = ((lp == start) ? start_offset : 0); |
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idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE); |
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idx++) |
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{ |
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if (test_bit(idx, lp->alloced_map)) |
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return -EBUSY; |
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} |
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} |
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for (lp = start, i = 0; lp <= end; ++lp) { |
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if (!lp->alloced_map) { |
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/* Allocate new GART pages... */ |
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if (i460_alloc_large_page(lp) < 0) |
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return -ENOMEM; |
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pg = lp - i460.lp_desc; |
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WR_GATT(pg, i460_mask_memory(agp_bridge, |
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lp->paddr, 0)); |
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WR_FLUSH_GATT(pg); |
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} |
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for (idx = ((lp == start) ? start_offset : 0); |
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idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE); |
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idx++, i++) |
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{ |
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mem->pages[i] = lp->page; |
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__set_bit(idx, lp->alloced_map); |
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++lp->refcount; |
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} |
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} |
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return 0; |
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} |
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|
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static int i460_remove_memory_large_io_page (struct agp_memory *mem, |
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off_t pg_start, int type) |
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{ |
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int i, pg, start_offset, end_offset, idx, num_entries; |
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struct lp_desc *start, *end, *lp; |
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void *temp; |
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|
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temp = agp_bridge->current_size; |
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num_entries = A_SIZE_8(temp)->num_entries; |
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|
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/* Figure out what pg_start means in terms of our large GART pages */ |
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start = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE]; |
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end = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE]; |
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start_offset = pg_start % I460_KPAGES_PER_IOPAGE; |
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end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE; |
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|
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for (i = 0, lp = start; lp <= end; ++lp) { |
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for (idx = ((lp == start) ? start_offset : 0); |
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idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE); |
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idx++, i++) |
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{ |
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mem->pages[i] = NULL; |
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__clear_bit(idx, lp->alloced_map); |
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--lp->refcount; |
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} |
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|
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/* Free GART pages if they are unused */ |
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if (lp->refcount == 0) { |
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pg = lp - i460.lp_desc; |
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WR_GATT(pg, 0); |
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WR_FLUSH_GATT(pg); |
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i460_free_large_page(lp); |
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} |
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} |
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return 0; |
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} |
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|
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/* Wrapper routines to call the approriate {small_io_page,large_io_page} function */ |
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|
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static int i460_insert_memory (struct agp_memory *mem, |
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off_t pg_start, int type) |
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{ |
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if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) |
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return i460_insert_memory_small_io_page(mem, pg_start, type); |
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else |
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return i460_insert_memory_large_io_page(mem, pg_start, type); |
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} |
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|
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static int i460_remove_memory (struct agp_memory *mem, |
|
off_t pg_start, int type) |
|
{ |
|
if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) |
|
return i460_remove_memory_small_io_page(mem, pg_start, type); |
|
else |
|
return i460_remove_memory_large_io_page(mem, pg_start, type); |
|
} |
|
|
|
/* |
|
* If the I/O (GART) page size is bigger than the kernel page size, we don't want to |
|
* allocate memory until we know where it is to be bound in the aperture (a |
|
* multi-kernel-page alloc might fit inside of an already allocated GART page). |
|
* |
|
* Let's just hope nobody counts on the allocated AGP memory being there before bind time |
|
* (I don't think current drivers do)... |
|
*/ |
|
static struct page *i460_alloc_page (struct agp_bridge_data *bridge) |
|
{ |
|
void *page; |
|
|
|
if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) { |
|
page = agp_generic_alloc_page(agp_bridge); |
|
} else |
|
/* Returning NULL would cause problems */ |
|
/* AK: really dubious code. */ |
|
page = (void *)~0UL; |
|
return page; |
|
} |
|
|
|
static void i460_destroy_page (struct page *page, int flags) |
|
{ |
|
if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) { |
|
agp_generic_destroy_page(page, flags); |
|
} |
|
} |
|
|
|
#endif /* I460_LARGE_IO_PAGES */ |
|
|
|
static unsigned long i460_mask_memory (struct agp_bridge_data *bridge, |
|
dma_addr_t addr, int type) |
|
{ |
|
/* Make sure the returned address is a valid GATT entry */ |
|
return bridge->driver->masks[0].mask |
|
| (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xfffff000) >> 12); |
|
} |
|
|
|
const struct agp_bridge_driver intel_i460_driver = { |
|
.owner = THIS_MODULE, |
|
.aperture_sizes = i460_sizes, |
|
.size_type = U8_APER_SIZE, |
|
.num_aperture_sizes = 3, |
|
.configure = i460_configure, |
|
.fetch_size = i460_fetch_size, |
|
.cleanup = i460_cleanup, |
|
.tlb_flush = i460_tlb_flush, |
|
.mask_memory = i460_mask_memory, |
|
.masks = i460_masks, |
|
.agp_enable = agp_generic_enable, |
|
.cache_flush = global_cache_flush, |
|
.create_gatt_table = i460_create_gatt_table, |
|
.free_gatt_table = i460_free_gatt_table, |
|
#if I460_LARGE_IO_PAGES |
|
.insert_memory = i460_insert_memory, |
|
.remove_memory = i460_remove_memory, |
|
.agp_alloc_page = i460_alloc_page, |
|
.agp_destroy_page = i460_destroy_page, |
|
#else |
|
.insert_memory = i460_insert_memory_small_io_page, |
|
.remove_memory = i460_remove_memory_small_io_page, |
|
.agp_alloc_page = agp_generic_alloc_page, |
|
.agp_alloc_pages = agp_generic_alloc_pages, |
|
.agp_destroy_page = agp_generic_destroy_page, |
|
.agp_destroy_pages = agp_generic_destroy_pages, |
|
#endif |
|
.alloc_by_type = agp_generic_alloc_by_type, |
|
.free_by_type = agp_generic_free_by_type, |
|
.agp_type_to_mask_type = agp_generic_type_to_mask_type, |
|
.cant_use_aperture = true, |
|
}; |
|
|
|
static int agp_intel_i460_probe(struct pci_dev *pdev, |
|
const struct pci_device_id *ent) |
|
{ |
|
struct agp_bridge_data *bridge; |
|
u8 cap_ptr; |
|
|
|
cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); |
|
if (!cap_ptr) |
|
return -ENODEV; |
|
|
|
bridge = agp_alloc_bridge(); |
|
if (!bridge) |
|
return -ENOMEM; |
|
|
|
bridge->driver = &intel_i460_driver; |
|
bridge->dev = pdev; |
|
bridge->capndx = cap_ptr; |
|
|
|
printk(KERN_INFO PFX "Detected Intel 460GX chipset\n"); |
|
|
|
pci_set_drvdata(pdev, bridge); |
|
return agp_add_bridge(bridge); |
|
} |
|
|
|
static void agp_intel_i460_remove(struct pci_dev *pdev) |
|
{ |
|
struct agp_bridge_data *bridge = pci_get_drvdata(pdev); |
|
|
|
agp_remove_bridge(bridge); |
|
agp_put_bridge(bridge); |
|
} |
|
|
|
static struct pci_device_id agp_intel_i460_pci_table[] = { |
|
{ |
|
.class = (PCI_CLASS_BRIDGE_HOST << 8), |
|
.class_mask = ~0, |
|
.vendor = PCI_VENDOR_ID_INTEL, |
|
.device = PCI_DEVICE_ID_INTEL_84460GX, |
|
.subvendor = PCI_ANY_ID, |
|
.subdevice = PCI_ANY_ID, |
|
}, |
|
{ } |
|
}; |
|
|
|
MODULE_DEVICE_TABLE(pci, agp_intel_i460_pci_table); |
|
|
|
static struct pci_driver agp_intel_i460_pci_driver = { |
|
.name = "agpgart-intel-i460", |
|
.id_table = agp_intel_i460_pci_table, |
|
.probe = agp_intel_i460_probe, |
|
.remove = agp_intel_i460_remove, |
|
}; |
|
|
|
static int __init agp_intel_i460_init(void) |
|
{ |
|
if (agp_off) |
|
return -EINVAL; |
|
return pci_register_driver(&agp_intel_i460_pci_driver); |
|
} |
|
|
|
static void __exit agp_intel_i460_cleanup(void) |
|
{ |
|
pci_unregister_driver(&agp_intel_i460_pci_driver); |
|
} |
|
|
|
module_init(agp_intel_i460_init); |
|
module_exit(agp_intel_i460_cleanup); |
|
|
|
MODULE_AUTHOR("Chris Ahna <[email protected]>"); |
|
MODULE_LICENSE("GPL and additional rights");
|
|
|