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1575 lines
37 KiB
1575 lines
37 KiB
/* |
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* sx8.c: Driver for Promise SATA SX8 looks-like-I2O hardware |
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* |
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* Copyright 2004-2005 Red Hat, Inc. |
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* |
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* Author/maintainer: Jeff Garzik <[email protected]> |
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* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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*/ |
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|
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/init.h> |
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#include <linux/pci.h> |
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#include <linux/slab.h> |
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#include <linux/spinlock.h> |
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#include <linux/blk-mq.h> |
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#include <linux/sched.h> |
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#include <linux/interrupt.h> |
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#include <linux/compiler.h> |
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#include <linux/workqueue.h> |
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#include <linux/bitops.h> |
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#include <linux/delay.h> |
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#include <linux/ktime.h> |
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#include <linux/hdreg.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/completion.h> |
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#include <linux/scatterlist.h> |
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#include <asm/io.h> |
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#include <linux/uaccess.h> |
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|
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#if 0 |
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#define CARM_DEBUG |
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#define CARM_VERBOSE_DEBUG |
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#else |
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#undef CARM_DEBUG |
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#undef CARM_VERBOSE_DEBUG |
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#endif |
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#undef CARM_NDEBUG |
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#define DRV_NAME "sx8" |
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#define DRV_VERSION "1.0" |
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#define PFX DRV_NAME ": " |
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MODULE_AUTHOR("Jeff Garzik"); |
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MODULE_LICENSE("GPL"); |
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MODULE_DESCRIPTION("Promise SATA SX8 block driver"); |
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MODULE_VERSION(DRV_VERSION); |
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|
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/* |
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* SX8 hardware has a single message queue for all ATA ports. |
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* When this driver was written, the hardware (firmware?) would |
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* corrupt data eventually, if more than one request was outstanding. |
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* As one can imagine, having 8 ports bottlenecking on a single |
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* command hurts performance. |
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* |
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* Based on user reports, later versions of the hardware (firmware?) |
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* seem to be able to survive with more than one command queued. |
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* |
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* Therefore, we default to the safe option -- 1 command -- but |
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* allow the user to increase this. |
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* |
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* SX8 should be able to support up to ~60 queued commands (CARM_MAX_REQ), |
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* but problems seem to occur when you exceed ~30, even on newer hardware. |
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*/ |
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static int max_queue = 1; |
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module_param(max_queue, int, 0444); |
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MODULE_PARM_DESC(max_queue, "Maximum number of queued commands. (min==1, max==30, safe==1)"); |
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#define NEXT_RESP(idx) ((idx + 1) % RMSG_Q_LEN) |
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|
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/* 0xf is just arbitrary, non-zero noise; this is sorta like poisoning */ |
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#define TAG_ENCODE(tag) (((tag) << 16) | 0xf) |
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#define TAG_DECODE(tag) (((tag) >> 16) & 0x1f) |
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#define TAG_VALID(tag) ((((tag) & 0xf) == 0xf) && (TAG_DECODE(tag) < 32)) |
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|
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/* note: prints function name for you */ |
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#ifdef CARM_DEBUG |
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#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) |
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#ifdef CARM_VERBOSE_DEBUG |
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#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) |
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#else |
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#define VPRINTK(fmt, args...) |
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#endif /* CARM_VERBOSE_DEBUG */ |
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#else |
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#define DPRINTK(fmt, args...) |
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#define VPRINTK(fmt, args...) |
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#endif /* CARM_DEBUG */ |
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#ifdef CARM_NDEBUG |
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#define assert(expr) |
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#else |
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#define assert(expr) \ |
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if(unlikely(!(expr))) { \ |
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printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \ |
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#expr, __FILE__, __func__, __LINE__); \ |
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} |
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#endif |
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|
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/* defines only for the constants which don't work well as enums */ |
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struct carm_host; |
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enum { |
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/* adapter-wide limits */ |
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CARM_MAX_PORTS = 8, |
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CARM_SHM_SIZE = (4096 << 7), |
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CARM_MINORS_PER_MAJOR = 256 / CARM_MAX_PORTS, |
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CARM_MAX_WAIT_Q = CARM_MAX_PORTS + 1, |
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|
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/* command message queue limits */ |
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CARM_MAX_REQ = 64, /* max command msgs per host */ |
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CARM_MSG_LOW_WATER = (CARM_MAX_REQ / 4), /* refill mark */ |
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|
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/* S/G limits, host-wide and per-request */ |
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CARM_MAX_REQ_SG = 32, /* max s/g entries per request */ |
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CARM_MAX_HOST_SG = 600, /* max s/g entries per host */ |
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CARM_SG_LOW_WATER = (CARM_MAX_HOST_SG / 4), /* re-fill mark */ |
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|
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/* hardware registers */ |
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CARM_IHQP = 0x1c, |
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CARM_INT_STAT = 0x10, /* interrupt status */ |
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CARM_INT_MASK = 0x14, /* interrupt mask */ |
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CARM_HMUC = 0x18, /* host message unit control */ |
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RBUF_ADDR_LO = 0x20, /* response msg DMA buf low 32 bits */ |
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RBUF_ADDR_HI = 0x24, /* response msg DMA buf high 32 bits */ |
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RBUF_BYTE_SZ = 0x28, |
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CARM_RESP_IDX = 0x2c, |
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CARM_CMS0 = 0x30, /* command message size reg 0 */ |
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CARM_LMUC = 0x48, |
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CARM_HMPHA = 0x6c, |
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CARM_INITC = 0xb5, |
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|
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/* bits in CARM_INT_{STAT,MASK} */ |
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INT_RESERVED = 0xfffffff0, |
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INT_WATCHDOG = (1 << 3), /* watchdog timer */ |
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INT_Q_OVERFLOW = (1 << 2), /* cmd msg q overflow */ |
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INT_Q_AVAILABLE = (1 << 1), /* cmd msg q has free space */ |
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INT_RESPONSE = (1 << 0), /* response msg available */ |
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INT_ACK_MASK = INT_WATCHDOG | INT_Q_OVERFLOW, |
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INT_DEF_MASK = INT_RESERVED | INT_Q_OVERFLOW | |
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INT_RESPONSE, |
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|
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/* command messages, and related register bits */ |
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CARM_HAVE_RESP = 0x01, |
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CARM_MSG_READ = 1, |
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CARM_MSG_WRITE = 2, |
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CARM_MSG_VERIFY = 3, |
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CARM_MSG_GET_CAPACITY = 4, |
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CARM_MSG_FLUSH = 5, |
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CARM_MSG_IOCTL = 6, |
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CARM_MSG_ARRAY = 8, |
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CARM_MSG_MISC = 9, |
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CARM_CME = (1 << 2), |
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CARM_RME = (1 << 1), |
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CARM_WZBC = (1 << 0), |
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CARM_RMI = (1 << 0), |
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CARM_Q_FULL = (1 << 3), |
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CARM_MSG_SIZE = 288, |
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CARM_Q_LEN = 48, |
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|
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/* CARM_MSG_IOCTL messages */ |
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CARM_IOC_SCAN_CHAN = 5, /* scan channels for devices */ |
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CARM_IOC_GET_TCQ = 13, /* get tcq/ncq depth */ |
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CARM_IOC_SET_TCQ = 14, /* set tcq/ncq depth */ |
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IOC_SCAN_CHAN_NODEV = 0x1f, |
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IOC_SCAN_CHAN_OFFSET = 0x40, |
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|
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/* CARM_MSG_ARRAY messages */ |
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CARM_ARRAY_INFO = 0, |
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ARRAY_NO_EXIST = (1 << 31), |
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|
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/* response messages */ |
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RMSG_SZ = 8, /* sizeof(struct carm_response) */ |
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RMSG_Q_LEN = 48, /* resp. msg list length */ |
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RMSG_OK = 1, /* bit indicating msg was successful */ |
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/* length of entire resp. msg buffer */ |
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RBUF_LEN = RMSG_SZ * RMSG_Q_LEN, |
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|
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PDC_SHM_SIZE = (4096 << 7), /* length of entire h/w buffer */ |
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/* CARM_MSG_MISC messages */ |
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MISC_GET_FW_VER = 2, |
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MISC_ALLOC_MEM = 3, |
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MISC_SET_TIME = 5, |
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|
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/* MISC_GET_FW_VER feature bits */ |
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FW_VER_4PORT = (1 << 2), /* 1=4 ports, 0=8 ports */ |
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FW_VER_NON_RAID = (1 << 1), /* 1=non-RAID firmware, 0=RAID */ |
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FW_VER_ZCR = (1 << 0), /* zero channel RAID (whatever that is) */ |
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|
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/* carm_host flags */ |
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FL_NON_RAID = FW_VER_NON_RAID, |
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FL_4PORT = FW_VER_4PORT, |
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FL_FW_VER_MASK = (FW_VER_NON_RAID | FW_VER_4PORT), |
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FL_DYN_MAJOR = (1 << 17), |
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}; |
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enum { |
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CARM_SG_BOUNDARY = 0xffffUL, /* s/g segment boundary */ |
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}; |
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|
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enum scatter_gather_types { |
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SGT_32BIT = 0, |
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SGT_64BIT = 1, |
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}; |
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|
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enum host_states { |
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HST_INVALID, /* invalid state; never used */ |
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HST_ALLOC_BUF, /* setting up master SHM area */ |
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HST_ERROR, /* we never leave here */ |
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HST_PORT_SCAN, /* start dev scan */ |
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HST_DEV_SCAN_START, /* start per-device probe */ |
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HST_DEV_SCAN, /* continue per-device probe */ |
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HST_DEV_ACTIVATE, /* activate devices we found */ |
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HST_PROBE_FINISHED, /* probe is complete */ |
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HST_PROBE_START, /* initiate probe */ |
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HST_SYNC_TIME, /* tell firmware what time it is */ |
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HST_GET_FW_VER, /* get firmware version, adapter port cnt */ |
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}; |
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#ifdef CARM_DEBUG |
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static const char *state_name[] = { |
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"HST_INVALID", |
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"HST_ALLOC_BUF", |
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"HST_ERROR", |
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"HST_PORT_SCAN", |
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"HST_DEV_SCAN_START", |
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"HST_DEV_SCAN", |
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"HST_DEV_ACTIVATE", |
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"HST_PROBE_FINISHED", |
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"HST_PROBE_START", |
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"HST_SYNC_TIME", |
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"HST_GET_FW_VER", |
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}; |
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#endif |
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struct carm_port { |
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unsigned int port_no; |
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struct gendisk *disk; |
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struct carm_host *host; |
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|
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/* attached device characteristics */ |
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u64 capacity; |
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char name[41]; |
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u16 dev_geom_head; |
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u16 dev_geom_sect; |
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u16 dev_geom_cyl; |
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}; |
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struct carm_request { |
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int n_elem; |
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unsigned int msg_type; |
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unsigned int msg_subtype; |
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unsigned int msg_bucket; |
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struct scatterlist sg[CARM_MAX_REQ_SG]; |
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}; |
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struct carm_host { |
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unsigned long flags; |
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void __iomem *mmio; |
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void *shm; |
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dma_addr_t shm_dma; |
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int major; |
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int id; |
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char name[32]; |
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spinlock_t lock; |
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struct pci_dev *pdev; |
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unsigned int state; |
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u32 fw_ver; |
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struct blk_mq_tag_set tag_set; |
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struct request_queue *oob_q; |
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unsigned int n_oob; |
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unsigned int hw_sg_used; |
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unsigned int resp_idx; |
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unsigned int wait_q_prod; |
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unsigned int wait_q_cons; |
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struct request_queue *wait_q[CARM_MAX_WAIT_Q]; |
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void *msg_base; |
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dma_addr_t msg_dma; |
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int cur_scan_dev; |
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unsigned long dev_active; |
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unsigned long dev_present; |
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struct carm_port port[CARM_MAX_PORTS]; |
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struct work_struct fsm_task; |
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struct completion probe_comp; |
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}; |
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struct carm_response { |
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__le32 ret_handle; |
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__le32 status; |
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} __attribute__((packed)); |
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struct carm_msg_sg { |
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__le32 start; |
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__le32 len; |
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} __attribute__((packed)); |
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struct carm_msg_rw { |
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u8 type; |
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u8 id; |
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u8 sg_count; |
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u8 sg_type; |
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__le32 handle; |
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__le32 lba; |
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__le16 lba_count; |
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__le16 lba_high; |
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struct carm_msg_sg sg[32]; |
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} __attribute__((packed)); |
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struct carm_msg_allocbuf { |
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u8 type; |
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u8 subtype; |
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u8 n_sg; |
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u8 sg_type; |
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__le32 handle; |
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__le32 addr; |
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__le32 len; |
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__le32 evt_pool; |
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__le32 n_evt; |
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__le32 rbuf_pool; |
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__le32 n_rbuf; |
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__le32 msg_pool; |
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__le32 n_msg; |
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struct carm_msg_sg sg[8]; |
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} __attribute__((packed)); |
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struct carm_msg_ioctl { |
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u8 type; |
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u8 subtype; |
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u8 array_id; |
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u8 reserved1; |
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__le32 handle; |
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__le32 data_addr; |
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u32 reserved2; |
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} __attribute__((packed)); |
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struct carm_msg_sync_time { |
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u8 type; |
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u8 subtype; |
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u16 reserved1; |
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__le32 handle; |
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u32 reserved2; |
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__le32 timestamp; |
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} __attribute__((packed)); |
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struct carm_msg_get_fw_ver { |
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u8 type; |
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u8 subtype; |
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u16 reserved1; |
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__le32 handle; |
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__le32 data_addr; |
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u32 reserved2; |
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} __attribute__((packed)); |
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struct carm_fw_ver { |
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__le32 version; |
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u8 features; |
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u8 reserved1; |
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u16 reserved2; |
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} __attribute__((packed)); |
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struct carm_array_info { |
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__le32 size; |
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|
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__le16 size_hi; |
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__le16 stripe_size; |
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|
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__le32 mode; |
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|
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__le16 stripe_blk_sz; |
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__le16 reserved1; |
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__le16 cyl; |
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__le16 head; |
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|
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__le16 sect; |
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u8 array_id; |
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u8 reserved2; |
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|
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char name[40]; |
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__le32 array_status; |
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|
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/* device list continues beyond this point? */ |
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} __attribute__((packed)); |
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static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
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static void carm_remove_one (struct pci_dev *pdev); |
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static int carm_bdev_getgeo(struct block_device *bdev, struct hd_geometry *geo); |
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|
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static const struct pci_device_id carm_pci_tbl[] = { |
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{ PCI_VENDOR_ID_PROMISE, 0x8000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, |
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{ PCI_VENDOR_ID_PROMISE, 0x8002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, |
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{ } /* terminate list */ |
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}; |
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MODULE_DEVICE_TABLE(pci, carm_pci_tbl); |
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|
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static struct pci_driver carm_driver = { |
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.name = DRV_NAME, |
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.id_table = carm_pci_tbl, |
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.probe = carm_init_one, |
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.remove = carm_remove_one, |
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}; |
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static const struct block_device_operations carm_bd_ops = { |
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.owner = THIS_MODULE, |
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.getgeo = carm_bdev_getgeo, |
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}; |
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static unsigned int carm_host_id; |
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static unsigned long carm_major_alloc; |
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static int carm_bdev_getgeo(struct block_device *bdev, struct hd_geometry *geo) |
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{ |
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struct carm_port *port = bdev->bd_disk->private_data; |
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|
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geo->heads = (u8) port->dev_geom_head; |
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geo->sectors = (u8) port->dev_geom_sect; |
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geo->cylinders = port->dev_geom_cyl; |
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return 0; |
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} |
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static const u32 msg_sizes[] = { 32, 64, 128, CARM_MSG_SIZE }; |
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|
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static inline int carm_lookup_bucket(u32 msg_size) |
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{ |
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int i; |
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|
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for (i = 0; i < ARRAY_SIZE(msg_sizes); i++) |
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if (msg_size <= msg_sizes[i]) |
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return i; |
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|
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return -ENOENT; |
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} |
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|
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static void carm_init_buckets(void __iomem *mmio) |
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{ |
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unsigned int i; |
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|
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for (i = 0; i < ARRAY_SIZE(msg_sizes); i++) |
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writel(msg_sizes[i], mmio + CARM_CMS0 + (4 * i)); |
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} |
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|
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static inline void *carm_ref_msg(struct carm_host *host, |
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unsigned int msg_idx) |
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{ |
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return host->msg_base + (msg_idx * CARM_MSG_SIZE); |
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} |
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|
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static inline dma_addr_t carm_ref_msg_dma(struct carm_host *host, |
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unsigned int msg_idx) |
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{ |
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return host->msg_dma + (msg_idx * CARM_MSG_SIZE); |
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} |
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|
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static int carm_send_msg(struct carm_host *host, |
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struct carm_request *crq, unsigned tag) |
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{ |
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void __iomem *mmio = host->mmio; |
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u32 msg = (u32) carm_ref_msg_dma(host, tag); |
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u32 cm_bucket = crq->msg_bucket; |
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u32 tmp; |
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int rc = 0; |
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|
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VPRINTK("ENTER\n"); |
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|
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tmp = readl(mmio + CARM_HMUC); |
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if (tmp & CARM_Q_FULL) { |
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#if 0 |
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tmp = readl(mmio + CARM_INT_MASK); |
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tmp |= INT_Q_AVAILABLE; |
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writel(tmp, mmio + CARM_INT_MASK); |
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readl(mmio + CARM_INT_MASK); /* flush */ |
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#endif |
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DPRINTK("host msg queue full\n"); |
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rc = -EBUSY; |
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} else { |
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writel(msg | (cm_bucket << 1), mmio + CARM_IHQP); |
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readl(mmio + CARM_IHQP); /* flush */ |
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} |
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|
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return rc; |
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} |
|
|
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static int carm_array_info (struct carm_host *host, unsigned int array_idx) |
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{ |
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struct carm_msg_ioctl *ioc; |
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u32 msg_data; |
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dma_addr_t msg_dma; |
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struct carm_request *crq; |
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struct request *rq; |
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int rc; |
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|
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rq = blk_mq_alloc_request(host->oob_q, REQ_OP_DRV_OUT, 0); |
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if (IS_ERR(rq)) { |
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rc = -ENOMEM; |
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goto err_out; |
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} |
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crq = blk_mq_rq_to_pdu(rq); |
|
|
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ioc = carm_ref_msg(host, rq->tag); |
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msg_dma = carm_ref_msg_dma(host, rq->tag); |
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msg_data = (u32) (msg_dma + sizeof(struct carm_array_info)); |
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|
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crq->msg_type = CARM_MSG_ARRAY; |
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crq->msg_subtype = CARM_ARRAY_INFO; |
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rc = carm_lookup_bucket(sizeof(struct carm_msg_ioctl) + |
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sizeof(struct carm_array_info)); |
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BUG_ON(rc < 0); |
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crq->msg_bucket = (u32) rc; |
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|
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memset(ioc, 0, sizeof(*ioc)); |
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ioc->type = CARM_MSG_ARRAY; |
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ioc->subtype = CARM_ARRAY_INFO; |
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ioc->array_id = (u8) array_idx; |
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ioc->handle = cpu_to_le32(TAG_ENCODE(rq->tag)); |
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ioc->data_addr = cpu_to_le32(msg_data); |
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|
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spin_lock_irq(&host->lock); |
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assert(host->state == HST_DEV_SCAN_START || |
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host->state == HST_DEV_SCAN); |
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spin_unlock_irq(&host->lock); |
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|
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DPRINTK("blk_execute_rq_nowait, tag == %u\n", rq->tag); |
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blk_execute_rq_nowait(NULL, rq, true, NULL); |
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|
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return 0; |
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|
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err_out: |
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spin_lock_irq(&host->lock); |
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host->state = HST_ERROR; |
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spin_unlock_irq(&host->lock); |
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return rc; |
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} |
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|
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typedef unsigned int (*carm_sspc_t)(struct carm_host *, unsigned int, void *); |
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|
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static int carm_send_special (struct carm_host *host, carm_sspc_t func) |
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{ |
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struct request *rq; |
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struct carm_request *crq; |
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struct carm_msg_ioctl *ioc; |
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void *mem; |
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unsigned int msg_size; |
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int rc; |
|
|
|
rq = blk_mq_alloc_request(host->oob_q, REQ_OP_DRV_OUT, 0); |
|
if (IS_ERR(rq)) |
|
return -ENOMEM; |
|
crq = blk_mq_rq_to_pdu(rq); |
|
|
|
mem = carm_ref_msg(host, rq->tag); |
|
|
|
msg_size = func(host, rq->tag, mem); |
|
|
|
ioc = mem; |
|
crq->msg_type = ioc->type; |
|
crq->msg_subtype = ioc->subtype; |
|
rc = carm_lookup_bucket(msg_size); |
|
BUG_ON(rc < 0); |
|
crq->msg_bucket = (u32) rc; |
|
|
|
DPRINTK("blk_execute_rq_nowait, tag == %u\n", rq->tag); |
|
blk_execute_rq_nowait(NULL, rq, true, NULL); |
|
|
|
return 0; |
|
} |
|
|
|
static unsigned int carm_fill_sync_time(struct carm_host *host, |
|
unsigned int idx, void *mem) |
|
{ |
|
struct carm_msg_sync_time *st = mem; |
|
|
|
time64_t tv = ktime_get_real_seconds(); |
|
|
|
memset(st, 0, sizeof(*st)); |
|
st->type = CARM_MSG_MISC; |
|
st->subtype = MISC_SET_TIME; |
|
st->handle = cpu_to_le32(TAG_ENCODE(idx)); |
|
st->timestamp = cpu_to_le32(tv); |
|
|
|
return sizeof(struct carm_msg_sync_time); |
|
} |
|
|
|
static unsigned int carm_fill_alloc_buf(struct carm_host *host, |
|
unsigned int idx, void *mem) |
|
{ |
|
struct carm_msg_allocbuf *ab = mem; |
|
|
|
memset(ab, 0, sizeof(*ab)); |
|
ab->type = CARM_MSG_MISC; |
|
ab->subtype = MISC_ALLOC_MEM; |
|
ab->handle = cpu_to_le32(TAG_ENCODE(idx)); |
|
ab->n_sg = 1; |
|
ab->sg_type = SGT_32BIT; |
|
ab->addr = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1)); |
|
ab->len = cpu_to_le32(PDC_SHM_SIZE >> 1); |
|
ab->evt_pool = cpu_to_le32(host->shm_dma + (16 * 1024)); |
|
ab->n_evt = cpu_to_le32(1024); |
|
ab->rbuf_pool = cpu_to_le32(host->shm_dma); |
|
ab->n_rbuf = cpu_to_le32(RMSG_Q_LEN); |
|
ab->msg_pool = cpu_to_le32(host->shm_dma + RBUF_LEN); |
|
ab->n_msg = cpu_to_le32(CARM_Q_LEN); |
|
ab->sg[0].start = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1)); |
|
ab->sg[0].len = cpu_to_le32(65536); |
|
|
|
return sizeof(struct carm_msg_allocbuf); |
|
} |
|
|
|
static unsigned int carm_fill_scan_channels(struct carm_host *host, |
|
unsigned int idx, void *mem) |
|
{ |
|
struct carm_msg_ioctl *ioc = mem; |
|
u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) + |
|
IOC_SCAN_CHAN_OFFSET); |
|
|
|
memset(ioc, 0, sizeof(*ioc)); |
|
ioc->type = CARM_MSG_IOCTL; |
|
ioc->subtype = CARM_IOC_SCAN_CHAN; |
|
ioc->handle = cpu_to_le32(TAG_ENCODE(idx)); |
|
ioc->data_addr = cpu_to_le32(msg_data); |
|
|
|
/* fill output data area with "no device" default values */ |
|
mem += IOC_SCAN_CHAN_OFFSET; |
|
memset(mem, IOC_SCAN_CHAN_NODEV, CARM_MAX_PORTS); |
|
|
|
return IOC_SCAN_CHAN_OFFSET + CARM_MAX_PORTS; |
|
} |
|
|
|
static unsigned int carm_fill_get_fw_ver(struct carm_host *host, |
|
unsigned int idx, void *mem) |
|
{ |
|
struct carm_msg_get_fw_ver *ioc = mem; |
|
u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) + sizeof(*ioc)); |
|
|
|
memset(ioc, 0, sizeof(*ioc)); |
|
ioc->type = CARM_MSG_MISC; |
|
ioc->subtype = MISC_GET_FW_VER; |
|
ioc->handle = cpu_to_le32(TAG_ENCODE(idx)); |
|
ioc->data_addr = cpu_to_le32(msg_data); |
|
|
|
return sizeof(struct carm_msg_get_fw_ver) + |
|
sizeof(struct carm_fw_ver); |
|
} |
|
|
|
static inline void carm_push_q (struct carm_host *host, struct request_queue *q) |
|
{ |
|
unsigned int idx = host->wait_q_prod % CARM_MAX_WAIT_Q; |
|
|
|
blk_mq_stop_hw_queues(q); |
|
VPRINTK("STOPPED QUEUE %p\n", q); |
|
|
|
host->wait_q[idx] = q; |
|
host->wait_q_prod++; |
|
BUG_ON(host->wait_q_prod == host->wait_q_cons); /* overrun */ |
|
} |
|
|
|
static inline struct request_queue *carm_pop_q(struct carm_host *host) |
|
{ |
|
unsigned int idx; |
|
|
|
if (host->wait_q_prod == host->wait_q_cons) |
|
return NULL; |
|
|
|
idx = host->wait_q_cons % CARM_MAX_WAIT_Q; |
|
host->wait_q_cons++; |
|
|
|
return host->wait_q[idx]; |
|
} |
|
|
|
static inline void carm_round_robin(struct carm_host *host) |
|
{ |
|
struct request_queue *q = carm_pop_q(host); |
|
if (q) { |
|
blk_mq_start_hw_queues(q); |
|
VPRINTK("STARTED QUEUE %p\n", q); |
|
} |
|
} |
|
|
|
static inline enum dma_data_direction carm_rq_dir(struct request *rq) |
|
{ |
|
return op_is_write(req_op(rq)) ? DMA_TO_DEVICE : DMA_FROM_DEVICE; |
|
} |
|
|
|
static blk_status_t carm_queue_rq(struct blk_mq_hw_ctx *hctx, |
|
const struct blk_mq_queue_data *bd) |
|
{ |
|
struct request_queue *q = hctx->queue; |
|
struct request *rq = bd->rq; |
|
struct carm_port *port = q->queuedata; |
|
struct carm_host *host = port->host; |
|
struct carm_request *crq = blk_mq_rq_to_pdu(rq); |
|
struct carm_msg_rw *msg; |
|
struct scatterlist *sg; |
|
int i, n_elem = 0, rc; |
|
unsigned int msg_size; |
|
u32 tmp; |
|
|
|
crq->n_elem = 0; |
|
sg_init_table(crq->sg, CARM_MAX_REQ_SG); |
|
|
|
blk_mq_start_request(rq); |
|
|
|
spin_lock_irq(&host->lock); |
|
if (req_op(rq) == REQ_OP_DRV_OUT) |
|
goto send_msg; |
|
|
|
/* get scatterlist from block layer */ |
|
sg = &crq->sg[0]; |
|
n_elem = blk_rq_map_sg(q, rq, sg); |
|
if (n_elem <= 0) |
|
goto out_ioerr; |
|
|
|
/* map scatterlist to PCI bus addresses */ |
|
n_elem = dma_map_sg(&host->pdev->dev, sg, n_elem, carm_rq_dir(rq)); |
|
if (n_elem <= 0) |
|
goto out_ioerr; |
|
|
|
/* obey global hardware limit on S/G entries */ |
|
if (host->hw_sg_used >= CARM_MAX_HOST_SG - n_elem) |
|
goto out_resource; |
|
|
|
crq->n_elem = n_elem; |
|
host->hw_sg_used += n_elem; |
|
|
|
/* |
|
* build read/write message |
|
*/ |
|
|
|
VPRINTK("build msg\n"); |
|
msg = (struct carm_msg_rw *) carm_ref_msg(host, rq->tag); |
|
|
|
if (rq_data_dir(rq) == WRITE) { |
|
msg->type = CARM_MSG_WRITE; |
|
crq->msg_type = CARM_MSG_WRITE; |
|
} else { |
|
msg->type = CARM_MSG_READ; |
|
crq->msg_type = CARM_MSG_READ; |
|
} |
|
|
|
msg->id = port->port_no; |
|
msg->sg_count = n_elem; |
|
msg->sg_type = SGT_32BIT; |
|
msg->handle = cpu_to_le32(TAG_ENCODE(rq->tag)); |
|
msg->lba = cpu_to_le32(blk_rq_pos(rq) & 0xffffffff); |
|
tmp = (blk_rq_pos(rq) >> 16) >> 16; |
|
msg->lba_high = cpu_to_le16( (u16) tmp ); |
|
msg->lba_count = cpu_to_le16(blk_rq_sectors(rq)); |
|
|
|
msg_size = sizeof(struct carm_msg_rw) - sizeof(msg->sg); |
|
for (i = 0; i < n_elem; i++) { |
|
struct carm_msg_sg *carm_sg = &msg->sg[i]; |
|
carm_sg->start = cpu_to_le32(sg_dma_address(&crq->sg[i])); |
|
carm_sg->len = cpu_to_le32(sg_dma_len(&crq->sg[i])); |
|
msg_size += sizeof(struct carm_msg_sg); |
|
} |
|
|
|
rc = carm_lookup_bucket(msg_size); |
|
BUG_ON(rc < 0); |
|
crq->msg_bucket = (u32) rc; |
|
send_msg: |
|
/* |
|
* queue read/write message to hardware |
|
*/ |
|
VPRINTK("send msg, tag == %u\n", rq->tag); |
|
rc = carm_send_msg(host, crq, rq->tag); |
|
if (rc) { |
|
host->hw_sg_used -= n_elem; |
|
goto out_resource; |
|
} |
|
|
|
spin_unlock_irq(&host->lock); |
|
return BLK_STS_OK; |
|
out_resource: |
|
dma_unmap_sg(&host->pdev->dev, &crq->sg[0], n_elem, carm_rq_dir(rq)); |
|
carm_push_q(host, q); |
|
spin_unlock_irq(&host->lock); |
|
return BLK_STS_DEV_RESOURCE; |
|
out_ioerr: |
|
carm_round_robin(host); |
|
spin_unlock_irq(&host->lock); |
|
return BLK_STS_IOERR; |
|
} |
|
|
|
static void carm_handle_array_info(struct carm_host *host, |
|
struct carm_request *crq, u8 *mem, |
|
blk_status_t error) |
|
{ |
|
struct carm_port *port; |
|
u8 *msg_data = mem + sizeof(struct carm_array_info); |
|
struct carm_array_info *desc = (struct carm_array_info *) msg_data; |
|
u64 lo, hi; |
|
int cur_port; |
|
size_t slen; |
|
|
|
DPRINTK("ENTER\n"); |
|
|
|
if (error) |
|
goto out; |
|
if (le32_to_cpu(desc->array_status) & ARRAY_NO_EXIST) |
|
goto out; |
|
|
|
cur_port = host->cur_scan_dev; |
|
|
|
/* should never occur */ |
|
if ((cur_port < 0) || (cur_port >= CARM_MAX_PORTS)) { |
|
printk(KERN_ERR PFX "BUG: cur_scan_dev==%d, array_id==%d\n", |
|
cur_port, (int) desc->array_id); |
|
goto out; |
|
} |
|
|
|
port = &host->port[cur_port]; |
|
|
|
lo = (u64) le32_to_cpu(desc->size); |
|
hi = (u64) le16_to_cpu(desc->size_hi); |
|
|
|
port->capacity = lo | (hi << 32); |
|
port->dev_geom_head = le16_to_cpu(desc->head); |
|
port->dev_geom_sect = le16_to_cpu(desc->sect); |
|
port->dev_geom_cyl = le16_to_cpu(desc->cyl); |
|
|
|
host->dev_active |= (1 << cur_port); |
|
|
|
strncpy(port->name, desc->name, sizeof(port->name)); |
|
port->name[sizeof(port->name) - 1] = 0; |
|
slen = strlen(port->name); |
|
while (slen && (port->name[slen - 1] == ' ')) { |
|
port->name[slen - 1] = 0; |
|
slen--; |
|
} |
|
|
|
printk(KERN_INFO DRV_NAME "(%s): port %u device %Lu sectors\n", |
|
pci_name(host->pdev), port->port_no, |
|
(unsigned long long) port->capacity); |
|
printk(KERN_INFO DRV_NAME "(%s): port %u device \"%s\"\n", |
|
pci_name(host->pdev), port->port_no, port->name); |
|
|
|
out: |
|
assert(host->state == HST_DEV_SCAN); |
|
schedule_work(&host->fsm_task); |
|
} |
|
|
|
static void carm_handle_scan_chan(struct carm_host *host, |
|
struct carm_request *crq, u8 *mem, |
|
blk_status_t error) |
|
{ |
|
u8 *msg_data = mem + IOC_SCAN_CHAN_OFFSET; |
|
unsigned int i, dev_count = 0; |
|
int new_state = HST_DEV_SCAN_START; |
|
|
|
DPRINTK("ENTER\n"); |
|
|
|
if (error) { |
|
new_state = HST_ERROR; |
|
goto out; |
|
} |
|
|
|
/* TODO: scan and support non-disk devices */ |
|
for (i = 0; i < 8; i++) |
|
if (msg_data[i] == 0) { /* direct-access device (disk) */ |
|
host->dev_present |= (1 << i); |
|
dev_count++; |
|
} |
|
|
|
printk(KERN_INFO DRV_NAME "(%s): found %u interesting devices\n", |
|
pci_name(host->pdev), dev_count); |
|
|
|
out: |
|
assert(host->state == HST_PORT_SCAN); |
|
host->state = new_state; |
|
schedule_work(&host->fsm_task); |
|
} |
|
|
|
static void carm_handle_generic(struct carm_host *host, |
|
struct carm_request *crq, blk_status_t error, |
|
int cur_state, int next_state) |
|
{ |
|
DPRINTK("ENTER\n"); |
|
|
|
assert(host->state == cur_state); |
|
if (error) |
|
host->state = HST_ERROR; |
|
else |
|
host->state = next_state; |
|
schedule_work(&host->fsm_task); |
|
} |
|
|
|
static inline void carm_handle_resp(struct carm_host *host, |
|
__le32 ret_handle_le, u32 status) |
|
{ |
|
u32 handle = le32_to_cpu(ret_handle_le); |
|
unsigned int msg_idx; |
|
struct request *rq; |
|
struct carm_request *crq; |
|
blk_status_t error = (status == RMSG_OK) ? 0 : BLK_STS_IOERR; |
|
u8 *mem; |
|
|
|
VPRINTK("ENTER, handle == 0x%x\n", handle); |
|
|
|
if (unlikely(!TAG_VALID(handle))) { |
|
printk(KERN_ERR DRV_NAME "(%s): BUG: invalid tag 0x%x\n", |
|
pci_name(host->pdev), handle); |
|
return; |
|
} |
|
|
|
msg_idx = TAG_DECODE(handle); |
|
VPRINTK("tag == %u\n", msg_idx); |
|
|
|
rq = blk_mq_tag_to_rq(host->tag_set.tags[0], msg_idx); |
|
crq = blk_mq_rq_to_pdu(rq); |
|
|
|
/* fast path */ |
|
if (likely(crq->msg_type == CARM_MSG_READ || |
|
crq->msg_type == CARM_MSG_WRITE)) { |
|
dma_unmap_sg(&host->pdev->dev, &crq->sg[0], crq->n_elem, |
|
carm_rq_dir(rq)); |
|
goto done; |
|
} |
|
|
|
mem = carm_ref_msg(host, msg_idx); |
|
|
|
switch (crq->msg_type) { |
|
case CARM_MSG_IOCTL: { |
|
switch (crq->msg_subtype) { |
|
case CARM_IOC_SCAN_CHAN: |
|
carm_handle_scan_chan(host, crq, mem, error); |
|
goto done; |
|
default: |
|
/* unknown / invalid response */ |
|
goto err_out; |
|
} |
|
break; |
|
} |
|
|
|
case CARM_MSG_MISC: { |
|
switch (crq->msg_subtype) { |
|
case MISC_ALLOC_MEM: |
|
carm_handle_generic(host, crq, error, |
|
HST_ALLOC_BUF, HST_SYNC_TIME); |
|
goto done; |
|
case MISC_SET_TIME: |
|
carm_handle_generic(host, crq, error, |
|
HST_SYNC_TIME, HST_GET_FW_VER); |
|
goto done; |
|
case MISC_GET_FW_VER: { |
|
struct carm_fw_ver *ver = (struct carm_fw_ver *) |
|
(mem + sizeof(struct carm_msg_get_fw_ver)); |
|
if (!error) { |
|
host->fw_ver = le32_to_cpu(ver->version); |
|
host->flags |= (ver->features & FL_FW_VER_MASK); |
|
} |
|
carm_handle_generic(host, crq, error, |
|
HST_GET_FW_VER, HST_PORT_SCAN); |
|
goto done; |
|
} |
|
default: |
|
/* unknown / invalid response */ |
|
goto err_out; |
|
} |
|
break; |
|
} |
|
|
|
case CARM_MSG_ARRAY: { |
|
switch (crq->msg_subtype) { |
|
case CARM_ARRAY_INFO: |
|
carm_handle_array_info(host, crq, mem, error); |
|
break; |
|
default: |
|
/* unknown / invalid response */ |
|
goto err_out; |
|
} |
|
break; |
|
} |
|
|
|
default: |
|
/* unknown / invalid response */ |
|
goto err_out; |
|
} |
|
|
|
return; |
|
|
|
err_out: |
|
printk(KERN_WARNING DRV_NAME "(%s): BUG: unhandled message type %d/%d\n", |
|
pci_name(host->pdev), crq->msg_type, crq->msg_subtype); |
|
error = BLK_STS_IOERR; |
|
done: |
|
host->hw_sg_used -= crq->n_elem; |
|
blk_mq_end_request(blk_mq_rq_from_pdu(crq), error); |
|
|
|
if (host->hw_sg_used <= CARM_SG_LOW_WATER) |
|
carm_round_robin(host); |
|
} |
|
|
|
static inline void carm_handle_responses(struct carm_host *host) |
|
{ |
|
void __iomem *mmio = host->mmio; |
|
struct carm_response *resp = (struct carm_response *) host->shm; |
|
unsigned int work = 0; |
|
unsigned int idx = host->resp_idx % RMSG_Q_LEN; |
|
|
|
while (1) { |
|
u32 status = le32_to_cpu(resp[idx].status); |
|
|
|
if (status == 0xffffffff) { |
|
VPRINTK("ending response on index %u\n", idx); |
|
writel(idx << 3, mmio + CARM_RESP_IDX); |
|
break; |
|
} |
|
|
|
/* response to a message we sent */ |
|
else if ((status & (1 << 31)) == 0) { |
|
VPRINTK("handling msg response on index %u\n", idx); |
|
carm_handle_resp(host, resp[idx].ret_handle, status); |
|
resp[idx].status = cpu_to_le32(0xffffffff); |
|
} |
|
|
|
/* asynchronous events the hardware throws our way */ |
|
else if ((status & 0xff000000) == (1 << 31)) { |
|
u8 *evt_type_ptr = (u8 *) &resp[idx]; |
|
u8 evt_type = *evt_type_ptr; |
|
printk(KERN_WARNING DRV_NAME "(%s): unhandled event type %d\n", |
|
pci_name(host->pdev), (int) evt_type); |
|
resp[idx].status = cpu_to_le32(0xffffffff); |
|
} |
|
|
|
idx = NEXT_RESP(idx); |
|
work++; |
|
} |
|
|
|
VPRINTK("EXIT, work==%u\n", work); |
|
host->resp_idx += work; |
|
} |
|
|
|
static irqreturn_t carm_interrupt(int irq, void *__host) |
|
{ |
|
struct carm_host *host = __host; |
|
void __iomem *mmio; |
|
u32 mask; |
|
int handled = 0; |
|
unsigned long flags; |
|
|
|
if (!host) { |
|
VPRINTK("no host\n"); |
|
return IRQ_NONE; |
|
} |
|
|
|
spin_lock_irqsave(&host->lock, flags); |
|
|
|
mmio = host->mmio; |
|
|
|
/* reading should also clear interrupts */ |
|
mask = readl(mmio + CARM_INT_STAT); |
|
|
|
if (mask == 0 || mask == 0xffffffff) { |
|
VPRINTK("no work, mask == 0x%x\n", mask); |
|
goto out; |
|
} |
|
|
|
if (mask & INT_ACK_MASK) |
|
writel(mask, mmio + CARM_INT_STAT); |
|
|
|
if (unlikely(host->state == HST_INVALID)) { |
|
VPRINTK("not initialized yet, mask = 0x%x\n", mask); |
|
goto out; |
|
} |
|
|
|
if (mask & CARM_HAVE_RESP) { |
|
handled = 1; |
|
carm_handle_responses(host); |
|
} |
|
|
|
out: |
|
spin_unlock_irqrestore(&host->lock, flags); |
|
VPRINTK("EXIT\n"); |
|
return IRQ_RETVAL(handled); |
|
} |
|
|
|
static void carm_fsm_task (struct work_struct *work) |
|
{ |
|
struct carm_host *host = |
|
container_of(work, struct carm_host, fsm_task); |
|
unsigned long flags; |
|
unsigned int state; |
|
int rc, i, next_dev; |
|
int reschedule = 0; |
|
int new_state = HST_INVALID; |
|
|
|
spin_lock_irqsave(&host->lock, flags); |
|
state = host->state; |
|
spin_unlock_irqrestore(&host->lock, flags); |
|
|
|
DPRINTK("ENTER, state == %s\n", state_name[state]); |
|
|
|
switch (state) { |
|
case HST_PROBE_START: |
|
new_state = HST_ALLOC_BUF; |
|
reschedule = 1; |
|
break; |
|
|
|
case HST_ALLOC_BUF: |
|
rc = carm_send_special(host, carm_fill_alloc_buf); |
|
if (rc) { |
|
new_state = HST_ERROR; |
|
reschedule = 1; |
|
} |
|
break; |
|
|
|
case HST_SYNC_TIME: |
|
rc = carm_send_special(host, carm_fill_sync_time); |
|
if (rc) { |
|
new_state = HST_ERROR; |
|
reschedule = 1; |
|
} |
|
break; |
|
|
|
case HST_GET_FW_VER: |
|
rc = carm_send_special(host, carm_fill_get_fw_ver); |
|
if (rc) { |
|
new_state = HST_ERROR; |
|
reschedule = 1; |
|
} |
|
break; |
|
|
|
case HST_PORT_SCAN: |
|
rc = carm_send_special(host, carm_fill_scan_channels); |
|
if (rc) { |
|
new_state = HST_ERROR; |
|
reschedule = 1; |
|
} |
|
break; |
|
|
|
case HST_DEV_SCAN_START: |
|
host->cur_scan_dev = -1; |
|
new_state = HST_DEV_SCAN; |
|
reschedule = 1; |
|
break; |
|
|
|
case HST_DEV_SCAN: |
|
next_dev = -1; |
|
for (i = host->cur_scan_dev + 1; i < CARM_MAX_PORTS; i++) |
|
if (host->dev_present & (1 << i)) { |
|
next_dev = i; |
|
break; |
|
} |
|
|
|
if (next_dev >= 0) { |
|
host->cur_scan_dev = next_dev; |
|
rc = carm_array_info(host, next_dev); |
|
if (rc) { |
|
new_state = HST_ERROR; |
|
reschedule = 1; |
|
} |
|
} else { |
|
new_state = HST_DEV_ACTIVATE; |
|
reschedule = 1; |
|
} |
|
break; |
|
|
|
case HST_DEV_ACTIVATE: { |
|
int activated = 0; |
|
for (i = 0; i < CARM_MAX_PORTS; i++) |
|
if (host->dev_active & (1 << i)) { |
|
struct carm_port *port = &host->port[i]; |
|
struct gendisk *disk = port->disk; |
|
|
|
set_capacity(disk, port->capacity); |
|
add_disk(disk); |
|
activated++; |
|
} |
|
|
|
printk(KERN_INFO DRV_NAME "(%s): %d ports activated\n", |
|
pci_name(host->pdev), activated); |
|
|
|
new_state = HST_PROBE_FINISHED; |
|
reschedule = 1; |
|
break; |
|
} |
|
|
|
case HST_PROBE_FINISHED: |
|
complete(&host->probe_comp); |
|
break; |
|
|
|
case HST_ERROR: |
|
/* FIXME: TODO */ |
|
break; |
|
|
|
default: |
|
/* should never occur */ |
|
printk(KERN_ERR PFX "BUG: unknown state %d\n", state); |
|
assert(0); |
|
break; |
|
} |
|
|
|
if (new_state != HST_INVALID) { |
|
spin_lock_irqsave(&host->lock, flags); |
|
host->state = new_state; |
|
spin_unlock_irqrestore(&host->lock, flags); |
|
} |
|
if (reschedule) |
|
schedule_work(&host->fsm_task); |
|
} |
|
|
|
static int carm_init_wait(void __iomem *mmio, u32 bits, unsigned int test_bit) |
|
{ |
|
unsigned int i; |
|
|
|
for (i = 0; i < 50000; i++) { |
|
u32 tmp = readl(mmio + CARM_LMUC); |
|
udelay(100); |
|
|
|
if (test_bit) { |
|
if ((tmp & bits) == bits) |
|
return 0; |
|
} else { |
|
if ((tmp & bits) == 0) |
|
return 0; |
|
} |
|
|
|
cond_resched(); |
|
} |
|
|
|
printk(KERN_ERR PFX "carm_init_wait timeout, bits == 0x%x, test_bit == %s\n", |
|
bits, test_bit ? "yes" : "no"); |
|
return -EBUSY; |
|
} |
|
|
|
static void carm_init_responses(struct carm_host *host) |
|
{ |
|
void __iomem *mmio = host->mmio; |
|
unsigned int i; |
|
struct carm_response *resp = (struct carm_response *) host->shm; |
|
|
|
for (i = 0; i < RMSG_Q_LEN; i++) |
|
resp[i].status = cpu_to_le32(0xffffffff); |
|
|
|
writel(0, mmio + CARM_RESP_IDX); |
|
} |
|
|
|
static int carm_init_host(struct carm_host *host) |
|
{ |
|
void __iomem *mmio = host->mmio; |
|
u32 tmp; |
|
u8 tmp8; |
|
int rc; |
|
|
|
DPRINTK("ENTER\n"); |
|
|
|
writel(0, mmio + CARM_INT_MASK); |
|
|
|
tmp8 = readb(mmio + CARM_INITC); |
|
if (tmp8 & 0x01) { |
|
tmp8 &= ~0x01; |
|
writeb(tmp8, mmio + CARM_INITC); |
|
readb(mmio + CARM_INITC); /* flush */ |
|
|
|
DPRINTK("snooze...\n"); |
|
msleep(5000); |
|
} |
|
|
|
tmp = readl(mmio + CARM_HMUC); |
|
if (tmp & CARM_CME) { |
|
DPRINTK("CME bit present, waiting\n"); |
|
rc = carm_init_wait(mmio, CARM_CME, 1); |
|
if (rc) { |
|
DPRINTK("EXIT, carm_init_wait 1 failed\n"); |
|
return rc; |
|
} |
|
} |
|
if (tmp & CARM_RME) { |
|
DPRINTK("RME bit present, waiting\n"); |
|
rc = carm_init_wait(mmio, CARM_RME, 1); |
|
if (rc) { |
|
DPRINTK("EXIT, carm_init_wait 2 failed\n"); |
|
return rc; |
|
} |
|
} |
|
|
|
tmp &= ~(CARM_RME | CARM_CME); |
|
writel(tmp, mmio + CARM_HMUC); |
|
readl(mmio + CARM_HMUC); /* flush */ |
|
|
|
rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 0); |
|
if (rc) { |
|
DPRINTK("EXIT, carm_init_wait 3 failed\n"); |
|
return rc; |
|
} |
|
|
|
carm_init_buckets(mmio); |
|
|
|
writel(host->shm_dma & 0xffffffff, mmio + RBUF_ADDR_LO); |
|
writel((host->shm_dma >> 16) >> 16, mmio + RBUF_ADDR_HI); |
|
writel(RBUF_LEN, mmio + RBUF_BYTE_SZ); |
|
|
|
tmp = readl(mmio + CARM_HMUC); |
|
tmp |= (CARM_RME | CARM_CME | CARM_WZBC); |
|
writel(tmp, mmio + CARM_HMUC); |
|
readl(mmio + CARM_HMUC); /* flush */ |
|
|
|
rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 1); |
|
if (rc) { |
|
DPRINTK("EXIT, carm_init_wait 4 failed\n"); |
|
return rc; |
|
} |
|
|
|
writel(0, mmio + CARM_HMPHA); |
|
writel(INT_DEF_MASK, mmio + CARM_INT_MASK); |
|
|
|
carm_init_responses(host); |
|
|
|
/* start initialization, probing state machine */ |
|
spin_lock_irq(&host->lock); |
|
assert(host->state == HST_INVALID); |
|
host->state = HST_PROBE_START; |
|
spin_unlock_irq(&host->lock); |
|
schedule_work(&host->fsm_task); |
|
|
|
DPRINTK("EXIT\n"); |
|
return 0; |
|
} |
|
|
|
static const struct blk_mq_ops carm_mq_ops = { |
|
.queue_rq = carm_queue_rq, |
|
}; |
|
|
|
static int carm_init_disk(struct carm_host *host, unsigned int port_no) |
|
{ |
|
struct carm_port *port = &host->port[port_no]; |
|
struct gendisk *disk; |
|
|
|
port->host = host; |
|
port->port_no = port_no; |
|
|
|
disk = blk_mq_alloc_disk(&host->tag_set, port); |
|
if (IS_ERR(disk)) |
|
return PTR_ERR(disk); |
|
|
|
port->disk = disk; |
|
sprintf(disk->disk_name, DRV_NAME "/%u", |
|
(unsigned int)host->id * CARM_MAX_PORTS + port_no); |
|
disk->major = host->major; |
|
disk->first_minor = port_no * CARM_MINORS_PER_MAJOR; |
|
disk->minors = CARM_MINORS_PER_MAJOR; |
|
disk->fops = &carm_bd_ops; |
|
disk->private_data = port; |
|
|
|
blk_queue_max_segments(disk->queue, CARM_MAX_REQ_SG); |
|
blk_queue_segment_boundary(disk->queue, CARM_SG_BOUNDARY); |
|
return 0; |
|
} |
|
|
|
static void carm_free_disk(struct carm_host *host, unsigned int port_no) |
|
{ |
|
struct carm_port *port = &host->port[port_no]; |
|
struct gendisk *disk = port->disk; |
|
|
|
if (!disk) |
|
return; |
|
|
|
if (host->state > HST_DEV_ACTIVATE) |
|
del_gendisk(disk); |
|
blk_cleanup_disk(disk); |
|
} |
|
|
|
static int carm_init_shm(struct carm_host *host) |
|
{ |
|
host->shm = dma_alloc_coherent(&host->pdev->dev, CARM_SHM_SIZE, |
|
&host->shm_dma, GFP_KERNEL); |
|
if (!host->shm) |
|
return -ENOMEM; |
|
|
|
host->msg_base = host->shm + RBUF_LEN; |
|
host->msg_dma = host->shm_dma + RBUF_LEN; |
|
|
|
memset(host->shm, 0xff, RBUF_LEN); |
|
memset(host->msg_base, 0, PDC_SHM_SIZE - RBUF_LEN); |
|
|
|
return 0; |
|
} |
|
|
|
static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
|
{ |
|
struct carm_host *host; |
|
int rc; |
|
struct request_queue *q; |
|
unsigned int i; |
|
|
|
printk_once(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n"); |
|
|
|
rc = pci_enable_device(pdev); |
|
if (rc) |
|
return rc; |
|
|
|
rc = pci_request_regions(pdev, DRV_NAME); |
|
if (rc) |
|
goto err_out; |
|
|
|
rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); |
|
if (rc) { |
|
printk(KERN_ERR DRV_NAME "(%s): DMA mask failure\n", |
|
pci_name(pdev)); |
|
goto err_out_regions; |
|
} |
|
|
|
host = kzalloc(sizeof(*host), GFP_KERNEL); |
|
if (!host) { |
|
rc = -ENOMEM; |
|
goto err_out_regions; |
|
} |
|
|
|
host->pdev = pdev; |
|
spin_lock_init(&host->lock); |
|
INIT_WORK(&host->fsm_task, carm_fsm_task); |
|
init_completion(&host->probe_comp); |
|
|
|
host->mmio = ioremap(pci_resource_start(pdev, 0), |
|
pci_resource_len(pdev, 0)); |
|
if (!host->mmio) { |
|
printk(KERN_ERR DRV_NAME "(%s): MMIO alloc failure\n", |
|
pci_name(pdev)); |
|
rc = -ENOMEM; |
|
goto err_out_kfree; |
|
} |
|
|
|
rc = carm_init_shm(host); |
|
if (rc) { |
|
printk(KERN_ERR DRV_NAME "(%s): DMA SHM alloc failure\n", |
|
pci_name(pdev)); |
|
goto err_out_iounmap; |
|
} |
|
|
|
memset(&host->tag_set, 0, sizeof(host->tag_set)); |
|
host->tag_set.ops = &carm_mq_ops; |
|
host->tag_set.cmd_size = sizeof(struct carm_request); |
|
host->tag_set.nr_hw_queues = 1; |
|
host->tag_set.nr_maps = 1; |
|
host->tag_set.queue_depth = max_queue; |
|
host->tag_set.numa_node = NUMA_NO_NODE; |
|
host->tag_set.flags = BLK_MQ_F_SHOULD_MERGE; |
|
|
|
rc = blk_mq_alloc_tag_set(&host->tag_set); |
|
if (rc) |
|
goto err_out_dma_free; |
|
|
|
q = blk_mq_init_queue(&host->tag_set); |
|
if (IS_ERR(q)) { |
|
rc = PTR_ERR(q); |
|
blk_mq_free_tag_set(&host->tag_set); |
|
goto err_out_dma_free; |
|
} |
|
|
|
host->oob_q = q; |
|
q->queuedata = host; |
|
|
|
/* |
|
* Figure out which major to use: 160, 161, or dynamic |
|
*/ |
|
if (!test_and_set_bit(0, &carm_major_alloc)) |
|
host->major = 160; |
|
else if (!test_and_set_bit(1, &carm_major_alloc)) |
|
host->major = 161; |
|
else |
|
host->flags |= FL_DYN_MAJOR; |
|
|
|
host->id = carm_host_id; |
|
sprintf(host->name, DRV_NAME "%d", carm_host_id); |
|
|
|
rc = register_blkdev(host->major, host->name); |
|
if (rc < 0) |
|
goto err_out_free_majors; |
|
if (host->flags & FL_DYN_MAJOR) |
|
host->major = rc; |
|
|
|
for (i = 0; i < CARM_MAX_PORTS; i++) { |
|
rc = carm_init_disk(host, i); |
|
if (rc) |
|
goto err_out_blkdev_disks; |
|
} |
|
|
|
pci_set_master(pdev); |
|
|
|
rc = request_irq(pdev->irq, carm_interrupt, IRQF_SHARED, DRV_NAME, host); |
|
if (rc) { |
|
printk(KERN_ERR DRV_NAME "(%s): irq alloc failure\n", |
|
pci_name(pdev)); |
|
goto err_out_blkdev_disks; |
|
} |
|
|
|
rc = carm_init_host(host); |
|
if (rc) |
|
goto err_out_free_irq; |
|
|
|
DPRINTK("waiting for probe_comp\n"); |
|
wait_for_completion(&host->probe_comp); |
|
|
|
printk(KERN_INFO "%s: pci %s, ports %d, io %llx, irq %u, major %d\n", |
|
host->name, pci_name(pdev), (int) CARM_MAX_PORTS, |
|
(unsigned long long)pci_resource_start(pdev, 0), |
|
pdev->irq, host->major); |
|
|
|
carm_host_id++; |
|
pci_set_drvdata(pdev, host); |
|
return 0; |
|
|
|
err_out_free_irq: |
|
free_irq(pdev->irq, host); |
|
err_out_blkdev_disks: |
|
for (i = 0; i < CARM_MAX_PORTS; i++) |
|
carm_free_disk(host, i); |
|
unregister_blkdev(host->major, host->name); |
|
err_out_free_majors: |
|
if (host->major == 160) |
|
clear_bit(0, &carm_major_alloc); |
|
else if (host->major == 161) |
|
clear_bit(1, &carm_major_alloc); |
|
blk_cleanup_queue(host->oob_q); |
|
blk_mq_free_tag_set(&host->tag_set); |
|
err_out_dma_free: |
|
dma_free_coherent(&pdev->dev, CARM_SHM_SIZE, host->shm, host->shm_dma); |
|
err_out_iounmap: |
|
iounmap(host->mmio); |
|
err_out_kfree: |
|
kfree(host); |
|
err_out_regions: |
|
pci_release_regions(pdev); |
|
err_out: |
|
pci_disable_device(pdev); |
|
return rc; |
|
} |
|
|
|
static void carm_remove_one (struct pci_dev *pdev) |
|
{ |
|
struct carm_host *host = pci_get_drvdata(pdev); |
|
unsigned int i; |
|
|
|
if (!host) { |
|
printk(KERN_ERR PFX "BUG: no host data for PCI(%s)\n", |
|
pci_name(pdev)); |
|
return; |
|
} |
|
|
|
free_irq(pdev->irq, host); |
|
for (i = 0; i < CARM_MAX_PORTS; i++) |
|
carm_free_disk(host, i); |
|
unregister_blkdev(host->major, host->name); |
|
if (host->major == 160) |
|
clear_bit(0, &carm_major_alloc); |
|
else if (host->major == 161) |
|
clear_bit(1, &carm_major_alloc); |
|
blk_cleanup_queue(host->oob_q); |
|
blk_mq_free_tag_set(&host->tag_set); |
|
dma_free_coherent(&pdev->dev, CARM_SHM_SIZE, host->shm, host->shm_dma); |
|
iounmap(host->mmio); |
|
kfree(host); |
|
pci_release_regions(pdev); |
|
pci_disable_device(pdev); |
|
} |
|
|
|
module_pci_driver(carm_driver);
|
|
|