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537 lines
15 KiB
537 lines
15 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* FPU signal frame handling routines. |
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*/ |
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|
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#include <linux/compat.h> |
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#include <linux/cpu.h> |
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#include <linux/pagemap.h> |
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#include <asm/fpu/internal.h> |
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#include <asm/fpu/signal.h> |
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#include <asm/fpu/regset.h> |
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#include <asm/fpu/xstate.h> |
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#include <asm/sigframe.h> |
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#include <asm/trace/fpu.h> |
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static struct _fpx_sw_bytes fx_sw_reserved __ro_after_init; |
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static struct _fpx_sw_bytes fx_sw_reserved_ia32 __ro_after_init; |
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/* |
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* Check for the presence of extended state information in the |
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* user fpstate pointer in the sigcontext. |
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*/ |
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static inline int check_xstate_in_sigframe(struct fxregs_state __user *fxbuf, |
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struct _fpx_sw_bytes *fx_sw) |
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{ |
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int min_xstate_size = sizeof(struct fxregs_state) + |
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sizeof(struct xstate_header); |
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void __user *fpstate = fxbuf; |
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unsigned int magic2; |
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if (__copy_from_user(fx_sw, &fxbuf->sw_reserved[0], sizeof(*fx_sw))) |
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return -EFAULT; |
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/* Check for the first magic field and other error scenarios. */ |
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if (fx_sw->magic1 != FP_XSTATE_MAGIC1 || |
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fx_sw->xstate_size < min_xstate_size || |
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fx_sw->xstate_size > fpu_user_xstate_size || |
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fx_sw->xstate_size > fx_sw->extended_size) |
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goto setfx; |
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/* |
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* Check for the presence of second magic word at the end of memory |
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* layout. This detects the case where the user just copied the legacy |
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* fpstate layout with out copying the extended state information |
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* in the memory layout. |
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*/ |
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if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size))) |
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return -EFAULT; |
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if (likely(magic2 == FP_XSTATE_MAGIC2)) |
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return 0; |
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setfx: |
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trace_x86_fpu_xstate_check_failed(¤t->thread.fpu); |
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/* Set the parameters for fx only state */ |
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fx_sw->magic1 = 0; |
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fx_sw->xstate_size = sizeof(struct fxregs_state); |
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fx_sw->xfeatures = XFEATURE_MASK_FPSSE; |
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return 0; |
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} |
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/* |
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* Signal frame handlers. |
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*/ |
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static inline int save_fsave_header(struct task_struct *tsk, void __user *buf) |
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{ |
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if (use_fxsr()) { |
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struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; |
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struct user_i387_ia32_struct env; |
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struct _fpstate_32 __user *fp = buf; |
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fpregs_lock(); |
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if (!test_thread_flag(TIF_NEED_FPU_LOAD)) |
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fxsave(&tsk->thread.fpu.state.fxsave); |
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fpregs_unlock(); |
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convert_from_fxsr(&env, tsk); |
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if (__copy_to_user(buf, &env, sizeof(env)) || |
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__put_user(xsave->i387.swd, &fp->status) || |
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__put_user(X86_FXSR_MAGIC, &fp->magic)) |
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return -1; |
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} else { |
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struct fregs_state __user *fp = buf; |
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u32 swd; |
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if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status)) |
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return -1; |
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} |
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return 0; |
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} |
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static inline int save_xstate_epilog(void __user *buf, int ia32_frame) |
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{ |
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struct xregs_state __user *x = buf; |
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struct _fpx_sw_bytes *sw_bytes; |
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u32 xfeatures; |
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int err; |
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/* Setup the bytes not touched by the [f]xsave and reserved for SW. */ |
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sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved; |
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err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes)); |
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if (!use_xsave()) |
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return err; |
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err |= __put_user(FP_XSTATE_MAGIC2, |
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(__u32 __user *)(buf + fpu_user_xstate_size)); |
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/* |
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* Read the xfeatures which we copied (directly from the cpu or |
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* from the state in task struct) to the user buffers. |
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*/ |
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err |= __get_user(xfeatures, (__u32 __user *)&x->header.xfeatures); |
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/* |
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* For legacy compatible, we always set FP/SSE bits in the bit |
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* vector while saving the state to the user context. This will |
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* enable us capturing any changes(during sigreturn) to |
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* the FP/SSE bits by the legacy applications which don't touch |
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* xfeatures in the xsave header. |
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* |
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* xsave aware apps can change the xfeatures in the xsave |
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* header as well as change any contents in the memory layout. |
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* xrestore as part of sigreturn will capture all the changes. |
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*/ |
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xfeatures |= XFEATURE_MASK_FPSSE; |
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err |= __put_user(xfeatures, (__u32 __user *)&x->header.xfeatures); |
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return err; |
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} |
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static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf) |
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{ |
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int err; |
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if (use_xsave()) |
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err = xsave_to_user_sigframe(buf); |
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else if (use_fxsr()) |
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err = fxsave_to_user_sigframe((struct fxregs_state __user *) buf); |
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else |
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err = fnsave_to_user_sigframe((struct fregs_state __user *) buf); |
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if (unlikely(err) && __clear_user(buf, fpu_user_xstate_size)) |
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err = -EFAULT; |
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return err; |
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} |
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/* |
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* Save the fpu, extended register state to the user signal frame. |
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* |
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* 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save |
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* state is copied. |
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* 'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'. |
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* |
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* buf == buf_fx for 64-bit frames and 32-bit fsave frame. |
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* buf != buf_fx for 32-bit frames with fxstate. |
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* |
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* Try to save it directly to the user frame with disabled page fault handler. |
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* If this fails then do the slow path where the FPU state is first saved to |
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* task's fpu->state and then copy it to the user frame pointed to by the |
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* aligned pointer 'buf_fx'. |
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* |
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* If this is a 32-bit frame with fxstate, put a fsave header before |
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* the aligned state at 'buf_fx'. |
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* |
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* For [f]xsave state, update the SW reserved fields in the [f]xsave frame |
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* indicating the absence/presence of the extended state to the user. |
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*/ |
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int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size) |
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{ |
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struct task_struct *tsk = current; |
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int ia32_fxstate = (buf != buf_fx); |
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int ret; |
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ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) || |
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IS_ENABLED(CONFIG_IA32_EMULATION)); |
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if (!static_cpu_has(X86_FEATURE_FPU)) { |
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struct user_i387_ia32_struct fp; |
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fpregs_soft_get(current, NULL, (struct membuf){.p = &fp, |
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.left = sizeof(fp)}); |
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return copy_to_user(buf, &fp, sizeof(fp)) ? -EFAULT : 0; |
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} |
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if (!access_ok(buf, size)) |
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return -EACCES; |
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retry: |
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/* |
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* Load the FPU registers if they are not valid for the current task. |
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* With a valid FPU state we can attempt to save the state directly to |
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* userland's stack frame which will likely succeed. If it does not, |
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* resolve the fault in the user memory and try again. |
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*/ |
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fpregs_lock(); |
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if (test_thread_flag(TIF_NEED_FPU_LOAD)) |
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fpregs_restore_userregs(); |
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pagefault_disable(); |
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ret = copy_fpregs_to_sigframe(buf_fx); |
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pagefault_enable(); |
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fpregs_unlock(); |
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if (ret) { |
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if (!fault_in_pages_writeable(buf_fx, fpu_user_xstate_size)) |
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goto retry; |
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return -EFAULT; |
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} |
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/* Save the fsave header for the 32-bit frames. */ |
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if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf)) |
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return -1; |
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if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate)) |
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return -1; |
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return 0; |
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} |
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static int __restore_fpregs_from_user(void __user *buf, u64 xrestore, |
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bool fx_only) |
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{ |
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if (use_xsave()) { |
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u64 init_bv = xfeatures_mask_uabi() & ~xrestore; |
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int ret; |
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if (likely(!fx_only)) |
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ret = xrstor_from_user_sigframe(buf, xrestore); |
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else |
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ret = fxrstor_from_user_sigframe(buf); |
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if (!ret && unlikely(init_bv)) |
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os_xrstor(&init_fpstate.xsave, init_bv); |
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return ret; |
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} else if (use_fxsr()) { |
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return fxrstor_from_user_sigframe(buf); |
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} else { |
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return frstor_from_user_sigframe(buf); |
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} |
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} |
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/* |
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* Attempt to restore the FPU registers directly from user memory. |
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* Pagefaults are handled and any errors returned are fatal. |
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*/ |
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static int restore_fpregs_from_user(void __user *buf, u64 xrestore, |
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bool fx_only, unsigned int size) |
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{ |
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struct fpu *fpu = ¤t->thread.fpu; |
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int ret; |
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retry: |
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fpregs_lock(); |
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pagefault_disable(); |
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ret = __restore_fpregs_from_user(buf, xrestore, fx_only); |
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pagefault_enable(); |
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if (unlikely(ret)) { |
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/* |
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* The above did an FPU restore operation, restricted to |
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* the user portion of the registers, and failed, but the |
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* microcode might have modified the FPU registers |
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* nevertheless. |
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* |
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* If the FPU registers do not belong to current, then |
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* invalidate the FPU register state otherwise the task |
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* might preempt current and return to user space with |
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* corrupted FPU registers. |
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*/ |
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if (test_thread_flag(TIF_NEED_FPU_LOAD)) |
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__cpu_invalidate_fpregs_state(); |
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fpregs_unlock(); |
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/* Try to handle #PF, but anything else is fatal. */ |
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if (ret != -EFAULT) |
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return -EINVAL; |
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ret = fault_in_pages_readable(buf, size); |
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if (!ret) |
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goto retry; |
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return ret; |
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} |
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/* |
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* Restore supervisor states: previous context switch etc has done |
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* XSAVES and saved the supervisor states in the kernel buffer from |
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* which they can be restored now. |
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* |
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* It would be optimal to handle this with a single XRSTORS, but |
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* this does not work because the rest of the FPU registers have |
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* been restored from a user buffer directly. |
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*/ |
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if (test_thread_flag(TIF_NEED_FPU_LOAD) && xfeatures_mask_supervisor()) |
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os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor()); |
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fpregs_mark_activate(); |
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fpregs_unlock(); |
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return 0; |
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} |
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static int __fpu_restore_sig(void __user *buf, void __user *buf_fx, |
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bool ia32_fxstate) |
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{ |
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int state_size = fpu_kernel_xstate_size; |
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struct task_struct *tsk = current; |
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struct fpu *fpu = &tsk->thread.fpu; |
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struct user_i387_ia32_struct env; |
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u64 user_xfeatures = 0; |
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bool fx_only = false; |
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int ret; |
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if (use_xsave()) { |
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struct _fpx_sw_bytes fx_sw_user; |
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ret = check_xstate_in_sigframe(buf_fx, &fx_sw_user); |
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if (unlikely(ret)) |
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return ret; |
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fx_only = !fx_sw_user.magic1; |
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state_size = fx_sw_user.xstate_size; |
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user_xfeatures = fx_sw_user.xfeatures; |
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} else { |
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user_xfeatures = XFEATURE_MASK_FPSSE; |
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} |
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if (likely(!ia32_fxstate)) { |
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/* |
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* Attempt to restore the FPU registers directly from user |
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* memory. For that to succeed, the user access cannot cause page |
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* faults. If it does, fall back to the slow path below, going |
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* through the kernel buffer with the enabled pagefault handler. |
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*/ |
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return restore_fpregs_from_user(buf_fx, user_xfeatures, fx_only, |
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state_size); |
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} |
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/* |
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* Copy the legacy state because the FP portion of the FX frame has |
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* to be ignored for histerical raisins. The legacy state is folded |
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* in once the larger state has been copied. |
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*/ |
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ret = __copy_from_user(&env, buf, sizeof(env)); |
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if (ret) |
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return ret; |
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/* |
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* By setting TIF_NEED_FPU_LOAD it is ensured that our xstate is |
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* not modified on context switch and that the xstate is considered |
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* to be loaded again on return to userland (overriding last_cpu avoids |
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* the optimisation). |
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*/ |
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fpregs_lock(); |
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if (!test_thread_flag(TIF_NEED_FPU_LOAD)) { |
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/* |
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* If supervisor states are available then save the |
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* hardware state in current's fpstate so that the |
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* supervisor state is preserved. Save the full state for |
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* simplicity. There is no point in optimizing this by only |
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* saving the supervisor states and then shuffle them to |
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* the right place in memory. It's ia32 mode. Shrug. |
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*/ |
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if (xfeatures_mask_supervisor()) |
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os_xsave(&fpu->state.xsave); |
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set_thread_flag(TIF_NEED_FPU_LOAD); |
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} |
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__fpu_invalidate_fpregs_state(fpu); |
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__cpu_invalidate_fpregs_state(); |
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fpregs_unlock(); |
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if (use_xsave() && !fx_only) { |
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ret = copy_sigframe_from_user_to_xstate(&fpu->state.xsave, buf_fx); |
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if (ret) |
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return ret; |
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} else { |
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if (__copy_from_user(&fpu->state.fxsave, buf_fx, |
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sizeof(fpu->state.fxsave))) |
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return -EFAULT; |
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if (IS_ENABLED(CONFIG_X86_64)) { |
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/* Reject invalid MXCSR values. */ |
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if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask) |
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return -EINVAL; |
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} else { |
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/* Mask invalid bits out for historical reasons (broken hardware). */ |
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fpu->state.fxsave.mxcsr &= mxcsr_feature_mask; |
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} |
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/* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */ |
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if (use_xsave()) |
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fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE; |
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} |
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/* Fold the legacy FP storage */ |
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convert_to_fxsr(&fpu->state.fxsave, &env); |
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fpregs_lock(); |
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if (use_xsave()) { |
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/* |
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* Remove all UABI feature bits not set in user_xfeatures |
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* from the memory xstate header which makes the full |
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* restore below bring them into init state. This works for |
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* fx_only mode as well because that has only FP and SSE |
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* set in user_xfeatures. |
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* |
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* Preserve supervisor states! |
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*/ |
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u64 mask = user_xfeatures | xfeatures_mask_supervisor(); |
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fpu->state.xsave.header.xfeatures &= mask; |
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ret = os_xrstor_safe(&fpu->state.xsave, xfeatures_mask_all); |
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} else { |
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ret = fxrstor_safe(&fpu->state.fxsave); |
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} |
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if (likely(!ret)) |
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fpregs_mark_activate(); |
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fpregs_unlock(); |
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return ret; |
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} |
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static inline int xstate_sigframe_size(void) |
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{ |
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return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE : |
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fpu_user_xstate_size; |
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} |
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/* |
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* Restore FPU state from a sigframe: |
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*/ |
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int fpu__restore_sig(void __user *buf, int ia32_frame) |
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{ |
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unsigned int size = xstate_sigframe_size(); |
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struct fpu *fpu = ¤t->thread.fpu; |
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void __user *buf_fx = buf; |
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bool ia32_fxstate = false; |
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int ret; |
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if (unlikely(!buf)) { |
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fpu__clear_user_states(fpu); |
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return 0; |
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} |
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ia32_frame &= (IS_ENABLED(CONFIG_X86_32) || |
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IS_ENABLED(CONFIG_IA32_EMULATION)); |
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/* |
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* Only FXSR enabled systems need the FX state quirk. |
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* FRSTOR does not need it and can use the fast path. |
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*/ |
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if (ia32_frame && use_fxsr()) { |
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buf_fx = buf + sizeof(struct fregs_state); |
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size += sizeof(struct fregs_state); |
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ia32_fxstate = true; |
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} |
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if (!access_ok(buf, size)) { |
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ret = -EACCES; |
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goto out; |
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} |
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if (!IS_ENABLED(CONFIG_X86_64) && !cpu_feature_enabled(X86_FEATURE_FPU)) { |
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ret = fpregs_soft_set(current, NULL, 0, |
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sizeof(struct user_i387_ia32_struct), |
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NULL, buf); |
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} else { |
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ret = __fpu_restore_sig(buf, buf_fx, ia32_fxstate); |
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} |
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out: |
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if (unlikely(ret)) |
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fpu__clear_user_states(fpu); |
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return ret; |
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} |
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unsigned long |
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fpu__alloc_mathframe(unsigned long sp, int ia32_frame, |
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unsigned long *buf_fx, unsigned long *size) |
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{ |
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unsigned long frame_size = xstate_sigframe_size(); |
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*buf_fx = sp = round_down(sp - frame_size, 64); |
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if (ia32_frame && use_fxsr()) { |
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frame_size += sizeof(struct fregs_state); |
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sp -= sizeof(struct fregs_state); |
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} |
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*size = frame_size; |
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return sp; |
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} |
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unsigned long fpu__get_fpstate_size(void) |
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{ |
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unsigned long ret = xstate_sigframe_size(); |
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/* |
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* This space is needed on (most) 32-bit kernels, or when a 32-bit |
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* app is running on a 64-bit kernel. To keep things simple, just |
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* assume the worst case and always include space for 'freg_state', |
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* even for 64-bit apps on 64-bit kernels. This wastes a bit of |
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* space, but keeps the code simple. |
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*/ |
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if ((IS_ENABLED(CONFIG_IA32_EMULATION) || |
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IS_ENABLED(CONFIG_X86_32)) && use_fxsr()) |
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ret += sizeof(struct fregs_state); |
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return ret; |
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} |
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/* |
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* Prepare the SW reserved portion of the fxsave memory layout, indicating |
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* the presence of the extended state information in the memory layout |
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* pointed by the fpstate pointer in the sigcontext. |
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* This will be saved when ever the FP and extended state context is |
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* saved on the user stack during the signal handler delivery to the user. |
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*/ |
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void fpu__init_prepare_fx_sw_frame(void) |
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{ |
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int size = fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE; |
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fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1; |
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fx_sw_reserved.extended_size = size; |
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fx_sw_reserved.xfeatures = xfeatures_mask_uabi(); |
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fx_sw_reserved.xstate_size = fpu_user_xstate_size; |
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if (IS_ENABLED(CONFIG_IA32_EMULATION) || |
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IS_ENABLED(CONFIG_X86_32)) { |
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int fsave_header_size = sizeof(struct fregs_state); |
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fx_sw_reserved_ia32 = fx_sw_reserved; |
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fx_sw_reserved_ia32.extended_size = size + fsave_header_size; |
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} |
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} |
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