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379 lines
8.1 KiB
379 lines
8.1 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* s390 specific pci instructions |
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* |
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* Copyright IBM Corp. 2013 |
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*/ |
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#include <linux/export.h> |
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#include <linux/errno.h> |
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#include <linux/delay.h> |
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#include <linux/jump_label.h> |
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#include <asm/facility.h> |
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#include <asm/pci_insn.h> |
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#include <asm/pci_debug.h> |
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#include <asm/pci_io.h> |
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#include <asm/processor.h> |
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#define ZPCI_INSN_BUSY_DELAY 1 /* 1 microsecond */ |
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static inline void zpci_err_insn(u8 cc, u8 status, u64 req, u64 offset) |
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{ |
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struct { |
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u64 req; |
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u64 offset; |
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u8 cc; |
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u8 status; |
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} __packed data = {req, offset, cc, status}; |
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zpci_err_hex(&data, sizeof(data)); |
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} |
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/* Modify PCI Function Controls */ |
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static inline u8 __mpcifc(u64 req, struct zpci_fib *fib, u8 *status) |
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{ |
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u8 cc; |
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asm volatile ( |
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" .insn rxy,0xe300000000d0,%[req],%[fib]\n" |
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" ipm %[cc]\n" |
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" srl %[cc],28\n" |
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: [cc] "=d" (cc), [req] "+d" (req), [fib] "+Q" (*fib) |
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: : "cc"); |
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*status = req >> 24 & 0xff; |
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return cc; |
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} |
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u8 zpci_mod_fc(u64 req, struct zpci_fib *fib, u8 *status) |
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{ |
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u8 cc; |
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do { |
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cc = __mpcifc(req, fib, status); |
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if (cc == 2) |
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msleep(ZPCI_INSN_BUSY_DELAY); |
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} while (cc == 2); |
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if (cc) |
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zpci_err_insn(cc, *status, req, 0); |
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return cc; |
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} |
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/* Refresh PCI Translations */ |
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static inline u8 __rpcit(u64 fn, u64 addr, u64 range, u8 *status) |
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{ |
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union register_pair addr_range = {.even = addr, .odd = range}; |
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u8 cc; |
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asm volatile ( |
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" .insn rre,0xb9d30000,%[fn],%[addr_range]\n" |
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" ipm %[cc]\n" |
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" srl %[cc],28\n" |
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: [cc] "=d" (cc), [fn] "+d" (fn) |
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: [addr_range] "d" (addr_range.pair) |
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: "cc"); |
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*status = fn >> 24 & 0xff; |
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return cc; |
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} |
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int zpci_refresh_trans(u64 fn, u64 addr, u64 range) |
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{ |
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u8 cc, status; |
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do { |
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cc = __rpcit(fn, addr, range, &status); |
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if (cc == 2) |
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udelay(ZPCI_INSN_BUSY_DELAY); |
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} while (cc == 2); |
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if (cc) |
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zpci_err_insn(cc, status, addr, range); |
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if (cc == 1 && (status == 4 || status == 16)) |
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return -ENOMEM; |
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return (cc) ? -EIO : 0; |
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} |
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/* Set Interruption Controls */ |
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int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib) |
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{ |
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if (!test_facility(72)) |
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return -EIO; |
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asm volatile( |
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".insn rsy,0xeb00000000d1,%[ctl],%[isc],%[iib]\n" |
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: : [ctl] "d" (ctl), [isc] "d" (isc << 27), [iib] "Q" (*iib)); |
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return 0; |
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} |
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/* PCI Load */ |
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static inline int ____pcilg(u64 *data, u64 req, u64 offset, u8 *status) |
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{ |
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union register_pair req_off = {.even = req, .odd = offset}; |
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int cc = -ENXIO; |
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u64 __data; |
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asm volatile ( |
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" .insn rre,0xb9d20000,%[data],%[req_off]\n" |
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"0: ipm %[cc]\n" |
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" srl %[cc],28\n" |
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"1:\n" |
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EX_TABLE(0b, 1b) |
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: [cc] "+d" (cc), [data] "=d" (__data), |
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[req_off] "+&d" (req_off.pair) :: "cc"); |
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*status = req_off.even >> 24 & 0xff; |
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*data = __data; |
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return cc; |
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} |
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static inline int __pcilg(u64 *data, u64 req, u64 offset, u8 *status) |
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{ |
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u64 __data; |
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int cc; |
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cc = ____pcilg(&__data, req, offset, status); |
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if (!cc) |
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*data = __data; |
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return cc; |
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} |
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int __zpci_load(u64 *data, u64 req, u64 offset) |
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{ |
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u8 status; |
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int cc; |
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do { |
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cc = __pcilg(data, req, offset, &status); |
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if (cc == 2) |
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udelay(ZPCI_INSN_BUSY_DELAY); |
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} while (cc == 2); |
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if (cc) |
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zpci_err_insn(cc, status, req, offset); |
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return (cc > 0) ? -EIO : cc; |
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} |
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EXPORT_SYMBOL_GPL(__zpci_load); |
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static inline int zpci_load_fh(u64 *data, const volatile void __iomem *addr, |
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unsigned long len) |
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{ |
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struct zpci_iomap_entry *entry = &zpci_iomap_start[ZPCI_IDX(addr)]; |
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u64 req = ZPCI_CREATE_REQ(entry->fh, entry->bar, len); |
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return __zpci_load(data, req, ZPCI_OFFSET(addr)); |
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} |
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static inline int __pcilg_mio(u64 *data, u64 ioaddr, u64 len, u8 *status) |
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{ |
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union register_pair ioaddr_len = {.even = ioaddr, .odd = len}; |
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int cc = -ENXIO; |
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u64 __data; |
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asm volatile ( |
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" .insn rre,0xb9d60000,%[data],%[ioaddr_len]\n" |
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"0: ipm %[cc]\n" |
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" srl %[cc],28\n" |
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"1:\n" |
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EX_TABLE(0b, 1b) |
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: [cc] "+d" (cc), [data] "=d" (__data), |
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[ioaddr_len] "+&d" (ioaddr_len.pair) :: "cc"); |
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*status = ioaddr_len.odd >> 24 & 0xff; |
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*data = __data; |
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return cc; |
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} |
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int zpci_load(u64 *data, const volatile void __iomem *addr, unsigned long len) |
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{ |
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u8 status; |
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int cc; |
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if (!static_branch_unlikely(&have_mio)) |
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return zpci_load_fh(data, addr, len); |
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cc = __pcilg_mio(data, (__force u64) addr, len, &status); |
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if (cc) |
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zpci_err_insn(cc, status, 0, (__force u64) addr); |
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return (cc > 0) ? -EIO : cc; |
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} |
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EXPORT_SYMBOL_GPL(zpci_load); |
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/* PCI Store */ |
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static inline int __pcistg(u64 data, u64 req, u64 offset, u8 *status) |
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{ |
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union register_pair req_off = {.even = req, .odd = offset}; |
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int cc = -ENXIO; |
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asm volatile ( |
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" .insn rre,0xb9d00000,%[data],%[req_off]\n" |
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"0: ipm %[cc]\n" |
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" srl %[cc],28\n" |
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"1:\n" |
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EX_TABLE(0b, 1b) |
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: [cc] "+d" (cc), [req_off] "+&d" (req_off.pair) |
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: [data] "d" (data) |
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: "cc"); |
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*status = req_off.even >> 24 & 0xff; |
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return cc; |
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} |
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int __zpci_store(u64 data, u64 req, u64 offset) |
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{ |
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u8 status; |
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int cc; |
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do { |
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cc = __pcistg(data, req, offset, &status); |
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if (cc == 2) |
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udelay(ZPCI_INSN_BUSY_DELAY); |
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} while (cc == 2); |
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if (cc) |
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zpci_err_insn(cc, status, req, offset); |
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return (cc > 0) ? -EIO : cc; |
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} |
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EXPORT_SYMBOL_GPL(__zpci_store); |
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static inline int zpci_store_fh(const volatile void __iomem *addr, u64 data, |
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unsigned long len) |
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{ |
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struct zpci_iomap_entry *entry = &zpci_iomap_start[ZPCI_IDX(addr)]; |
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u64 req = ZPCI_CREATE_REQ(entry->fh, entry->bar, len); |
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return __zpci_store(data, req, ZPCI_OFFSET(addr)); |
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} |
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static inline int __pcistg_mio(u64 data, u64 ioaddr, u64 len, u8 *status) |
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{ |
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union register_pair ioaddr_len = {.even = ioaddr, .odd = len}; |
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int cc = -ENXIO; |
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asm volatile ( |
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" .insn rre,0xb9d40000,%[data],%[ioaddr_len]\n" |
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"0: ipm %[cc]\n" |
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" srl %[cc],28\n" |
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"1:\n" |
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EX_TABLE(0b, 1b) |
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: [cc] "+d" (cc), [ioaddr_len] "+&d" (ioaddr_len.pair) |
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: [data] "d" (data) |
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: "cc", "memory"); |
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*status = ioaddr_len.odd >> 24 & 0xff; |
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return cc; |
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} |
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int zpci_store(const volatile void __iomem *addr, u64 data, unsigned long len) |
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{ |
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u8 status; |
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int cc; |
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if (!static_branch_unlikely(&have_mio)) |
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return zpci_store_fh(addr, data, len); |
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cc = __pcistg_mio(data, (__force u64) addr, len, &status); |
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if (cc) |
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zpci_err_insn(cc, status, 0, (__force u64) addr); |
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return (cc > 0) ? -EIO : cc; |
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} |
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EXPORT_SYMBOL_GPL(zpci_store); |
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/* PCI Store Block */ |
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static inline int __pcistb(const u64 *data, u64 req, u64 offset, u8 *status) |
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{ |
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int cc = -ENXIO; |
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asm volatile ( |
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" .insn rsy,0xeb00000000d0,%[req],%[offset],%[data]\n" |
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"0: ipm %[cc]\n" |
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" srl %[cc],28\n" |
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"1:\n" |
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EX_TABLE(0b, 1b) |
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: [cc] "+d" (cc), [req] "+d" (req) |
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: [offset] "d" (offset), [data] "Q" (*data) |
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: "cc"); |
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*status = req >> 24 & 0xff; |
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return cc; |
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} |
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int __zpci_store_block(const u64 *data, u64 req, u64 offset) |
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{ |
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u8 status; |
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int cc; |
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do { |
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cc = __pcistb(data, req, offset, &status); |
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if (cc == 2) |
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udelay(ZPCI_INSN_BUSY_DELAY); |
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} while (cc == 2); |
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if (cc) |
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zpci_err_insn(cc, status, req, offset); |
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return (cc > 0) ? -EIO : cc; |
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} |
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EXPORT_SYMBOL_GPL(__zpci_store_block); |
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static inline int zpci_write_block_fh(volatile void __iomem *dst, |
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const void *src, unsigned long len) |
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{ |
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struct zpci_iomap_entry *entry = &zpci_iomap_start[ZPCI_IDX(dst)]; |
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u64 req = ZPCI_CREATE_REQ(entry->fh, entry->bar, len); |
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u64 offset = ZPCI_OFFSET(dst); |
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return __zpci_store_block(src, req, offset); |
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} |
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static inline int __pcistb_mio(const u64 *data, u64 ioaddr, u64 len, u8 *status) |
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{ |
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int cc = -ENXIO; |
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asm volatile ( |
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" .insn rsy,0xeb00000000d4,%[len],%[ioaddr],%[data]\n" |
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"0: ipm %[cc]\n" |
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" srl %[cc],28\n" |
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"1:\n" |
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EX_TABLE(0b, 1b) |
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: [cc] "+d" (cc), [len] "+d" (len) |
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: [ioaddr] "d" (ioaddr), [data] "Q" (*data) |
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: "cc"); |
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*status = len >> 24 & 0xff; |
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return cc; |
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} |
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int zpci_write_block(volatile void __iomem *dst, |
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const void *src, unsigned long len) |
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{ |
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u8 status; |
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int cc; |
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if (!static_branch_unlikely(&have_mio)) |
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return zpci_write_block_fh(dst, src, len); |
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cc = __pcistb_mio(src, (__force u64) dst, len, &status); |
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if (cc) |
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zpci_err_insn(cc, status, 0, (__force u64) dst); |
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return (cc > 0) ? -EIO : cc; |
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} |
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EXPORT_SYMBOL_GPL(zpci_write_block); |
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static inline void __pciwb_mio(void) |
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{ |
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unsigned long unused = 0; |
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asm volatile (".insn rre,0xb9d50000,%[op],%[op]\n" |
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: [op] "+d" (unused)); |
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} |
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void zpci_barrier(void) |
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{ |
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if (static_branch_likely(&have_mio)) |
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__pciwb_mio(); |
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} |
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EXPORT_SYMBOL_GPL(zpci_barrier);
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