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252 lines
6.0 KiB
252 lines
6.0 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* This file contains the routines for initializing the MMU |
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* on the 8xx series of chips. |
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* -- christophe |
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* |
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* Derived from arch/powerpc/mm/40x_mmu.c: |
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*/ |
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#include <linux/memblock.h> |
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#include <linux/mmu_context.h> |
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#include <linux/hugetlb.h> |
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#include <asm/fixmap.h> |
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#include <asm/code-patching.h> |
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#include <asm/inst.h> |
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#include <mm/mmu_decl.h> |
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#define IMMR_SIZE (FIX_IMMR_SIZE << PAGE_SHIFT) |
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extern int __map_without_ltlbs; |
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static unsigned long block_mapped_ram; |
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/* |
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* Return PA for this VA if it is in an area mapped with LTLBs or fixmap. |
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* Otherwise, returns 0 |
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*/ |
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phys_addr_t v_block_mapped(unsigned long va) |
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{ |
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unsigned long p = PHYS_IMMR_BASE; |
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if (va >= VIRT_IMMR_BASE && va < VIRT_IMMR_BASE + IMMR_SIZE) |
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return p + va - VIRT_IMMR_BASE; |
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if (__map_without_ltlbs) |
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return 0; |
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if (va >= PAGE_OFFSET && va < PAGE_OFFSET + block_mapped_ram) |
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return __pa(va); |
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return 0; |
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} |
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/* |
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* Return VA for a given PA mapped with LTLBs or fixmap |
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* Return 0 if not mapped |
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*/ |
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unsigned long p_block_mapped(phys_addr_t pa) |
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{ |
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unsigned long p = PHYS_IMMR_BASE; |
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if (pa >= p && pa < p + IMMR_SIZE) |
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return VIRT_IMMR_BASE + pa - p; |
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if (__map_without_ltlbs) |
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return 0; |
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if (pa < block_mapped_ram) |
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return (unsigned long)__va(pa); |
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return 0; |
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} |
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static pte_t __init *early_hugepd_alloc_kernel(hugepd_t *pmdp, unsigned long va) |
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{ |
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if (hpd_val(*pmdp) == 0) { |
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pte_t *ptep = memblock_alloc(sizeof(pte_basic_t), SZ_4K); |
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if (!ptep) |
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return NULL; |
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hugepd_populate_kernel((hugepd_t *)pmdp, ptep, PAGE_SHIFT_8M); |
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hugepd_populate_kernel((hugepd_t *)pmdp + 1, ptep, PAGE_SHIFT_8M); |
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} |
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return hugepte_offset(*(hugepd_t *)pmdp, va, PGDIR_SHIFT); |
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} |
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static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa, |
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pgprot_t prot, int psize, bool new) |
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{ |
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pmd_t *pmdp = pmd_off_k(va); |
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pte_t *ptep; |
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if (WARN_ON(psize != MMU_PAGE_512K && psize != MMU_PAGE_8M)) |
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return -EINVAL; |
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if (new) { |
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if (WARN_ON(slab_is_available())) |
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return -EINVAL; |
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if (psize == MMU_PAGE_512K) |
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ptep = early_pte_alloc_kernel(pmdp, va); |
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else |
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ptep = early_hugepd_alloc_kernel((hugepd_t *)pmdp, va); |
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} else { |
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if (psize == MMU_PAGE_512K) |
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ptep = pte_offset_kernel(pmdp, va); |
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else |
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ptep = hugepte_offset(*(hugepd_t *)pmdp, va, PGDIR_SHIFT); |
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} |
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if (WARN_ON(!ptep)) |
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return -ENOMEM; |
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/* The PTE should never be already present */ |
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if (new && WARN_ON(pte_present(*ptep) && pgprot_val(prot))) |
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return -EINVAL; |
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set_huge_pte_at(&init_mm, va, ptep, pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot))); |
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return 0; |
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} |
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/* |
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* MMU_init_hw does the chip-specific initialization of the MMU hardware. |
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*/ |
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void __init MMU_init_hw(void) |
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{ |
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} |
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static bool immr_is_mapped __initdata; |
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void __init mmu_mapin_immr(void) |
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{ |
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if (immr_is_mapped) |
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return; |
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immr_is_mapped = true; |
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__early_map_kernel_hugepage(VIRT_IMMR_BASE, PHYS_IMMR_BASE, |
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PAGE_KERNEL_NCG, MMU_PAGE_512K, true); |
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} |
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static void mmu_mapin_ram_chunk(unsigned long offset, unsigned long top, |
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pgprot_t prot, bool new) |
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{ |
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unsigned long v = PAGE_OFFSET + offset; |
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unsigned long p = offset; |
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WARN_ON(!IS_ALIGNED(offset, SZ_512K) || !IS_ALIGNED(top, SZ_512K)); |
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for (; p < ALIGN(p, SZ_8M) && p < top; p += SZ_512K, v += SZ_512K) |
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__early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new); |
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for (; p < ALIGN_DOWN(top, SZ_8M) && p < top; p += SZ_8M, v += SZ_8M) |
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__early_map_kernel_hugepage(v, p, prot, MMU_PAGE_8M, new); |
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for (; p < ALIGN_DOWN(top, SZ_512K) && p < top; p += SZ_512K, v += SZ_512K) |
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__early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new); |
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if (!new) |
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flush_tlb_kernel_range(PAGE_OFFSET + v, PAGE_OFFSET + top); |
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} |
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unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top) |
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{ |
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unsigned long etext8 = ALIGN(__pa(_etext), SZ_8M); |
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unsigned long sinittext = __pa(_sinittext); |
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bool strict_boundary = strict_kernel_rwx_enabled() || debug_pagealloc_enabled_or_kfence(); |
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unsigned long boundary = strict_boundary ? sinittext : etext8; |
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unsigned long einittext8 = ALIGN(__pa(_einittext), SZ_8M); |
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WARN_ON(top < einittext8); |
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mmu_mapin_immr(); |
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if (__map_without_ltlbs) |
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return 0; |
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mmu_mapin_ram_chunk(0, boundary, PAGE_KERNEL_TEXT, true); |
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if (debug_pagealloc_enabled_or_kfence()) { |
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top = boundary; |
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} else { |
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mmu_mapin_ram_chunk(boundary, einittext8, PAGE_KERNEL_TEXT, true); |
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mmu_mapin_ram_chunk(einittext8, top, PAGE_KERNEL, true); |
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} |
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if (top > SZ_32M) |
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memblock_set_current_limit(top); |
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block_mapped_ram = top; |
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return top; |
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} |
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void mmu_mark_initmem_nx(void) |
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{ |
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unsigned long etext8 = ALIGN(__pa(_etext), SZ_8M); |
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unsigned long sinittext = __pa(_sinittext); |
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unsigned long boundary = strict_kernel_rwx_enabled() ? sinittext : etext8; |
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unsigned long einittext8 = ALIGN(__pa(_einittext), SZ_8M); |
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mmu_mapin_ram_chunk(0, boundary, PAGE_KERNEL_TEXT, false); |
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mmu_mapin_ram_chunk(boundary, einittext8, PAGE_KERNEL, false); |
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mmu_pin_tlb(block_mapped_ram, false); |
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} |
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#ifdef CONFIG_STRICT_KERNEL_RWX |
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void mmu_mark_rodata_ro(void) |
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{ |
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unsigned long sinittext = __pa(_sinittext); |
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mmu_mapin_ram_chunk(0, sinittext, PAGE_KERNEL_ROX, false); |
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if (IS_ENABLED(CONFIG_PIN_TLB_DATA)) |
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mmu_pin_tlb(block_mapped_ram, true); |
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} |
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#endif |
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void __init setup_initial_memory_limit(phys_addr_t first_memblock_base, |
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phys_addr_t first_memblock_size) |
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{ |
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/* We don't currently support the first MEMBLOCK not mapping 0 |
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* physical on those processors |
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*/ |
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BUG_ON(first_memblock_base != 0); |
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/* 8xx can only access 32MB at the moment */ |
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memblock_set_current_limit(min_t(u64, first_memblock_size, SZ_32M)); |
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} |
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#ifdef CONFIG_PPC_KUEP |
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void __init setup_kuep(bool disabled) |
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{ |
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if (disabled) |
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return; |
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pr_info("Activating Kernel Userspace Execution Prevention\n"); |
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mtspr(SPRN_MI_AP, MI_APG_KUEP); |
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} |
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#endif |
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#ifdef CONFIG_PPC_KUAP |
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struct static_key_false disable_kuap_key; |
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EXPORT_SYMBOL(disable_kuap_key); |
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void __init setup_kuap(bool disabled) |
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{ |
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if (disabled) { |
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static_branch_enable(&disable_kuap_key); |
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return; |
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} |
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pr_info("Activating Kernel Userspace Access Protection\n"); |
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mtspr(SPRN_MD_AP, MD_APG_KUAP); |
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} |
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#endif |
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int pud_clear_huge(pud_t *pud) |
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{ |
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return 0; |
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} |
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int pmd_clear_huge(pmd_t *pmd) |
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{ |
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return 0; |
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}
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