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152 lines
4.1 KiB
152 lines
4.1 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* This file contains the routines for initializing the MMU |
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* on the 4xx series of chips. |
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* -- paulus |
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* |
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* Derived from arch/ppc/mm/init.c: |
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* Copyright (C) 1995-1996 Gary Thomas ([email protected]) |
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* |
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* Modifications by Paul Mackerras (PowerMac) ([email protected]) |
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* and Cort Dougan (PReP) ([email protected]) |
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* Copyright (C) 1996 Paul Mackerras |
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* |
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* Derived from "arch/i386/mm/init.c" |
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds |
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*/ |
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#include <linux/signal.h> |
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#include <linux/sched.h> |
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#include <linux/kernel.h> |
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#include <linux/errno.h> |
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#include <linux/string.h> |
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#include <linux/types.h> |
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#include <linux/ptrace.h> |
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#include <linux/mman.h> |
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#include <linux/mm.h> |
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#include <linux/swap.h> |
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#include <linux/stddef.h> |
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#include <linux/vmalloc.h> |
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#include <linux/init.h> |
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#include <linux/delay.h> |
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#include <linux/highmem.h> |
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#include <linux/memblock.h> |
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#include <asm/prom.h> |
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#include <asm/io.h> |
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#include <asm/mmu_context.h> |
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#include <asm/mmu.h> |
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#include <linux/uaccess.h> |
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#include <asm/smp.h> |
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#include <asm/bootx.h> |
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#include <asm/machdep.h> |
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#include <asm/setup.h> |
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#include <mm/mmu_decl.h> |
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extern int __map_without_ltlbs; |
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/* |
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* MMU_init_hw does the chip-specific initialization of the MMU hardware. |
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*/ |
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void __init MMU_init_hw(void) |
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{ |
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/* |
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* The Zone Protection Register (ZPR) defines how protection will |
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* be applied to every page which is a member of a given zone. At |
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* present, we utilize only two of the 4xx's zones. |
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* The zone index bits (of ZSEL) in the PTE are used for software |
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* indicators, except the LSB. For user access, zone 1 is used, |
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* for kernel access, zone 0 is used. We set all but zone 1 |
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* to zero, allowing only kernel access as indicated in the PTE. |
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* For zone 1, we set a 01 binary (a value of 10 will not work) |
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* to allow user access as indicated in the PTE. This also allows |
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* kernel access as indicated in the PTE. |
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*/ |
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mtspr(SPRN_ZPR, 0x10000000); |
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flush_instruction_cache(); |
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/* |
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* Set up the real-mode cache parameters for the exception vector |
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* handlers (which are run in real-mode). |
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*/ |
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mtspr(SPRN_DCWR, 0x00000000); /* All caching is write-back */ |
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/* |
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* Cache instruction and data space where the exception |
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* vectors and the kernel live in real-mode. |
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*/ |
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mtspr(SPRN_DCCR, 0xFFFF0000); /* 2GByte of data space at 0x0. */ |
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mtspr(SPRN_ICCR, 0xFFFF0000); /* 2GByte of instr. space at 0x0. */ |
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} |
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#define LARGE_PAGE_SIZE_16M (1<<24) |
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#define LARGE_PAGE_SIZE_4M (1<<22) |
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unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top) |
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{ |
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unsigned long v, s, mapped; |
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phys_addr_t p; |
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v = KERNELBASE; |
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p = 0; |
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s = total_lowmem; |
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if (__map_without_ltlbs) |
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return 0; |
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while (s >= LARGE_PAGE_SIZE_16M) { |
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pmd_t *pmdp; |
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unsigned long val = p | _PMD_SIZE_16M | _PAGE_EXEC | _PAGE_RW; |
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pmdp = pmd_off_k(v); |
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*pmdp++ = __pmd(val); |
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*pmdp++ = __pmd(val); |
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*pmdp++ = __pmd(val); |
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*pmdp++ = __pmd(val); |
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v += LARGE_PAGE_SIZE_16M; |
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p += LARGE_PAGE_SIZE_16M; |
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s -= LARGE_PAGE_SIZE_16M; |
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} |
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while (s >= LARGE_PAGE_SIZE_4M) { |
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pmd_t *pmdp; |
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unsigned long val = p | _PMD_SIZE_4M | _PAGE_EXEC | _PAGE_RW; |
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pmdp = pmd_off_k(v); |
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*pmdp = __pmd(val); |
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v += LARGE_PAGE_SIZE_4M; |
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p += LARGE_PAGE_SIZE_4M; |
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s -= LARGE_PAGE_SIZE_4M; |
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} |
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mapped = total_lowmem - s; |
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/* If the size of RAM is not an exact power of two, we may not |
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* have covered RAM in its entirety with 16 and 4 MiB |
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* pages. Consequently, restrict the top end of RAM currently |
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* allocable so that calls to the MEMBLOCK to allocate PTEs for "tail" |
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* coverage with normal-sized pages (or other reasons) do not |
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* attempt to allocate outside the allowed range. |
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*/ |
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memblock_set_current_limit(mapped); |
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return mapped; |
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} |
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void setup_initial_memory_limit(phys_addr_t first_memblock_base, |
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phys_addr_t first_memblock_size) |
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{ |
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/* We don't currently support the first MEMBLOCK not mapping 0 |
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* physical on those processors |
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*/ |
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BUG_ON(first_memblock_base != 0); |
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/* 40x can only access 16MB at the moment (see head_40x.S) */ |
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memblock_set_current_limit(min_t(u64, first_memblock_size, 0x00800000)); |
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}
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