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295 lines
6.2 KiB
295 lines
6.2 KiB
/* |
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* PCI Tower specific code |
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* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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* |
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* Copyright (C) 2006 Thomas Bogendoerfer ([email protected]) |
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*/ |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/pci.h> |
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#include <linux/serial_8250.h> |
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#include <asm/sni.h> |
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#include <asm/time.h> |
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#include <asm/irq_cpu.h> |
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#define PORT(_base,_irq) \ |
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{ \ |
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.iobase = _base, \ |
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.irq = _irq, \ |
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.uartclk = 1843200, \ |
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.iotype = UPIO_PORT, \ |
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.flags = UPF_BOOT_AUTOCONF, \ |
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} |
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static struct plat_serial8250_port pcit_data[] = { |
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PORT(0x3f8, 0), |
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PORT(0x2f8, 3), |
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{ }, |
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}; |
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static struct platform_device pcit_serial8250_device = { |
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.name = "serial8250", |
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.id = PLAT8250_DEV_PLATFORM, |
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.dev = { |
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.platform_data = pcit_data, |
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}, |
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}; |
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static struct plat_serial8250_port pcit_cplus_data[] = { |
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PORT(0x3f8, 0), |
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PORT(0x2f8, 3), |
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PORT(0x3e8, 4), |
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PORT(0x2e8, 3), |
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{ }, |
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}; |
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static struct platform_device pcit_cplus_serial8250_device = { |
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.name = "serial8250", |
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.id = PLAT8250_DEV_PLATFORM, |
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.dev = { |
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.platform_data = pcit_cplus_data, |
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}, |
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}; |
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static struct resource pcit_cmos_rsrc[] = { |
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{ |
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.start = 0x70, |
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.end = 0x71, |
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.flags = IORESOURCE_IO |
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}, |
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{ |
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.start = 8, |
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.end = 8, |
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.flags = IORESOURCE_IRQ |
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} |
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}; |
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static struct platform_device pcit_cmos_device = { |
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.name = "rtc_cmos", |
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.num_resources = ARRAY_SIZE(pcit_cmos_rsrc), |
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.resource = pcit_cmos_rsrc |
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}; |
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static struct platform_device pcit_pcspeaker_pdev = { |
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.name = "pcspkr", |
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.id = -1, |
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}; |
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static struct resource sni_io_resource = { |
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.start = 0x00000000UL, |
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.end = 0x03bfffffUL, |
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.name = "PCIT IO", |
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.flags = IORESOURCE_IO, |
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}; |
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static struct resource pcit_io_resources[] = { |
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{ |
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.start = 0x00, |
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.end = 0x1f, |
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.name = "dma1", |
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.flags = IORESOURCE_BUSY |
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}, { |
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.start = 0x40, |
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.end = 0x5f, |
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.name = "timer", |
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.flags = IORESOURCE_BUSY |
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}, { |
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.start = 0x60, |
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.end = 0x6f, |
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.name = "keyboard", |
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.flags = IORESOURCE_BUSY |
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}, { |
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.start = 0x80, |
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.end = 0x8f, |
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.name = "dma page reg", |
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.flags = IORESOURCE_BUSY |
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}, { |
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.start = 0xc0, |
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.end = 0xdf, |
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.name = "dma2", |
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.flags = IORESOURCE_BUSY |
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}, { |
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.start = 0xcf8, |
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.end = 0xcfb, |
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.name = "PCI config addr", |
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.flags = IORESOURCE_BUSY |
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}, { |
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.start = 0xcfc, |
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.end = 0xcff, |
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.name = "PCI config data", |
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.flags = IORESOURCE_BUSY |
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} |
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}; |
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static void __init sni_pcit_resource_init(void) |
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{ |
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int i; |
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/* request I/O space for devices used on all i[345]86 PCs */ |
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for (i = 0; i < ARRAY_SIZE(pcit_io_resources); i++) |
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request_resource(&sni_io_resource, pcit_io_resources + i); |
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} |
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extern struct pci_ops sni_pcit_ops; |
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#ifdef CONFIG_PCI |
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static struct resource sni_mem_resource = { |
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.start = 0x18000000UL, |
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.end = 0x1fbfffffUL, |
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.name = "PCIT PCI MEM", |
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.flags = IORESOURCE_MEM |
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}; |
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static struct pci_controller sni_pcit_controller = { |
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.pci_ops = &sni_pcit_ops, |
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.mem_resource = &sni_mem_resource, |
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.mem_offset = 0x00000000UL, |
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.io_resource = &sni_io_resource, |
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.io_offset = 0x00000000UL, |
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.io_map_base = SNI_PORT_BASE |
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}; |
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#endif /* CONFIG_PCI */ |
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static void enable_pcit_irq(struct irq_data *d) |
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{ |
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u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24); |
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*(volatile u32 *)SNI_PCIT_INT_REG |= mask; |
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} |
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void disable_pcit_irq(struct irq_data *d) |
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{ |
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u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24); |
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*(volatile u32 *)SNI_PCIT_INT_REG &= ~mask; |
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} |
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static struct irq_chip pcit_irq_type = { |
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.name = "PCIT", |
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.irq_mask = disable_pcit_irq, |
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.irq_unmask = enable_pcit_irq, |
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}; |
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static void pcit_hwint1(void) |
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{ |
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u32 pending = *(volatile u32 *)SNI_PCIT_INT_REG; |
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int irq; |
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clear_c0_status(IE_IRQ1); |
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irq = ffs((pending >> 16) & 0x7f); |
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if (likely(irq > 0)) |
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do_IRQ(irq + SNI_PCIT_INT_START - 1); |
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set_c0_status(IE_IRQ1); |
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} |
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static void pcit_hwint0(void) |
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{ |
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u32 pending = *(volatile u32 *)SNI_PCIT_INT_REG; |
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int irq; |
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clear_c0_status(IE_IRQ0); |
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irq = ffs((pending >> 16) & 0x3f); |
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if (likely(irq > 0)) |
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do_IRQ(irq + SNI_PCIT_INT_START - 1); |
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set_c0_status(IE_IRQ0); |
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} |
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static void sni_pcit_hwint(void) |
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{ |
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u32 pending = read_c0_cause() & read_c0_status(); |
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if (pending & C_IRQ1) |
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pcit_hwint1(); |
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else if (pending & C_IRQ2) |
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do_IRQ(MIPS_CPU_IRQ_BASE + 4); |
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else if (pending & C_IRQ3) |
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do_IRQ(MIPS_CPU_IRQ_BASE + 5); |
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else if (pending & C_IRQ5) |
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do_IRQ(MIPS_CPU_IRQ_BASE + 7); |
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} |
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static void sni_pcit_hwint_cplus(void) |
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{ |
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u32 pending = read_c0_cause() & read_c0_status(); |
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if (pending & C_IRQ0) |
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pcit_hwint0(); |
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else if (pending & C_IRQ1) |
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do_IRQ(MIPS_CPU_IRQ_BASE + 3); |
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else if (pending & C_IRQ2) |
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do_IRQ(MIPS_CPU_IRQ_BASE + 4); |
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else if (pending & C_IRQ3) |
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do_IRQ(MIPS_CPU_IRQ_BASE + 5); |
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else if (pending & C_IRQ5) |
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do_IRQ(MIPS_CPU_IRQ_BASE + 7); |
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} |
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void __init sni_pcit_irq_init(void) |
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{ |
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int i; |
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mips_cpu_irq_init(); |
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for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) |
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irq_set_chip_and_handler(i, &pcit_irq_type, handle_level_irq); |
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*(volatile u32 *)SNI_PCIT_INT_REG = 0; |
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sni_hwint = sni_pcit_hwint; |
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change_c0_status(ST0_IM, IE_IRQ1); |
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if (request_irq(SNI_PCIT_INT_START + 6, sni_isa_irq_handler, 0, "ISA", |
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NULL)) |
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pr_err("Failed to register ISA interrupt\n"); |
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} |
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void __init sni_pcit_cplus_irq_init(void) |
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{ |
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int i; |
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mips_cpu_irq_init(); |
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for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) |
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irq_set_chip_and_handler(i, &pcit_irq_type, handle_level_irq); |
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*(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; |
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sni_hwint = sni_pcit_hwint_cplus; |
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change_c0_status(ST0_IM, IE_IRQ0); |
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if (request_irq(MIPS_CPU_IRQ_BASE + 3, sni_isa_irq_handler, 0, "ISA", |
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NULL)) |
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pr_err("Failed to register ISA interrupt\n"); |
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} |
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void __init sni_pcit_init(void) |
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{ |
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ioport_resource.end = sni_io_resource.end; |
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#ifdef CONFIG_PCI |
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PCIBIOS_MIN_IO = 0x9000; |
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register_pci_controller(&sni_pcit_controller); |
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#endif |
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sni_pcit_resource_init(); |
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} |
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static int __init snirm_pcit_setup_devinit(void) |
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{ |
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switch (sni_brd_type) { |
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case SNI_BRD_PCI_TOWER: |
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platform_device_register(&pcit_serial8250_device); |
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platform_device_register(&pcit_cmos_device); |
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platform_device_register(&pcit_pcspeaker_pdev); |
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break; |
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case SNI_BRD_PCI_TOWER_CPLUS: |
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platform_device_register(&pcit_cplus_serial8250_device); |
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platform_device_register(&pcit_cmos_device); |
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platform_device_register(&pcit_pcspeaker_pdev); |
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break; |
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} |
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return 0; |
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} |
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device_initcall(snirm_pcit_setup_devinit);
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