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206 lines
5.2 KiB
206 lines
5.2 KiB
/* |
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* BRIEF MODULE DESCRIPTION |
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* pci_ops for IDT EB434 board |
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* |
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* Copyright 2004 IDT Inc. ([email protected]) |
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* Copyright 2006 Felix Fietkau <[email protected]> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation; either version 2 of the License, or (at your |
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* option) any later version. |
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* |
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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* You should have received a copy of the GNU General Public License along |
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* with this program; if not, write to the Free Software Foundation, Inc., |
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* 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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#include <linux/delay.h> |
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#include <linux/io.h> |
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#include <linux/pci.h> |
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#include <linux/types.h> |
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#include <asm/cpu.h> |
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#include <asm/mach-rc32434/rc32434.h> |
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#include <asm/mach-rc32434/pci.h> |
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#define PCI_ACCESS_READ 0 |
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#define PCI_ACCESS_WRITE 1 |
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#define PCI_CFG_SET(bus, slot, func, off) \ |
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(rc32434_pci->pcicfga = (0x80000000 | \ |
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((bus) << 16) | ((slot)<<11) | \ |
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((func)<<8) | (off))) |
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static inline int config_access(unsigned char access_type, |
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struct pci_bus *bus, unsigned int devfn, |
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unsigned char where, u32 *data) |
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{ |
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unsigned int slot = PCI_SLOT(devfn); |
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u8 func = PCI_FUNC(devfn); |
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/* Setup address */ |
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PCI_CFG_SET(bus->number, slot, func, where); |
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rc32434_sync(); |
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if (access_type == PCI_ACCESS_WRITE) |
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rc32434_pci->pcicfgd = *data; |
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else |
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*data = rc32434_pci->pcicfgd; |
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rc32434_sync(); |
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return 0; |
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} |
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/* |
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* We can't address 8 and 16 bit words directly. Instead we have to |
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* read/write a 32bit word and mask/modify the data we actually want. |
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*/ |
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static int read_config_byte(struct pci_bus *bus, unsigned int devfn, |
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int where, u8 *val) |
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{ |
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u32 data; |
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int ret; |
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ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); |
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*val = (data >> ((where & 3) << 3)) & 0xff; |
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return ret; |
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} |
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static int read_config_word(struct pci_bus *bus, unsigned int devfn, |
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int where, u16 *val) |
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{ |
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u32 data; |
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int ret; |
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ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); |
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*val = (data >> ((where & 3) << 3)) & 0xffff; |
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return ret; |
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} |
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static int read_config_dword(struct pci_bus *bus, unsigned int devfn, |
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int where, u32 *val) |
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{ |
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int ret; |
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int delay = 1; |
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/* |
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* Don't scan too far, else there will be errors with plugged in |
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* daughterboard (rb564). |
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*/ |
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if (bus->number == 0 && PCI_SLOT(devfn) > 21) |
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return 0; |
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retry: |
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ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val); |
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/* |
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* Certain devices react delayed at device scan time, this |
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* gives them time to settle |
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*/ |
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if (where == PCI_VENDOR_ID) { |
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if (ret == 0xffffffff || ret == 0x00000000 || |
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ret == 0x0000ffff || ret == 0xffff0000) { |
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if (delay > 4) |
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return 0; |
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delay *= 2; |
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msleep(delay); |
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goto retry; |
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} |
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} |
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return ret; |
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} |
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static int |
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write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, |
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u8 val) |
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{ |
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u32 data = 0; |
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if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) |
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return -1; |
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data = (data & ~(0xff << ((where & 3) << 3))) | |
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(val << ((where & 3) << 3)); |
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if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) |
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return -1; |
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return PCIBIOS_SUCCESSFUL; |
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} |
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static int |
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write_config_word(struct pci_bus *bus, unsigned int devfn, int where, |
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u16 val) |
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{ |
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u32 data = 0; |
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if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) |
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return -1; |
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data = (data & ~(0xffff << ((where & 3) << 3))) | |
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(val << ((where & 3) << 3)); |
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if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) |
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return -1; |
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return PCIBIOS_SUCCESSFUL; |
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} |
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static int |
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write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, |
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u32 val) |
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{ |
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if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val)) |
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return -1; |
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return PCIBIOS_SUCCESSFUL; |
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} |
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static int pci_config_read(struct pci_bus *bus, unsigned int devfn, |
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int where, int size, u32 *val) |
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{ |
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switch (size) { |
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case 1: |
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return read_config_byte(bus, devfn, where, (u8 *) val); |
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case 2: |
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return read_config_word(bus, devfn, where, (u16 *) val); |
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default: |
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return read_config_dword(bus, devfn, where, val); |
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} |
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} |
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static int pci_config_write(struct pci_bus *bus, unsigned int devfn, |
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int where, int size, u32 val) |
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{ |
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switch (size) { |
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case 1: |
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return write_config_byte(bus, devfn, where, (u8) val); |
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case 2: |
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return write_config_word(bus, devfn, where, (u16) val); |
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default: |
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return write_config_dword(bus, devfn, where, val); |
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} |
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} |
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struct pci_ops rc32434_pci_ops = { |
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.read = pci_config_read, |
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.write = pci_config_write, |
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};
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