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196 lines
4.2 KiB
196 lines
4.2 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* IEEE754 floating point arithmetic |
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* single precision |
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*/ |
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/* |
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* MIPS floating point support |
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* Copyright (C) 1994-2000 Algorithmics Ltd. |
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*/ |
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#include <linux/compiler.h> |
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#include "ieee754sp.h" |
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int ieee754sp_class(union ieee754sp x) |
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{ |
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COMPXSP; |
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EXPLODEXSP; |
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return xc; |
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} |
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static inline int ieee754sp_isnan(union ieee754sp x) |
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{ |
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return ieee754_class_nan(ieee754sp_class(x)); |
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} |
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static inline int ieee754sp_issnan(union ieee754sp x) |
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{ |
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int qbit; |
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assert(ieee754sp_isnan(x)); |
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qbit = (SPMANT(x) & SP_MBIT(SP_FBITS - 1)) == SP_MBIT(SP_FBITS - 1); |
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return ieee754_csr.nan2008 ^ qbit; |
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} |
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/* |
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* Raise the Invalid Operation IEEE 754 exception |
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* and convert the signaling NaN supplied to a quiet NaN. |
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*/ |
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union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r) |
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{ |
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assert(ieee754sp_issnan(r)); |
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ieee754_setcx(IEEE754_INVALID_OPERATION); |
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if (ieee754_csr.nan2008) { |
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SPMANT(r) |= SP_MBIT(SP_FBITS - 1); |
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} else { |
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SPMANT(r) &= ~SP_MBIT(SP_FBITS - 1); |
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if (!ieee754sp_isnan(r)) |
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SPMANT(r) |= SP_MBIT(SP_FBITS - 2); |
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} |
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return r; |
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} |
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static unsigned int ieee754sp_get_rounding(int sn, unsigned int xm) |
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{ |
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/* inexact must round of 3 bits |
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*/ |
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if (xm & (SP_MBIT(3) - 1)) { |
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switch (ieee754_csr.rm) { |
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case FPU_CSR_RZ: |
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break; |
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case FPU_CSR_RN: |
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xm += 0x3 + ((xm >> 3) & 1); |
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/* xm += (xm&0x8)?0x4:0x3 */ |
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break; |
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case FPU_CSR_RU: /* toward +Infinity */ |
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if (!sn) /* ?? */ |
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xm += 0x8; |
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break; |
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case FPU_CSR_RD: /* toward -Infinity */ |
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if (sn) /* ?? */ |
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xm += 0x8; |
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break; |
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} |
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} |
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return xm; |
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} |
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/* generate a normal/denormal number with over,under handling |
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* sn is sign |
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* xe is an unbiased exponent |
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* xm is 3bit extended precision value. |
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*/ |
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union ieee754sp ieee754sp_format(int sn, int xe, unsigned int xm) |
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{ |
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assert(xm); /* we don't gen exact zeros (probably should) */ |
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assert((xm >> (SP_FBITS + 1 + 3)) == 0); /* no excess */ |
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assert(xm & (SP_HIDDEN_BIT << 3)); |
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if (xe < SP_EMIN) { |
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/* strip lower bits */ |
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int es = SP_EMIN - xe; |
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if (ieee754_csr.nod) { |
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ieee754_setcx(IEEE754_UNDERFLOW); |
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ieee754_setcx(IEEE754_INEXACT); |
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switch(ieee754_csr.rm) { |
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case FPU_CSR_RN: |
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case FPU_CSR_RZ: |
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return ieee754sp_zero(sn); |
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case FPU_CSR_RU: /* toward +Infinity */ |
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if (sn == 0) |
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return ieee754sp_min(0); |
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else |
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return ieee754sp_zero(1); |
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case FPU_CSR_RD: /* toward -Infinity */ |
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if (sn == 0) |
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return ieee754sp_zero(0); |
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else |
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return ieee754sp_min(1); |
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} |
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} |
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if (xe == SP_EMIN - 1 && |
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ieee754sp_get_rounding(sn, xm) >> (SP_FBITS + 1 + 3)) |
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{ |
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/* Not tiny after rounding */ |
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ieee754_setcx(IEEE754_INEXACT); |
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xm = ieee754sp_get_rounding(sn, xm); |
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xm >>= 1; |
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/* Clear grs bits */ |
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xm &= ~(SP_MBIT(3) - 1); |
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xe++; |
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} else { |
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/* sticky right shift es bits |
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*/ |
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xm = XSPSRS(xm, es); |
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xe += es; |
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assert((xm & (SP_HIDDEN_BIT << 3)) == 0); |
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assert(xe == SP_EMIN); |
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} |
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} |
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if (xm & (SP_MBIT(3) - 1)) { |
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ieee754_setcx(IEEE754_INEXACT); |
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if ((xm & (SP_HIDDEN_BIT << 3)) == 0) { |
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ieee754_setcx(IEEE754_UNDERFLOW); |
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} |
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/* inexact must round of 3 bits |
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*/ |
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xm = ieee754sp_get_rounding(sn, xm); |
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/* adjust exponent for rounding add overflowing |
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*/ |
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if (xm >> (SP_FBITS + 1 + 3)) { |
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/* add causes mantissa overflow */ |
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xm >>= 1; |
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xe++; |
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} |
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} |
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/* strip grs bits */ |
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xm >>= 3; |
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assert((xm >> (SP_FBITS + 1)) == 0); /* no excess */ |
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assert(xe >= SP_EMIN); |
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if (xe > SP_EMAX) { |
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ieee754_setcx(IEEE754_OVERFLOW); |
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ieee754_setcx(IEEE754_INEXACT); |
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/* -O can be table indexed by (rm,sn) */ |
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switch (ieee754_csr.rm) { |
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case FPU_CSR_RN: |
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return ieee754sp_inf(sn); |
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case FPU_CSR_RZ: |
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return ieee754sp_max(sn); |
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case FPU_CSR_RU: /* toward +Infinity */ |
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if (sn == 0) |
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return ieee754sp_inf(0); |
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else |
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return ieee754sp_max(1); |
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case FPU_CSR_RD: /* toward -Infinity */ |
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if (sn == 0) |
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return ieee754sp_max(0); |
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else |
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return ieee754sp_inf(1); |
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} |
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} |
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/* gen norm/denorm/zero */ |
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if ((xm & SP_HIDDEN_BIT) == 0) { |
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/* we underflow (tiny/zero) */ |
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assert(xe == SP_EMIN); |
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if (ieee754_csr.mx & IEEE754_UNDERFLOW) |
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ieee754_setcx(IEEE754_UNDERFLOW); |
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return buildsp(sn, SP_EMIN - 1 + SP_EBIAS, xm); |
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} else { |
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assert((xm >> (SP_FBITS + 1)) == 0); /* no excess */ |
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assert(xm & SP_HIDDEN_BIT); |
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return buildsp(sn, xe + SP_EBIAS, xm & ~SP_HIDDEN_BIT); |
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} |
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}
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