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883 lines
22 KiB
883 lines
22 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* linux/arch/arm/vfp/vfpmodule.c |
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* |
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* Copyright (C) 2004 ARM Limited. |
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* Written by Deep Blue Solutions Limited. |
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*/ |
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#include <linux/types.h> |
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#include <linux/cpu.h> |
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#include <linux/cpu_pm.h> |
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#include <linux/hardirq.h> |
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#include <linux/kernel.h> |
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#include <linux/notifier.h> |
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#include <linux/signal.h> |
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#include <linux/sched/signal.h> |
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#include <linux/smp.h> |
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#include <linux/init.h> |
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#include <linux/uaccess.h> |
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#include <linux/user.h> |
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#include <linux/export.h> |
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#include <asm/cp15.h> |
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#include <asm/cputype.h> |
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#include <asm/system_info.h> |
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#include <asm/thread_notify.h> |
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#include <asm/traps.h> |
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#include <asm/vfp.h> |
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#include "vfpinstr.h" |
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#include "vfp.h" |
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/* |
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* Our undef handlers (in entry.S) |
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*/ |
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asmlinkage void vfp_support_entry(void); |
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asmlinkage void vfp_null_entry(void); |
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asmlinkage void (*vfp_vector)(void) = vfp_null_entry; |
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/* |
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* Dual-use variable. |
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* Used in startup: set to non-zero if VFP checks fail |
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* After startup, holds VFP architecture |
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*/ |
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static unsigned int __initdata VFP_arch; |
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|
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/* |
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* The pointer to the vfpstate structure of the thread which currently |
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* owns the context held in the VFP hardware, or NULL if the hardware |
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* context is invalid. |
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* |
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* For UP, this is sufficient to tell which thread owns the VFP context. |
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* However, for SMP, we also need to check the CPU number stored in the |
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* saved state too to catch migrations. |
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*/ |
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union vfp_state *vfp_current_hw_state[NR_CPUS]; |
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/* |
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* Is 'thread's most up to date state stored in this CPUs hardware? |
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* Must be called from non-preemptible context. |
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*/ |
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static bool vfp_state_in_hw(unsigned int cpu, struct thread_info *thread) |
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{ |
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#ifdef CONFIG_SMP |
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if (thread->vfpstate.hard.cpu != cpu) |
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return false; |
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#endif |
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return vfp_current_hw_state[cpu] == &thread->vfpstate; |
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} |
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/* |
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* Force a reload of the VFP context from the thread structure. We do |
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* this by ensuring that access to the VFP hardware is disabled, and |
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* clear vfp_current_hw_state. Must be called from non-preemptible context. |
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*/ |
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static void vfp_force_reload(unsigned int cpu, struct thread_info *thread) |
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{ |
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if (vfp_state_in_hw(cpu, thread)) { |
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fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); |
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vfp_current_hw_state[cpu] = NULL; |
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} |
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#ifdef CONFIG_SMP |
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thread->vfpstate.hard.cpu = NR_CPUS; |
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#endif |
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} |
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/* |
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* Per-thread VFP initialization. |
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*/ |
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static void vfp_thread_flush(struct thread_info *thread) |
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{ |
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union vfp_state *vfp = &thread->vfpstate; |
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unsigned int cpu; |
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/* |
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* Disable VFP to ensure we initialize it first. We must ensure |
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* that the modification of vfp_current_hw_state[] and hardware |
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* disable are done for the same CPU and without preemption. |
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* |
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* Do this first to ensure that preemption won't overwrite our |
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* state saving should access to the VFP be enabled at this point. |
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*/ |
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cpu = get_cpu(); |
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if (vfp_current_hw_state[cpu] == vfp) |
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vfp_current_hw_state[cpu] = NULL; |
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fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); |
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put_cpu(); |
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memset(vfp, 0, sizeof(union vfp_state)); |
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vfp->hard.fpexc = FPEXC_EN; |
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vfp->hard.fpscr = FPSCR_ROUND_NEAREST; |
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#ifdef CONFIG_SMP |
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vfp->hard.cpu = NR_CPUS; |
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#endif |
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} |
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static void vfp_thread_exit(struct thread_info *thread) |
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{ |
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/* release case: Per-thread VFP cleanup. */ |
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union vfp_state *vfp = &thread->vfpstate; |
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unsigned int cpu = get_cpu(); |
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if (vfp_current_hw_state[cpu] == vfp) |
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vfp_current_hw_state[cpu] = NULL; |
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put_cpu(); |
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} |
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static void vfp_thread_copy(struct thread_info *thread) |
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{ |
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struct thread_info *parent = current_thread_info(); |
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vfp_sync_hwstate(parent); |
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thread->vfpstate = parent->vfpstate; |
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#ifdef CONFIG_SMP |
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thread->vfpstate.hard.cpu = NR_CPUS; |
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#endif |
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} |
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/* |
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* When this function is called with the following 'cmd's, the following |
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* is true while this function is being run: |
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* THREAD_NOFTIFY_SWTICH: |
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* - the previously running thread will not be scheduled onto another CPU. |
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* - the next thread to be run (v) will not be running on another CPU. |
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* - thread->cpu is the local CPU number |
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* - not preemptible as we're called in the middle of a thread switch |
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* THREAD_NOTIFY_FLUSH: |
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* - the thread (v) will be running on the local CPU, so |
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* v === current_thread_info() |
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* - thread->cpu is the local CPU number at the time it is accessed, |
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* but may change at any time. |
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* - we could be preempted if tree preempt rcu is enabled, so |
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* it is unsafe to use thread->cpu. |
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* THREAD_NOTIFY_EXIT |
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* - we could be preempted if tree preempt rcu is enabled, so |
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* it is unsafe to use thread->cpu. |
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*/ |
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static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) |
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{ |
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struct thread_info *thread = v; |
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u32 fpexc; |
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#ifdef CONFIG_SMP |
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unsigned int cpu; |
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#endif |
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switch (cmd) { |
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case THREAD_NOTIFY_SWITCH: |
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fpexc = fmrx(FPEXC); |
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#ifdef CONFIG_SMP |
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cpu = thread->cpu; |
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/* |
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* On SMP, if VFP is enabled, save the old state in |
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* case the thread migrates to a different CPU. The |
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* restoring is done lazily. |
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*/ |
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if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu]) { |
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/* vfp_save_state oopses on VFP11 if EX bit set */ |
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fmxr(FPEXC, fpexc & ~FPEXC_EX); |
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vfp_save_state(vfp_current_hw_state[cpu], fpexc); |
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} |
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#endif |
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/* |
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* Always disable VFP so we can lazily save/restore the |
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* old state. |
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*/ |
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fmxr(FPEXC, fpexc & ~FPEXC_EN); |
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break; |
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case THREAD_NOTIFY_FLUSH: |
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vfp_thread_flush(thread); |
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break; |
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case THREAD_NOTIFY_EXIT: |
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vfp_thread_exit(thread); |
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break; |
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case THREAD_NOTIFY_COPY: |
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vfp_thread_copy(thread); |
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break; |
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} |
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return NOTIFY_DONE; |
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} |
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static struct notifier_block vfp_notifier_block = { |
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.notifier_call = vfp_notifier, |
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}; |
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/* |
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* Raise a SIGFPE for the current process. |
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* sicode describes the signal being raised. |
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*/ |
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static void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs) |
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{ |
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/* |
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* This is the same as NWFPE, because it's not clear what |
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* this is used for |
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*/ |
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current->thread.error_code = 0; |
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current->thread.trap_no = 6; |
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send_sig_fault(SIGFPE, sicode, |
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(void __user *)(instruction_pointer(regs) - 4), |
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current); |
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} |
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static void vfp_panic(char *reason, u32 inst) |
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{ |
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int i; |
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pr_err("VFP: Error: %s\n", reason); |
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pr_err("VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n", |
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fmrx(FPEXC), fmrx(FPSCR), inst); |
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for (i = 0; i < 32; i += 2) |
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pr_err("VFP: s%2u: 0x%08x s%2u: 0x%08x\n", |
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i, vfp_get_float(i), i+1, vfp_get_float(i+1)); |
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} |
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/* |
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* Process bitmask of exception conditions. |
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*/ |
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static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs) |
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{ |
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int si_code = 0; |
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pr_debug("VFP: raising exceptions %08x\n", exceptions); |
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if (exceptions == VFP_EXCEPTION_ERROR) { |
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vfp_panic("unhandled bounce", inst); |
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vfp_raise_sigfpe(FPE_FLTINV, regs); |
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return; |
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} |
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/* |
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* If any of the status flags are set, update the FPSCR. |
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* Comparison instructions always return at least one of |
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* these flags set. |
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*/ |
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if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V)) |
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fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V); |
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fpscr |= exceptions; |
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fmxr(FPSCR, fpscr); |
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#define RAISE(stat,en,sig) \ |
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if (exceptions & stat && fpscr & en) \ |
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si_code = sig; |
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/* |
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* These are arranged in priority order, least to highest. |
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*/ |
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RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV); |
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RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES); |
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RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND); |
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RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF); |
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RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV); |
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if (si_code) |
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vfp_raise_sigfpe(si_code, regs); |
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} |
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/* |
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* Emulate a VFP instruction. |
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*/ |
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static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) |
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{ |
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u32 exceptions = VFP_EXCEPTION_ERROR; |
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pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); |
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if (INST_CPRTDO(inst)) { |
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if (!INST_CPRT(inst)) { |
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/* |
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* CPDO |
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*/ |
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if (vfp_single(inst)) { |
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exceptions = vfp_single_cpdo(inst, fpscr); |
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} else { |
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exceptions = vfp_double_cpdo(inst, fpscr); |
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} |
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} else { |
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/* |
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* A CPRT instruction can not appear in FPINST2, nor |
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* can it cause an exception. Therefore, we do not |
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* have to emulate it. |
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*/ |
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} |
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} else { |
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/* |
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* A CPDT instruction can not appear in FPINST2, nor can |
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* it cause an exception. Therefore, we do not have to |
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* emulate it. |
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*/ |
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} |
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return exceptions & ~VFP_NAN_FLAG; |
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} |
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/* |
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* Package up a bounce condition. |
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*/ |
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void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) |
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{ |
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u32 fpscr, orig_fpscr, fpsid, exceptions; |
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pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc); |
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/* |
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* At this point, FPEXC can have the following configuration: |
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* |
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* EX DEX IXE |
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* 0 1 x - synchronous exception |
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* 1 x 0 - asynchronous exception |
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* 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later |
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* 0 0 1 - synchronous on VFP9 (non-standard subarch 1 |
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* implementation), undefined otherwise |
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* |
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* Clear various bits and enable access to the VFP so we can |
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* handle the bounce. |
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*/ |
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fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK)); |
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fpsid = fmrx(FPSID); |
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orig_fpscr = fpscr = fmrx(FPSCR); |
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/* |
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* Check for the special VFP subarch 1 and FPSCR.IXE bit case |
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*/ |
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if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT) |
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&& (fpscr & FPSCR_IXE)) { |
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/* |
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* Synchronous exception, emulate the trigger instruction |
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*/ |
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goto emulate; |
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} |
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if (fpexc & FPEXC_EX) { |
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#ifndef CONFIG_CPU_FEROCEON |
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/* |
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* Asynchronous exception. The instruction is read from FPINST |
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* and the interrupted instruction has to be restarted. |
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*/ |
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trigger = fmrx(FPINST); |
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regs->ARM_pc -= 4; |
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#endif |
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} else if (!(fpexc & FPEXC_DEX)) { |
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/* |
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* Illegal combination of bits. It can be caused by an |
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* unallocated VFP instruction but with FPSCR.IXE set and not |
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* on VFP subarch 1. |
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*/ |
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vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs); |
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goto exit; |
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} |
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/* |
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* Modify fpscr to indicate the number of iterations remaining. |
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* If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates |
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* whether FPEXC.VECITR or FPSCR.LEN is used. |
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*/ |
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if (fpexc & (FPEXC_EX | FPEXC_VV)) { |
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u32 len; |
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len = fpexc + (1 << FPEXC_LENGTH_BIT); |
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fpscr &= ~FPSCR_LENGTH_MASK; |
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fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT); |
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} |
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/* |
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* Handle the first FP instruction. We used to take note of the |
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* FPEXC bounce reason, but this appears to be unreliable. |
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* Emulate the bounced instruction instead. |
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*/ |
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exceptions = vfp_emulate_instruction(trigger, fpscr, regs); |
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if (exceptions) |
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vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); |
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/* |
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* If there isn't a second FP instruction, exit now. Note that |
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* the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. |
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*/ |
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if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V)) |
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goto exit; |
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/* |
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* The barrier() here prevents fpinst2 being read |
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* before the condition above. |
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*/ |
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barrier(); |
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trigger = fmrx(FPINST2); |
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emulate: |
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exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs); |
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if (exceptions) |
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vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); |
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exit: |
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preempt_enable(); |
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} |
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static void vfp_enable(void *unused) |
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{ |
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u32 access; |
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BUG_ON(preemptible()); |
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access = get_copro_access(); |
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/* |
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* Enable full access to VFP (cp10 and cp11) |
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*/ |
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set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11)); |
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} |
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/* Called by platforms on which we want to disable VFP because it may not be |
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* present on all CPUs within a SMP complex. Needs to be called prior to |
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* vfp_init(). |
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*/ |
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void __init vfp_disable(void) |
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{ |
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if (VFP_arch) { |
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pr_debug("%s: should be called prior to vfp_init\n", __func__); |
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return; |
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} |
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VFP_arch = 1; |
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} |
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#ifdef CONFIG_CPU_PM |
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static int vfp_pm_suspend(void) |
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{ |
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struct thread_info *ti = current_thread_info(); |
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u32 fpexc = fmrx(FPEXC); |
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/* if vfp is on, then save state for resumption */ |
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if (fpexc & FPEXC_EN) { |
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pr_debug("%s: saving vfp state\n", __func__); |
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/* vfp_save_state oopses on VFP11 if EX bit set */ |
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fmxr(FPEXC, fpexc & ~FPEXC_EX); |
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vfp_save_state(&ti->vfpstate, fpexc); |
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/* disable, just in case */ |
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fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); |
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} else if (vfp_current_hw_state[ti->cpu]) { |
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#ifndef CONFIG_SMP |
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/* vfp_save_state oopses on VFP11 if EX bit set */ |
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fmxr(FPEXC, (fpexc & ~FPEXC_EX) | FPEXC_EN); |
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vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc); |
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fmxr(FPEXC, fpexc); |
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#endif |
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} |
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/* clear any information we had about last context state */ |
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vfp_current_hw_state[ti->cpu] = NULL; |
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return 0; |
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} |
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static void vfp_pm_resume(void) |
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{ |
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/* ensure we have access to the vfp */ |
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vfp_enable(NULL); |
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|
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/* and disable it to ensure the next usage restores the state */ |
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fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); |
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} |
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static int vfp_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd, |
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void *v) |
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{ |
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switch (cmd) { |
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case CPU_PM_ENTER: |
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vfp_pm_suspend(); |
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break; |
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case CPU_PM_ENTER_FAILED: |
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case CPU_PM_EXIT: |
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vfp_pm_resume(); |
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break; |
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} |
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return NOTIFY_OK; |
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} |
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static struct notifier_block vfp_cpu_pm_notifier_block = { |
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.notifier_call = vfp_cpu_pm_notifier, |
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}; |
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static void vfp_pm_init(void) |
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{ |
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cpu_pm_register_notifier(&vfp_cpu_pm_notifier_block); |
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} |
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#else |
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static inline void vfp_pm_init(void) { } |
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#endif /* CONFIG_CPU_PM */ |
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/* |
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* Ensure that the VFP state stored in 'thread->vfpstate' is up to date |
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* with the hardware state. |
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*/ |
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void vfp_sync_hwstate(struct thread_info *thread) |
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{ |
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unsigned int cpu = get_cpu(); |
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if (vfp_state_in_hw(cpu, thread)) { |
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u32 fpexc = fmrx(FPEXC); |
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/* |
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* Save the last VFP state on this CPU. |
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*/ |
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/* vfp_save_state oopses on VFP11 if EX bit set */ |
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fmxr(FPEXC, (fpexc & ~FPEXC_EX) | FPEXC_EN); |
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vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN); |
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fmxr(FPEXC, fpexc); |
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} |
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put_cpu(); |
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} |
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/* Ensure that the thread reloads the hardware VFP state on the next use. */ |
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void vfp_flush_hwstate(struct thread_info *thread) |
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{ |
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unsigned int cpu = get_cpu(); |
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vfp_force_reload(cpu, thread); |
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|
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put_cpu(); |
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} |
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|
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/* |
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* Save the current VFP state into the provided structures and prepare |
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* for entry into a new function (signal handler). |
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*/ |
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int vfp_preserve_user_clear_hwstate(struct user_vfp *ufp, |
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struct user_vfp_exc *ufp_exc) |
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{ |
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struct thread_info *thread = current_thread_info(); |
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struct vfp_hard_struct *hwstate = &thread->vfpstate.hard; |
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|
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/* Ensure that the saved hwstate is up-to-date. */ |
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vfp_sync_hwstate(thread); |
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|
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/* |
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* Copy the floating point registers. There can be unused |
|
* registers see asm/hwcap.h for details. |
|
*/ |
|
memcpy(&ufp->fpregs, &hwstate->fpregs, sizeof(hwstate->fpregs)); |
|
|
|
/* |
|
* Copy the status and control register. |
|
*/ |
|
ufp->fpscr = hwstate->fpscr; |
|
|
|
/* |
|
* Copy the exception registers. |
|
*/ |
|
ufp_exc->fpexc = hwstate->fpexc; |
|
ufp_exc->fpinst = hwstate->fpinst; |
|
ufp_exc->fpinst2 = hwstate->fpinst2; |
|
|
|
/* Ensure that VFP is disabled. */ |
|
vfp_flush_hwstate(thread); |
|
|
|
/* |
|
* As per the PCS, clear the length and stride bits for function |
|
* entry. |
|
*/ |
|
hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK); |
|
return 0; |
|
} |
|
|
|
/* Sanitise and restore the current VFP state from the provided structures. */ |
|
int vfp_restore_user_hwstate(struct user_vfp *ufp, struct user_vfp_exc *ufp_exc) |
|
{ |
|
struct thread_info *thread = current_thread_info(); |
|
struct vfp_hard_struct *hwstate = &thread->vfpstate.hard; |
|
unsigned long fpexc; |
|
u32 fpsid = fmrx(FPSID); |
|
|
|
/* Disable VFP to avoid corrupting the new thread state. */ |
|
vfp_flush_hwstate(thread); |
|
|
|
/* |
|
* Copy the floating point registers. There can be unused |
|
* registers see asm/hwcap.h for details. |
|
*/ |
|
memcpy(&hwstate->fpregs, &ufp->fpregs, sizeof(hwstate->fpregs)); |
|
/* |
|
* Copy the status and control register. |
|
*/ |
|
hwstate->fpscr = ufp->fpscr; |
|
|
|
/* |
|
* Sanitise and restore the exception registers. |
|
*/ |
|
fpexc = ufp_exc->fpexc; |
|
|
|
/* Ensure the VFP is enabled. */ |
|
fpexc |= FPEXC_EN; |
|
|
|
/* Mask FPXEC_EX and FPEXC_FP2V if not required by VFP arch */ |
|
if ((fpsid & FPSID_ARCH_MASK) != (1 << FPSID_ARCH_BIT)) { |
|
/* Ensure FPINST2 is invalid and the exception flag is cleared. */ |
|
fpexc &= ~(FPEXC_EX | FPEXC_FP2V); |
|
} |
|
|
|
hwstate->fpexc = fpexc; |
|
|
|
hwstate->fpinst = ufp_exc->fpinst; |
|
hwstate->fpinst2 = ufp_exc->fpinst2; |
|
|
|
return 0; |
|
} |
|
|
|
/* |
|
* VFP hardware can lose all context when a CPU goes offline. |
|
* As we will be running in SMP mode with CPU hotplug, we will save the |
|
* hardware state at every thread switch. We clear our held state when |
|
* a CPU has been killed, indicating that the VFP hardware doesn't contain |
|
* a threads VFP state. When a CPU starts up, we re-enable access to the |
|
* VFP hardware. The callbacks below are called on the CPU which |
|
* is being offlined/onlined. |
|
*/ |
|
static int vfp_dying_cpu(unsigned int cpu) |
|
{ |
|
vfp_current_hw_state[cpu] = NULL; |
|
return 0; |
|
} |
|
|
|
static int vfp_starting_cpu(unsigned int unused) |
|
{ |
|
vfp_enable(NULL); |
|
return 0; |
|
} |
|
|
|
#ifdef CONFIG_KERNEL_MODE_NEON |
|
|
|
static int vfp_kmode_exception(struct pt_regs *regs, unsigned int instr) |
|
{ |
|
/* |
|
* If we reach this point, a floating point exception has been raised |
|
* while running in kernel mode. If the NEON/VFP unit was enabled at the |
|
* time, it means a VFP instruction has been issued that requires |
|
* software assistance to complete, something which is not currently |
|
* supported in kernel mode. |
|
* If the NEON/VFP unit was disabled, and the location pointed to below |
|
* is properly preceded by a call to kernel_neon_begin(), something has |
|
* caused the task to be scheduled out and back in again. In this case, |
|
* rebuilding and running with CONFIG_DEBUG_ATOMIC_SLEEP enabled should |
|
* be helpful in localizing the problem. |
|
*/ |
|
if (fmrx(FPEXC) & FPEXC_EN) |
|
pr_crit("BUG: unsupported FP instruction in kernel mode\n"); |
|
else |
|
pr_crit("BUG: FP instruction issued in kernel mode with FP unit disabled\n"); |
|
pr_crit("FPEXC == 0x%08x\n", fmrx(FPEXC)); |
|
return 1; |
|
} |
|
|
|
static struct undef_hook vfp_kmode_exception_hook[] = {{ |
|
.instr_mask = 0xfe000000, |
|
.instr_val = 0xf2000000, |
|
.cpsr_mask = MODE_MASK | PSR_T_BIT, |
|
.cpsr_val = SVC_MODE, |
|
.fn = vfp_kmode_exception, |
|
}, { |
|
.instr_mask = 0xff100000, |
|
.instr_val = 0xf4000000, |
|
.cpsr_mask = MODE_MASK | PSR_T_BIT, |
|
.cpsr_val = SVC_MODE, |
|
.fn = vfp_kmode_exception, |
|
}, { |
|
.instr_mask = 0xef000000, |
|
.instr_val = 0xef000000, |
|
.cpsr_mask = MODE_MASK | PSR_T_BIT, |
|
.cpsr_val = SVC_MODE | PSR_T_BIT, |
|
.fn = vfp_kmode_exception, |
|
}, { |
|
.instr_mask = 0xff100000, |
|
.instr_val = 0xf9000000, |
|
.cpsr_mask = MODE_MASK | PSR_T_BIT, |
|
.cpsr_val = SVC_MODE | PSR_T_BIT, |
|
.fn = vfp_kmode_exception, |
|
}, { |
|
.instr_mask = 0x0c000e00, |
|
.instr_val = 0x0c000a00, |
|
.cpsr_mask = MODE_MASK, |
|
.cpsr_val = SVC_MODE, |
|
.fn = vfp_kmode_exception, |
|
}}; |
|
|
|
static int __init vfp_kmode_exception_hook_init(void) |
|
{ |
|
int i; |
|
|
|
for (i = 0; i < ARRAY_SIZE(vfp_kmode_exception_hook); i++) |
|
register_undef_hook(&vfp_kmode_exception_hook[i]); |
|
return 0; |
|
} |
|
subsys_initcall(vfp_kmode_exception_hook_init); |
|
|
|
/* |
|
* Kernel-side NEON support functions |
|
*/ |
|
void kernel_neon_begin(void) |
|
{ |
|
struct thread_info *thread = current_thread_info(); |
|
unsigned int cpu; |
|
u32 fpexc; |
|
|
|
/* |
|
* Kernel mode NEON is only allowed outside of interrupt context |
|
* with preemption disabled. This will make sure that the kernel |
|
* mode NEON register contents never need to be preserved. |
|
*/ |
|
BUG_ON(in_interrupt()); |
|
cpu = get_cpu(); |
|
|
|
fpexc = fmrx(FPEXC) | FPEXC_EN; |
|
/* vfp_save_state oopses on VFP11 if EX bit set */ |
|
fmxr(FPEXC, fpexc & ~FPEXC_EX); |
|
|
|
/* |
|
* Save the userland NEON/VFP state. Under UP, |
|
* the owner could be a task other than 'current' |
|
*/ |
|
if (vfp_state_in_hw(cpu, thread)) |
|
vfp_save_state(&thread->vfpstate, fpexc); |
|
#ifndef CONFIG_SMP |
|
else if (vfp_current_hw_state[cpu] != NULL) |
|
vfp_save_state(vfp_current_hw_state[cpu], fpexc); |
|
#endif |
|
vfp_current_hw_state[cpu] = NULL; |
|
} |
|
EXPORT_SYMBOL(kernel_neon_begin); |
|
|
|
void kernel_neon_end(void) |
|
{ |
|
/* Disable the NEON/VFP unit. */ |
|
fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); |
|
put_cpu(); |
|
} |
|
EXPORT_SYMBOL(kernel_neon_end); |
|
|
|
#endif /* CONFIG_KERNEL_MODE_NEON */ |
|
|
|
static int __init vfp_detect(struct pt_regs *regs, unsigned int instr) |
|
{ |
|
VFP_arch = UINT_MAX; /* mark as not present */ |
|
regs->ARM_pc += 4; |
|
return 0; |
|
} |
|
|
|
static struct undef_hook vfp_detect_hook __initdata = { |
|
.instr_mask = 0x0c000e00, |
|
.instr_val = 0x0c000a00, |
|
.cpsr_mask = MODE_MASK, |
|
.cpsr_val = SVC_MODE, |
|
.fn = vfp_detect, |
|
}; |
|
|
|
/* |
|
* VFP support code initialisation. |
|
*/ |
|
static int __init vfp_init(void) |
|
{ |
|
unsigned int vfpsid; |
|
unsigned int cpu_arch = cpu_architecture(); |
|
|
|
/* |
|
* Enable the access to the VFP on all online CPUs so the |
|
* following test on FPSID will succeed. |
|
*/ |
|
if (cpu_arch >= CPU_ARCH_ARMv6) |
|
on_each_cpu(vfp_enable, NULL, 1); |
|
|
|
/* |
|
* First check that there is a VFP that we can use. |
|
* The handler is already setup to just log calls, so |
|
* we just need to read the VFPSID register. |
|
*/ |
|
register_undef_hook(&vfp_detect_hook); |
|
barrier(); |
|
vfpsid = fmrx(FPSID); |
|
barrier(); |
|
unregister_undef_hook(&vfp_detect_hook); |
|
vfp_vector = vfp_null_entry; |
|
|
|
pr_info("VFP support v0.3: "); |
|
if (VFP_arch) { |
|
pr_cont("not present\n"); |
|
return 0; |
|
/* Extract the architecture on CPUID scheme */ |
|
} else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) { |
|
VFP_arch = vfpsid & FPSID_CPUID_ARCH_MASK; |
|
VFP_arch >>= FPSID_ARCH_BIT; |
|
/* |
|
* Check for the presence of the Advanced SIMD |
|
* load/store instructions, integer and single |
|
* precision floating point operations. Only check |
|
* for NEON if the hardware has the MVFR registers. |
|
*/ |
|
if (IS_ENABLED(CONFIG_NEON) && |
|
(fmrx(MVFR1) & 0x000fff00) == 0x00011100) |
|
elf_hwcap |= HWCAP_NEON; |
|
|
|
if (IS_ENABLED(CONFIG_VFPv3)) { |
|
u32 mvfr0 = fmrx(MVFR0); |
|
if (((mvfr0 & MVFR0_DP_MASK) >> MVFR0_DP_BIT) == 0x2 || |
|
((mvfr0 & MVFR0_SP_MASK) >> MVFR0_SP_BIT) == 0x2) { |
|
elf_hwcap |= HWCAP_VFPv3; |
|
/* |
|
* Check for VFPv3 D16 and VFPv4 D16. CPUs in |
|
* this configuration only have 16 x 64bit |
|
* registers. |
|
*/ |
|
if ((mvfr0 & MVFR0_A_SIMD_MASK) == 1) |
|
/* also v4-D16 */ |
|
elf_hwcap |= HWCAP_VFPv3D16; |
|
else |
|
elf_hwcap |= HWCAP_VFPD32; |
|
} |
|
|
|
if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000) |
|
elf_hwcap |= HWCAP_VFPv4; |
|
} |
|
/* Extract the architecture version on pre-cpuid scheme */ |
|
} else { |
|
if (vfpsid & FPSID_NODOUBLE) { |
|
pr_cont("no double precision support\n"); |
|
return 0; |
|
} |
|
|
|
VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; |
|
} |
|
|
|
cpuhp_setup_state_nocalls(CPUHP_AP_ARM_VFP_STARTING, |
|
"arm/vfp:starting", vfp_starting_cpu, |
|
vfp_dying_cpu); |
|
|
|
vfp_vector = vfp_support_entry; |
|
|
|
thread_register_notifier(&vfp_notifier_block); |
|
vfp_pm_init(); |
|
|
|
/* |
|
* We detected VFP, and the support code is |
|
* in place; report VFP support to userspace. |
|
*/ |
|
elf_hwcap |= HWCAP_VFP; |
|
|
|
pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n", |
|
(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, |
|
VFP_arch, |
|
(vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT, |
|
(vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT, |
|
(vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT); |
|
|
|
return 0; |
|
} |
|
|
|
core_initcall(vfp_init);
|
|
|