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35 lines
870 B
35 lines
870 B
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* arch/arm/include/asm/dcscb_setup.S |
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* |
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* Created by: Dave Martin, 2012-06-22 |
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* Copyright: (C) 2012-2013 Linaro Limited |
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*/ |
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#include <linux/linkage.h> |
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ENTRY(dcscb_power_up_setup) |
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cmp r0, #0 @ check affinity level |
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beq 2f |
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/* |
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* Enable cluster-level coherency, in preparation for turning on the MMU. |
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* The ACTLR SMP bit does not need to be set here, because cpu_resume() |
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* already restores that. |
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* |
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* A15/A7 may not require explicit L2 invalidation on reset, dependent |
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* on hardware integration decisions. |
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* For now, this code assumes that L2 is either already invalidated, |
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* or invalidation is not required. |
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*/ |
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b cci_enable_port_for_self |
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2: @ Implementation-specific local CPU setup operations should go here, |
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@ if any. In this case, there is nothing to do. |
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bx lr |
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ENDPROC(dcscb_power_up_setup)
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