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409 lines
9.5 KiB
409 lines
9.5 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// |
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// Copyright (c) 2005-2008 Simtec Electronics |
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// http://armlinux.simtec.co.uk/ |
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// Ben Dooks <[email protected]> |
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#include <linux/kernel.h> |
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#include <linux/types.h> |
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#include <linux/interrupt.h> |
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#include <linux/list.h> |
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#include <linux/timer.h> |
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#include <linux/init.h> |
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#include <linux/gpio.h> |
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#include <linux/device.h> |
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#include <linux/syscore_ops.h> |
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#include <linux/serial_core.h> |
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#include <linux/serial_s3c.h> |
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#include <linux/clk.h> |
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#include <linux/i2c.h> |
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#include <linux/io.h> |
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#include <linux/platform_device.h> |
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#include <linux/mfd/tps65010.h> |
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#include <asm/mach-types.h> |
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#include <asm/mach/arch.h> |
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#include <asm/mach/map.h> |
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#include <asm/mach/irq.h> |
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#include <asm/irq.h> |
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#include <linux/platform_data/mtd-nand-s3c2410.h> |
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#include <linux/platform_data/i2c-s3c2410.h> |
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#include <linux/mtd/mtd.h> |
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#include <linux/mtd/rawnand.h> |
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#include <linux/mtd/nand-ecc-sw-hamming.h> |
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#include <linux/mtd/partitions.h> |
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#include "cpu.h" |
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#include <linux/soc/samsung/s3c-cpu-freq.h> |
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#include "devs.h" |
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#include "gpio-cfg.h" |
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#include "regs-gpio.h" |
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#include "gpio-samsung.h" |
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#include "s3c24xx.h" |
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#include "osiris.h" |
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#include "regs-mem-s3c24xx.h" |
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/* onboard perihperal map */ |
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static struct map_desc osiris_iodesc[] __initdata = { |
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/* ISA IO areas (may be over-written later) */ |
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{ |
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.virtual = (u32)S3C24XX_VA_ISA_BYTE, |
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.pfn = __phys_to_pfn(S3C2410_CS5), |
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.length = SZ_16M, |
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.type = MT_DEVICE, |
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}, { |
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.virtual = (u32)S3C24XX_VA_ISA_WORD, |
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.pfn = __phys_to_pfn(S3C2410_CS5), |
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.length = SZ_16M, |
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.type = MT_DEVICE, |
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}, |
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/* CPLD control registers */ |
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{ |
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.virtual = (u32)OSIRIS_VA_CTRL0, |
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.pfn = __phys_to_pfn(OSIRIS_PA_CTRL0), |
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.length = SZ_16K, |
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.type = MT_DEVICE, |
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}, { |
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.virtual = (u32)OSIRIS_VA_CTRL1, |
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.pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), |
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.length = SZ_16K, |
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.type = MT_DEVICE, |
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}, { |
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.virtual = (u32)OSIRIS_VA_CTRL2, |
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.pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), |
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.length = SZ_16K, |
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.type = MT_DEVICE, |
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}, { |
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.virtual = (u32)OSIRIS_VA_IDREG, |
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.pfn = __phys_to_pfn(OSIRIS_PA_IDREG), |
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.length = SZ_16K, |
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.type = MT_DEVICE, |
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}, |
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}; |
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#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
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#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
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#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
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static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { |
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[0] = { |
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.hwport = 0, |
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.flags = 0, |
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.ucon = UCON, |
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.ulcon = ULCON, |
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.ufcon = UFCON, |
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.clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
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}, |
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[1] = { |
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.hwport = 1, |
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.flags = 0, |
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.ucon = UCON, |
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.ulcon = ULCON, |
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.ufcon = UFCON, |
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.clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
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}, |
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[2] = { |
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.hwport = 2, |
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.flags = 0, |
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.ucon = UCON, |
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.ulcon = ULCON, |
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.ufcon = UFCON, |
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.clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
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} |
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}; |
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/* NAND Flash on Osiris board */ |
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static int external_map[] = { 2 }; |
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static int chip0_map[] = { 0 }; |
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static int chip1_map[] = { 1 }; |
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static struct mtd_partition __initdata osiris_default_nand_part[] = { |
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[0] = { |
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.name = "Boot Agent", |
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.size = SZ_16K, |
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.offset = 0, |
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}, |
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[1] = { |
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.name = "/boot", |
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.size = SZ_4M - SZ_16K, |
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.offset = SZ_16K, |
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}, |
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[2] = { |
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.name = "user1", |
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.offset = SZ_4M, |
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.size = SZ_32M - SZ_4M, |
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}, |
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[3] = { |
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.name = "user2", |
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.offset = SZ_32M, |
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.size = MTDPART_SIZ_FULL, |
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} |
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}; |
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static struct mtd_partition __initdata osiris_default_nand_part_large[] = { |
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[0] = { |
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.name = "Boot Agent", |
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.size = SZ_128K, |
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.offset = 0, |
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}, |
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[1] = { |
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.name = "/boot", |
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.size = SZ_4M - SZ_128K, |
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.offset = SZ_128K, |
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}, |
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[2] = { |
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.name = "user1", |
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.offset = SZ_4M, |
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.size = SZ_32M - SZ_4M, |
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}, |
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[3] = { |
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.name = "user2", |
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.offset = SZ_32M, |
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.size = MTDPART_SIZ_FULL, |
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} |
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}; |
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/* the Osiris has 3 selectable slots for nand-flash, the two |
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* on-board chip areas, as well as the external slot. |
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* |
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* Note, there is no current hot-plug support for the External |
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* socket. |
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*/ |
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static struct s3c2410_nand_set __initdata osiris_nand_sets[] = { |
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[1] = { |
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.name = "External", |
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.nr_chips = 1, |
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.nr_map = external_map, |
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.options = NAND_SCAN_SILENT_NODEV, |
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.nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
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.partitions = osiris_default_nand_part, |
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}, |
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[0] = { |
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.name = "chip0", |
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.nr_chips = 1, |
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.nr_map = chip0_map, |
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.nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
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.partitions = osiris_default_nand_part, |
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}, |
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[2] = { |
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.name = "chip1", |
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.nr_chips = 1, |
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.nr_map = chip1_map, |
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.options = NAND_SCAN_SILENT_NODEV, |
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.nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
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.partitions = osiris_default_nand_part, |
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}, |
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}; |
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static void osiris_nand_select(struct s3c2410_nand_set *set, int slot) |
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{ |
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unsigned int tmp; |
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slot = set->nr_map[slot] & 3; |
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pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n", |
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slot, set, set->nr_map); |
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tmp = __raw_readb(OSIRIS_VA_CTRL0); |
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tmp &= ~OSIRIS_CTRL0_NANDSEL; |
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tmp |= slot; |
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pr_debug("osiris_nand: ctrl0 now %02x\n", tmp); |
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__raw_writeb(tmp, OSIRIS_VA_CTRL0); |
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} |
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static struct s3c2410_platform_nand __initdata osiris_nand_info = { |
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.tacls = 25, |
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.twrph0 = 60, |
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.twrph1 = 60, |
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.nr_sets = ARRAY_SIZE(osiris_nand_sets), |
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.sets = osiris_nand_sets, |
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.select_chip = osiris_nand_select, |
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.engine_type = NAND_ECC_ENGINE_TYPE_SOFT, |
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}; |
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/* PCMCIA control and configuration */ |
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static struct resource osiris_pcmcia_resource[] = { |
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[0] = DEFINE_RES_MEM(0x0f000000, SZ_1M), |
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[1] = DEFINE_RES_MEM(0x0c000000, SZ_1M), |
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}; |
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static struct platform_device osiris_pcmcia = { |
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.name = "osiris-pcmcia", |
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.id = -1, |
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.num_resources = ARRAY_SIZE(osiris_pcmcia_resource), |
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.resource = osiris_pcmcia_resource, |
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}; |
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/* Osiris power management device */ |
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#ifdef CONFIG_PM |
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static unsigned char pm_osiris_ctrl0; |
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static int osiris_pm_suspend(void) |
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{ |
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unsigned int tmp; |
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pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0); |
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tmp = pm_osiris_ctrl0 & ~OSIRIS_CTRL0_NANDSEL; |
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/* ensure correct NAND slot is selected on resume */ |
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if ((pm_osiris_ctrl0 & OSIRIS_CTRL0_BOOT_INT) == 0) |
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tmp |= 2; |
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__raw_writeb(tmp, OSIRIS_VA_CTRL0); |
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/* ensure that an nRESET is not generated on resume. */ |
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gpio_request_one(S3C2410_GPA(21), GPIOF_OUT_INIT_HIGH, NULL); |
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gpio_free(S3C2410_GPA(21)); |
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return 0; |
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} |
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static void osiris_pm_resume(void) |
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{ |
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if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8) |
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__raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1); |
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__raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0); |
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s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); |
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} |
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#else |
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#define osiris_pm_suspend NULL |
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#define osiris_pm_resume NULL |
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#endif |
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static struct syscore_ops osiris_pm_syscore_ops = { |
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.suspend = osiris_pm_suspend, |
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.resume = osiris_pm_resume, |
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}; |
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/* Link for DVS driver to TPS65011 */ |
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static void osiris_tps_release(struct device *dev) |
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{ |
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/* static device, do not need to release anything */ |
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} |
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static struct platform_device osiris_tps_device = { |
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.name = "osiris-dvs", |
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.id = -1, |
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.dev.release = osiris_tps_release, |
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}; |
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static int osiris_tps_setup(struct i2c_client *client, void *context) |
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{ |
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osiris_tps_device.dev.parent = &client->dev; |
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return platform_device_register(&osiris_tps_device); |
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} |
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static int osiris_tps_remove(struct i2c_client *client, void *context) |
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{ |
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platform_device_unregister(&osiris_tps_device); |
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return 0; |
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} |
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static struct tps65010_board osiris_tps_board = { |
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.base = -1, /* GPIO can go anywhere at the moment */ |
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.setup = osiris_tps_setup, |
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.teardown = osiris_tps_remove, |
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}; |
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/* I2C devices fitted. */ |
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static struct i2c_board_info osiris_i2c_devs[] __initdata = { |
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{ |
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I2C_BOARD_INFO("tps65011", 0x48), |
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.irq = IRQ_EINT20, |
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.platform_data = &osiris_tps_board, |
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}, |
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}; |
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/* Standard Osiris devices */ |
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static struct platform_device *osiris_devices[] __initdata = { |
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&s3c2410_device_dclk, |
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&s3c_device_i2c0, |
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&s3c_device_wdt, |
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&s3c_device_nand, |
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&osiris_pcmcia, |
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}; |
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static struct s3c_cpufreq_board __initdata osiris_cpufreq = { |
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.refresh = 7800, /* refresh period is 7.8usec */ |
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.auto_io = 1, |
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.need_io = 1, |
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}; |
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static void __init osiris_map_io(void) |
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{ |
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unsigned long flags; |
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s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); |
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s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs)); |
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s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); |
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/* check for the newer revision boards with large page nand */ |
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if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) { |
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printk(KERN_INFO "OSIRIS-B detected (revision %d)\n", |
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__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK); |
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osiris_nand_sets[0].partitions = osiris_default_nand_part_large; |
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osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large); |
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} else { |
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/* write-protect line to the NAND */ |
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gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH, NULL); |
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gpio_free(S3C2410_GPA(0)); |
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} |
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/* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */ |
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local_irq_save(flags); |
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__raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON); |
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local_irq_restore(flags); |
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} |
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static void __init osiris_init_time(void) |
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{ |
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s3c2440_init_clocks(12000000); |
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s3c24xx_timer_init(); |
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} |
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static void __init osiris_init(void) |
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{ |
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register_syscore_ops(&osiris_pm_syscore_ops); |
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s3c_i2c0_set_platdata(NULL); |
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s3c_nand_set_platdata(&osiris_nand_info); |
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s3c_cpufreq_setboard(&osiris_cpufreq); |
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i2c_register_board_info(0, osiris_i2c_devs, |
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ARRAY_SIZE(osiris_i2c_devs)); |
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platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices)); |
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}; |
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MACHINE_START(OSIRIS, "Simtec-OSIRIS") |
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/* Maintainer: Ben Dooks <[email protected]> */ |
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.atag_offset = 0x100, |
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.map_io = osiris_map_io, |
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.init_irq = s3c2440_init_irq, |
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.init_machine = osiris_init, |
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.init_time = osiris_init_time, |
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MACHINE_END
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