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393 lines
8.5 KiB
393 lines
8.5 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* linux/arch/arm/mach-rpc/dma.c |
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* |
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* Copyright (C) 1998 Russell King |
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* |
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* DMA functions specific to RiscPC architecture |
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*/ |
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#include <linux/mman.h> |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/io.h> |
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#include <asm/page.h> |
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#include <asm/dma.h> |
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#include <asm/fiq.h> |
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#include <asm/irq.h> |
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#include <mach/hardware.h> |
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#include <linux/uaccess.h> |
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#include <asm/mach/dma.h> |
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#include <asm/hardware/iomd.h> |
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struct iomd_dma { |
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struct dma_struct dma; |
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void __iomem *base; /* Controller base address */ |
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int irq; /* Controller IRQ */ |
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unsigned int state; |
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dma_addr_t cur_addr; |
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unsigned int cur_len; |
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dma_addr_t dma_addr; |
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unsigned int dma_len; |
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}; |
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#if 0 |
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typedef enum { |
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dma_size_8 = 1, |
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dma_size_16 = 2, |
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dma_size_32 = 4, |
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dma_size_128 = 16 |
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} dma_size_t; |
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#endif |
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#define TRANSFER_SIZE 2 |
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#define CURA (0) |
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#define ENDA (IOMD_IO0ENDA - IOMD_IO0CURA) |
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#define CURB (IOMD_IO0CURB - IOMD_IO0CURA) |
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#define ENDB (IOMD_IO0ENDB - IOMD_IO0CURA) |
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#define CR (IOMD_IO0CR - IOMD_IO0CURA) |
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#define ST (IOMD_IO0ST - IOMD_IO0CURA) |
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static void iomd_get_next_sg(struct iomd_dma *idma) |
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{ |
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unsigned long end, offset, flags = 0; |
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if (idma->dma.sg) { |
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idma->cur_addr = idma->dma_addr; |
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offset = idma->cur_addr & ~PAGE_MASK; |
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end = offset + idma->dma_len; |
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if (end > PAGE_SIZE) |
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end = PAGE_SIZE; |
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if (offset + TRANSFER_SIZE >= end) |
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flags |= DMA_END_L; |
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idma->cur_len = end - TRANSFER_SIZE; |
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idma->dma_len -= end - offset; |
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idma->dma_addr += end - offset; |
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if (idma->dma_len == 0) { |
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if (idma->dma.sgcount > 1) { |
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idma->dma.sg = sg_next(idma->dma.sg); |
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idma->dma_addr = idma->dma.sg->dma_address; |
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idma->dma_len = idma->dma.sg->length; |
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idma->dma.sgcount--; |
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} else { |
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idma->dma.sg = NULL; |
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flags |= DMA_END_S; |
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} |
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} |
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} else { |
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flags = DMA_END_S | DMA_END_L; |
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idma->cur_addr = 0; |
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idma->cur_len = 0; |
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} |
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idma->cur_len |= flags; |
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} |
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static irqreturn_t iomd_dma_handle(int irq, void *dev_id) |
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{ |
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struct iomd_dma *idma = dev_id; |
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void __iomem *base = idma->base; |
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unsigned int state = idma->state; |
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unsigned int status, cur, end; |
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do { |
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status = readb(base + ST); |
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if (!(status & DMA_ST_INT)) |
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goto out; |
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if ((state ^ status) & DMA_ST_AB) |
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iomd_get_next_sg(idma); |
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// This efficiently implements state = OFL != AB ? AB : 0 |
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state = ((status >> 2) ^ status) & DMA_ST_AB; |
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if (state) { |
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cur = CURA; |
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end = ENDA; |
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} else { |
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cur = CURB; |
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end = ENDB; |
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} |
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writel(idma->cur_addr, base + cur); |
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writel(idma->cur_len, base + end); |
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if (status & DMA_ST_OFL && |
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idma->cur_len == (DMA_END_S|DMA_END_L)) |
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break; |
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} while (1); |
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state = ~DMA_ST_AB; |
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disable_irq_nosync(irq); |
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out: |
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idma->state = state; |
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return IRQ_HANDLED; |
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} |
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static int iomd_request_dma(unsigned int chan, dma_t *dma) |
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{ |
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struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); |
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return request_irq(idma->irq, iomd_dma_handle, |
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0, idma->dma.device_id, idma); |
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} |
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static void iomd_free_dma(unsigned int chan, dma_t *dma) |
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{ |
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struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); |
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free_irq(idma->irq, idma); |
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} |
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static struct device isa_dma_dev = { |
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.init_name = "fallback device", |
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.coherent_dma_mask = ~(dma_addr_t)0, |
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.dma_mask = &isa_dma_dev.coherent_dma_mask, |
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}; |
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static void iomd_enable_dma(unsigned int chan, dma_t *dma) |
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{ |
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struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); |
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void __iomem *base = idma->base; |
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unsigned int ctrl = TRANSFER_SIZE | DMA_CR_E; |
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if (idma->dma.invalid) { |
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idma->dma.invalid = 0; |
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/* |
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* Cope with ISA-style drivers which expect cache |
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* coherence. |
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*/ |
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if (!idma->dma.sg) { |
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idma->dma.sg = &idma->dma.buf; |
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idma->dma.sgcount = 1; |
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idma->dma.buf.length = idma->dma.count; |
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idma->dma.buf.dma_address = dma_map_single(&isa_dma_dev, |
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idma->dma.addr, idma->dma.count, |
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idma->dma.dma_mode == DMA_MODE_READ ? |
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DMA_FROM_DEVICE : DMA_TO_DEVICE); |
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} |
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idma->dma_addr = idma->dma.sg->dma_address; |
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idma->dma_len = idma->dma.sg->length; |
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writeb(DMA_CR_C, base + CR); |
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idma->state = DMA_ST_AB; |
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} |
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if (idma->dma.dma_mode == DMA_MODE_READ) |
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ctrl |= DMA_CR_D; |
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writeb(ctrl, base + CR); |
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enable_irq(idma->irq); |
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} |
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static void iomd_disable_dma(unsigned int chan, dma_t *dma) |
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{ |
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struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); |
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void __iomem *base = idma->base; |
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unsigned long flags; |
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local_irq_save(flags); |
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if (idma->state != ~DMA_ST_AB) |
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disable_irq(idma->irq); |
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writeb(0, base + CR); |
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local_irq_restore(flags); |
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} |
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static int iomd_set_dma_speed(unsigned int chan, dma_t *dma, int cycle) |
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{ |
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int tcr, speed; |
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if (cycle < 188) |
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speed = 3; |
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else if (cycle <= 250) |
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speed = 2; |
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else if (cycle < 438) |
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speed = 1; |
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else |
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speed = 0; |
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tcr = iomd_readb(IOMD_DMATCR); |
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speed &= 3; |
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switch (chan) { |
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case DMA_0: |
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tcr = (tcr & ~0x03) | speed; |
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break; |
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case DMA_1: |
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tcr = (tcr & ~0x0c) | (speed << 2); |
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break; |
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case DMA_2: |
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tcr = (tcr & ~0x30) | (speed << 4); |
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break; |
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case DMA_3: |
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tcr = (tcr & ~0xc0) | (speed << 6); |
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break; |
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default: |
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break; |
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} |
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iomd_writeb(tcr, IOMD_DMATCR); |
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return speed; |
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} |
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static struct dma_ops iomd_dma_ops = { |
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.type = "IOMD", |
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.request = iomd_request_dma, |
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.free = iomd_free_dma, |
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.enable = iomd_enable_dma, |
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.disable = iomd_disable_dma, |
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.setspeed = iomd_set_dma_speed, |
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}; |
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static struct fiq_handler fh = { |
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.name = "floppydma" |
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}; |
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struct floppy_dma { |
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struct dma_struct dma; |
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unsigned int fiq; |
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}; |
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static void floppy_enable_dma(unsigned int chan, dma_t *dma) |
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{ |
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struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma); |
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void *fiqhandler_start; |
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unsigned int fiqhandler_length; |
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struct pt_regs regs; |
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if (fdma->dma.sg) |
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BUG(); |
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if (fdma->dma.dma_mode == DMA_MODE_READ) { |
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extern unsigned char floppy_fiqin_start, floppy_fiqin_end; |
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fiqhandler_start = &floppy_fiqin_start; |
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fiqhandler_length = &floppy_fiqin_end - &floppy_fiqin_start; |
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} else { |
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extern unsigned char floppy_fiqout_start, floppy_fiqout_end; |
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fiqhandler_start = &floppy_fiqout_start; |
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fiqhandler_length = &floppy_fiqout_end - &floppy_fiqout_start; |
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} |
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regs.ARM_r9 = fdma->dma.count; |
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regs.ARM_r10 = (unsigned long)fdma->dma.addr; |
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regs.ARM_fp = (unsigned long)FLOPPYDMA_BASE; |
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if (claim_fiq(&fh)) { |
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printk("floppydma: couldn't claim FIQ.\n"); |
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return; |
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} |
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set_fiq_handler(fiqhandler_start, fiqhandler_length); |
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set_fiq_regs(®s); |
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enable_fiq(fdma->fiq); |
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} |
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static void floppy_disable_dma(unsigned int chan, dma_t *dma) |
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{ |
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struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma); |
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disable_fiq(fdma->fiq); |
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release_fiq(&fh); |
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} |
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static int floppy_get_residue(unsigned int chan, dma_t *dma) |
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{ |
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struct pt_regs regs; |
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get_fiq_regs(®s); |
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return regs.ARM_r9; |
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} |
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static struct dma_ops floppy_dma_ops = { |
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.type = "FIQDMA", |
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.enable = floppy_enable_dma, |
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.disable = floppy_disable_dma, |
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.residue = floppy_get_residue, |
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}; |
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/* |
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* This is virtual DMA - we don't need anything here. |
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*/ |
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static void sound_enable_disable_dma(unsigned int chan, dma_t *dma) |
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{ |
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} |
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static struct dma_ops sound_dma_ops = { |
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.type = "VIRTUAL", |
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.enable = sound_enable_disable_dma, |
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.disable = sound_enable_disable_dma, |
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}; |
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static struct iomd_dma iomd_dma[6]; |
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static struct floppy_dma floppy_dma = { |
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.dma = { |
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.d_ops = &floppy_dma_ops, |
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}, |
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.fiq = FIQ_FLOPPYDATA, |
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}; |
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static dma_t sound_dma = { |
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.d_ops = &sound_dma_ops, |
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}; |
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static int __init rpc_dma_init(void) |
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{ |
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unsigned int i; |
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int ret; |
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iomd_writeb(0, IOMD_IO0CR); |
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iomd_writeb(0, IOMD_IO1CR); |
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iomd_writeb(0, IOMD_IO2CR); |
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iomd_writeb(0, IOMD_IO3CR); |
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iomd_writeb(0xa0, IOMD_DMATCR); |
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/* |
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* Setup DMA channels 2,3 to be for podules |
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* and channels 0,1 for internal devices |
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*/ |
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iomd_writeb(DMA_EXT_IO3|DMA_EXT_IO2, IOMD_DMAEXT); |
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iomd_dma[DMA_0].base = IOMD_BASE + IOMD_IO0CURA; |
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iomd_dma[DMA_0].irq = IRQ_DMA0; |
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iomd_dma[DMA_1].base = IOMD_BASE + IOMD_IO1CURA; |
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iomd_dma[DMA_1].irq = IRQ_DMA1; |
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iomd_dma[DMA_2].base = IOMD_BASE + IOMD_IO2CURA; |
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iomd_dma[DMA_2].irq = IRQ_DMA2; |
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iomd_dma[DMA_3].base = IOMD_BASE + IOMD_IO3CURA; |
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iomd_dma[DMA_3].irq = IRQ_DMA3; |
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iomd_dma[DMA_S0].base = IOMD_BASE + IOMD_SD0CURA; |
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iomd_dma[DMA_S0].irq = IRQ_DMAS0; |
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iomd_dma[DMA_S1].base = IOMD_BASE + IOMD_SD1CURA; |
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iomd_dma[DMA_S1].irq = IRQ_DMAS1; |
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for (i = DMA_0; i <= DMA_S1; i++) { |
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iomd_dma[i].dma.d_ops = &iomd_dma_ops; |
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ret = isa_dma_add(i, &iomd_dma[i].dma); |
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if (ret) |
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printk("IOMDDMA%u: unable to register: %d\n", i, ret); |
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} |
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ret = isa_dma_add(DMA_VIRTUAL_FLOPPY, &floppy_dma.dma); |
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if (ret) |
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printk("IOMDFLOPPY: unable to register: %d\n", ret); |
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ret = isa_dma_add(DMA_VIRTUAL_SOUND, &sound_dma); |
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if (ret) |
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printk("IOMDSOUND: unable to register: %d\n", ret); |
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return 0; |
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} |
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core_initcall(rpc_dma_init);
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