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328 lines
8.2 KiB
328 lines
8.2 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd |
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* Author: Tony Xie <[email protected]> |
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*/ |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/of.h> |
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#include <linux/of_address.h> |
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#include <linux/regmap.h> |
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#include <linux/suspend.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/regulator/machine.h> |
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#include <asm/cacheflush.h> |
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#include <asm/tlbflush.h> |
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#include <asm/suspend.h> |
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#include "pm.h" |
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/* These enum are option of low power mode */ |
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enum { |
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ROCKCHIP_ARM_OFF_LOGIC_NORMAL = 0, |
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ROCKCHIP_ARM_OFF_LOGIC_DEEP = 1, |
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}; |
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struct rockchip_pm_data { |
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const struct platform_suspend_ops *ops; |
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int (*init)(struct device_node *np); |
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}; |
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static void __iomem *rk3288_bootram_base; |
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static phys_addr_t rk3288_bootram_phy; |
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static struct regmap *pmu_regmap; |
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static struct regmap *sgrf_regmap; |
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static struct regmap *grf_regmap; |
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static u32 rk3288_pmu_pwr_mode_con; |
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static u32 rk3288_sgrf_soc_con0; |
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static u32 rk3288_sgrf_cpu_con0; |
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static inline u32 rk3288_l2_config(void) |
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{ |
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u32 l2ctlr; |
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asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (l2ctlr)); |
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return l2ctlr; |
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} |
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static void __init rk3288_config_bootdata(void) |
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{ |
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rkpm_bootdata_cpusp = rk3288_bootram_phy + (SZ_4K - 8); |
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rkpm_bootdata_cpu_code = __pa_symbol(cpu_resume); |
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rkpm_bootdata_l2ctlr_f = 1; |
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rkpm_bootdata_l2ctlr = rk3288_l2_config(); |
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} |
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#define GRF_UOC0_CON0 0x320 |
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#define GRF_UOC1_CON0 0x334 |
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#define GRF_UOC2_CON0 0x348 |
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#define GRF_SIDDQ BIT(13) |
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static bool rk3288_slp_disable_osc(void) |
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{ |
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static const u32 reg_offset[] = { GRF_UOC0_CON0, GRF_UOC1_CON0, |
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GRF_UOC2_CON0 }; |
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u32 reg, i; |
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/* |
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* if any usb phy is still on(GRF_SIDDQ==0), that means we need the |
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* function of usb wakeup, so do not switch to 32khz, since the usb phy |
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* clk does not connect to 32khz osc |
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*/ |
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for (i = 0; i < ARRAY_SIZE(reg_offset); i++) { |
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regmap_read(grf_regmap, reg_offset[i], ®); |
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if (!(reg & GRF_SIDDQ)) |
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return false; |
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} |
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return true; |
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} |
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static void rk3288_slp_mode_set(int level) |
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{ |
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u32 mode_set, mode_set1; |
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bool osc_disable = rk3288_slp_disable_osc(); |
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regmap_read(sgrf_regmap, RK3288_SGRF_CPU_CON0, &rk3288_sgrf_cpu_con0); |
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regmap_read(sgrf_regmap, RK3288_SGRF_SOC_CON0, &rk3288_sgrf_soc_con0); |
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regmap_read(pmu_regmap, RK3288_PMU_PWRMODE_CON, |
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&rk3288_pmu_pwr_mode_con); |
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/* |
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* SGRF_FAST_BOOT_EN - system to boot from FAST_BOOT_ADDR |
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* PCLK_WDT_GATE - disable WDT during suspend. |
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*/ |
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regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0, |
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SGRF_PCLK_WDT_GATE | SGRF_FAST_BOOT_EN |
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| SGRF_PCLK_WDT_GATE_WRITE | SGRF_FAST_BOOT_EN_WRITE); |
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/* |
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* The dapswjdp can not auto reset before resume, that cause it may |
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* access some illegal address during resume. Let's disable it before |
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* suspend, and the MASKROM will enable it back. |
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*/ |
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regmap_write(sgrf_regmap, RK3288_SGRF_CPU_CON0, SGRF_DAPDEVICEEN_WRITE); |
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/* booting address of resuming system is from this register value */ |
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regmap_write(sgrf_regmap, RK3288_SGRF_FAST_BOOT_ADDR, |
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rk3288_bootram_phy); |
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mode_set = BIT(PMU_GLOBAL_INT_DISABLE) | BIT(PMU_L2FLUSH_EN) | |
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BIT(PMU_SREF0_ENTER_EN) | BIT(PMU_SREF1_ENTER_EN) | |
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BIT(PMU_DDR0_GATING_EN) | BIT(PMU_DDR1_GATING_EN) | |
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BIT(PMU_PWR_MODE_EN) | BIT(PMU_CHIP_PD_EN) | |
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BIT(PMU_SCU_EN); |
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mode_set1 = BIT(PMU_CLR_CORE) | BIT(PMU_CLR_CPUP); |
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if (level == ROCKCHIP_ARM_OFF_LOGIC_DEEP) { |
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/* arm off, logic deep sleep */ |
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mode_set |= BIT(PMU_BUS_PD_EN) | BIT(PMU_PMU_USE_LF) | |
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BIT(PMU_DDR1IO_RET_EN) | BIT(PMU_DDR0IO_RET_EN) | |
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BIT(PMU_ALIVE_USE_LF) | BIT(PMU_PLL_PD_EN); |
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if (osc_disable) |
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mode_set |= BIT(PMU_OSC_24M_DIS); |
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mode_set1 |= BIT(PMU_CLR_ALIVE) | BIT(PMU_CLR_BUS) | |
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BIT(PMU_CLR_PERI) | BIT(PMU_CLR_DMA); |
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regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1, |
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PMU_ARMINT_WAKEUP_EN); |
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/* |
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* In deep suspend we use PMU_PMU_USE_LF to let the rk3288 |
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* switch its main clock supply to the alternative 32kHz |
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* source. Therefore set 30ms on a 32kHz clock for pmic |
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* stabilization. Similar 30ms on 24MHz for the other |
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* mode below. |
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*/ |
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regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, 32 * 30); |
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/* only wait for stabilization, if we turned the osc off */ |
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regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, |
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osc_disable ? 32 * 30 : 0); |
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} else { |
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/* |
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* arm off, logic normal |
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* if pmu_clk_core_src_gate_en is not set, |
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* wakeup will be error |
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*/ |
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mode_set |= BIT(PMU_CLK_CORE_SRC_GATE_EN); |
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regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1, |
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PMU_ARMINT_WAKEUP_EN | PMU_GPIOINT_WAKEUP_EN); |
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/* 30ms on a 24MHz clock for pmic stabilization */ |
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regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, 24000 * 30); |
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/* oscillator is still running, so no need to wait */ |
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regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, 0); |
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} |
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regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON, mode_set); |
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regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON1, mode_set1); |
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} |
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static void rk3288_slp_mode_set_resume(void) |
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{ |
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regmap_write(sgrf_regmap, RK3288_SGRF_CPU_CON0, |
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rk3288_sgrf_cpu_con0 | SGRF_DAPDEVICEEN_WRITE); |
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regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON, |
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rk3288_pmu_pwr_mode_con); |
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regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0, |
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rk3288_sgrf_soc_con0 | SGRF_PCLK_WDT_GATE_WRITE |
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| SGRF_FAST_BOOT_EN_WRITE); |
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} |
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static int rockchip_lpmode_enter(unsigned long arg) |
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{ |
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flush_cache_all(); |
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cpu_do_idle(); |
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pr_err("%s: Failed to suspend\n", __func__); |
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return 1; |
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} |
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static int rk3288_suspend_enter(suspend_state_t state) |
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{ |
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local_fiq_disable(); |
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rk3288_slp_mode_set(ROCKCHIP_ARM_OFF_LOGIC_NORMAL); |
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cpu_suspend(0, rockchip_lpmode_enter); |
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rk3288_slp_mode_set_resume(); |
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local_fiq_enable(); |
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return 0; |
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} |
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static int rk3288_suspend_prepare(void) |
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{ |
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return regulator_suspend_prepare(PM_SUSPEND_MEM); |
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} |
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static void rk3288_suspend_finish(void) |
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{ |
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if (regulator_suspend_finish()) |
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pr_err("%s: Suspend finish failed\n", __func__); |
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} |
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static int __init rk3288_suspend_init(struct device_node *np) |
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{ |
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struct device_node *sram_np; |
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struct resource res; |
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int ret; |
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pmu_regmap = syscon_node_to_regmap(np); |
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if (IS_ERR(pmu_regmap)) { |
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pr_err("%s: could not find pmu regmap\n", __func__); |
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return PTR_ERR(pmu_regmap); |
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} |
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sgrf_regmap = syscon_regmap_lookup_by_compatible( |
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"rockchip,rk3288-sgrf"); |
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if (IS_ERR(sgrf_regmap)) { |
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pr_err("%s: could not find sgrf regmap\n", __func__); |
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return PTR_ERR(sgrf_regmap); |
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} |
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grf_regmap = syscon_regmap_lookup_by_compatible( |
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"rockchip,rk3288-grf"); |
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if (IS_ERR(grf_regmap)) { |
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pr_err("%s: could not find grf regmap\n", __func__); |
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return PTR_ERR(grf_regmap); |
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} |
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sram_np = of_find_compatible_node(NULL, NULL, |
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"rockchip,rk3288-pmu-sram"); |
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if (!sram_np) { |
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pr_err("%s: could not find bootram dt node\n", __func__); |
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return -ENODEV; |
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} |
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rk3288_bootram_base = of_iomap(sram_np, 0); |
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if (!rk3288_bootram_base) { |
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pr_err("%s: could not map bootram base\n", __func__); |
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of_node_put(sram_np); |
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return -ENOMEM; |
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} |
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ret = of_address_to_resource(sram_np, 0, &res); |
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if (ret) { |
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pr_err("%s: could not get bootram phy addr\n", __func__); |
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of_node_put(sram_np); |
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return ret; |
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} |
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rk3288_bootram_phy = res.start; |
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of_node_put(sram_np); |
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rk3288_config_bootdata(); |
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/* copy resume code and data to bootsram */ |
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memcpy(rk3288_bootram_base, rockchip_slp_cpu_resume, |
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rk3288_bootram_sz); |
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return 0; |
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} |
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static const struct platform_suspend_ops rk3288_suspend_ops = { |
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.enter = rk3288_suspend_enter, |
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.valid = suspend_valid_only_mem, |
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.prepare = rk3288_suspend_prepare, |
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.finish = rk3288_suspend_finish, |
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}; |
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static const struct rockchip_pm_data rk3288_pm_data __initconst = { |
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.ops = &rk3288_suspend_ops, |
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.init = rk3288_suspend_init, |
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}; |
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static const struct of_device_id rockchip_pmu_of_device_ids[] __initconst = { |
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{ |
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.compatible = "rockchip,rk3288-pmu", |
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.data = &rk3288_pm_data, |
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}, |
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{ /* sentinel */ }, |
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}; |
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void __init rockchip_suspend_init(void) |
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{ |
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const struct rockchip_pm_data *pm_data; |
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const struct of_device_id *match; |
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struct device_node *np; |
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int ret; |
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np = of_find_matching_node_and_match(NULL, rockchip_pmu_of_device_ids, |
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&match); |
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if (!match) { |
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pr_err("Failed to find PMU node\n"); |
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return; |
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} |
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pm_data = (struct rockchip_pm_data *) match->data; |
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if (pm_data->init) { |
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ret = pm_data->init(np); |
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if (ret) { |
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pr_err("%s: matches init error %d\n", __func__, ret); |
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return; |
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} |
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} |
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suspend_set_ops(pm_data->ops); |
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}
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