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258 lines
6.5 KiB
258 lines
6.5 KiB
/* |
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* Symmetric Multi Processing (SMP) support for Armada XP |
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* |
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* Copyright (C) 2012 Marvell |
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* |
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* Lior Amsalem <[email protected]> |
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* Yehuda Yitschak <[email protected]> |
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* Gregory CLEMENT <[email protected]> |
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* Thomas Petazzoni <[email protected]> |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without any |
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* warranty of any kind, whether express or implied. |
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* |
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* The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency |
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* This file implements the routines for preparing the SMP infrastructure |
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* and waking up the secondary CPUs |
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*/ |
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#include <linux/init.h> |
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#include <linux/smp.h> |
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#include <linux/clk.h> |
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#include <linux/of.h> |
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#include <linux/of_address.h> |
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#include <linux/mbus.h> |
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#include <asm/cacheflush.h> |
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#include <asm/smp_plat.h> |
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#include "common.h" |
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#include "armada-370-xp.h" |
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#include "pmsu.h" |
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#include "coherency.h" |
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#define ARMADA_XP_MAX_CPUS 4 |
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#define AXP_BOOTROM_BASE 0xfff00000 |
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#define AXP_BOOTROM_SIZE 0x100000 |
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static struct clk *boot_cpu_clk; |
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static struct clk *get_cpu_clk(int cpu) |
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{ |
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struct clk *cpu_clk; |
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struct device_node *np = of_get_cpu_node(cpu, NULL); |
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if (WARN(!np, "missing cpu node\n")) |
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return NULL; |
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cpu_clk = of_clk_get(np, 0); |
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if (WARN_ON(IS_ERR(cpu_clk))) |
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return NULL; |
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return cpu_clk; |
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} |
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static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) |
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{ |
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int ret, hw_cpu; |
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pr_info("Booting CPU %d\n", cpu); |
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hw_cpu = cpu_logical_map(cpu); |
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mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup); |
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/* |
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* This is needed to wake up CPUs in the offline state after |
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* using CPU hotplug. |
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*/ |
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arch_send_wakeup_ipi_mask(cpumask_of(cpu)); |
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/* |
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* This is needed to take secondary CPUs out of reset on the |
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* initial boot. |
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*/ |
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ret = mvebu_cpu_reset_deassert(hw_cpu); |
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if (ret) { |
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pr_warn("unable to boot CPU: %d\n", ret); |
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return ret; |
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} |
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return 0; |
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} |
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/* |
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* When a CPU is brought back online, either through CPU hotplug, or |
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* because of the boot of a kexec'ed kernel, the PMSU configuration |
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* for this CPU might be in the deep idle state, preventing this CPU |
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* from receiving interrupts. Here, we therefore take out the current |
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* CPU from this state, which was entered by armada_xp_cpu_die() |
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* below. |
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*/ |
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static void armada_xp_secondary_init(unsigned int cpu) |
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{ |
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mvebu_v7_pmsu_idle_exit(); |
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} |
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static void __init armada_xp_smp_init_cpus(void) |
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{ |
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unsigned int ncores = num_possible_cpus(); |
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if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS) |
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panic("Invalid number of CPUs in DT\n"); |
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} |
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static int armada_xp_sync_secondary_clk(unsigned int cpu) |
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{ |
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struct clk *cpu_clk = get_cpu_clk(cpu); |
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if (!cpu_clk || !boot_cpu_clk) |
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return 0; |
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clk_prepare_enable(cpu_clk); |
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clk_set_rate(cpu_clk, clk_get_rate(boot_cpu_clk)); |
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return 0; |
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} |
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static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) |
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{ |
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struct device_node *node; |
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struct resource res; |
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int err; |
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flush_cache_all(); |
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set_cpu_coherent(); |
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boot_cpu_clk = get_cpu_clk(smp_processor_id()); |
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if (boot_cpu_clk) { |
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clk_prepare_enable(boot_cpu_clk); |
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cpuhp_setup_state_nocalls(CPUHP_AP_ARM_MVEBU_SYNC_CLOCKS, |
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"arm/mvebu/sync_clocks:online", |
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armada_xp_sync_secondary_clk, NULL); |
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} |
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/* |
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* In order to boot the secondary CPUs we need to ensure |
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* the bootROM is mapped at the correct address. |
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*/ |
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node = of_find_compatible_node(NULL, NULL, "marvell,bootrom"); |
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if (!node) |
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panic("Cannot find 'marvell,bootrom' compatible node"); |
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err = of_address_to_resource(node, 0, &res); |
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of_node_put(node); |
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if (err < 0) |
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panic("Cannot get 'bootrom' node address"); |
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if (res.start != AXP_BOOTROM_BASE || |
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resource_size(&res) != AXP_BOOTROM_SIZE) |
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panic("The address for the BootROM is incorrect"); |
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} |
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#ifdef CONFIG_HOTPLUG_CPU |
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static void armada_xp_cpu_die(unsigned int cpu) |
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{ |
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/* |
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* CPU hotplug is implemented by putting offline CPUs into the |
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* deep idle sleep state. |
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*/ |
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armada_370_xp_pmsu_idle_enter(true); |
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} |
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/* |
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* We need a dummy function, so that platform_can_cpu_hotplug() knows |
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* we support CPU hotplug. However, the function does not need to do |
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* anything, because CPUs going offline can enter the deep idle state |
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* by themselves, without any help from a still alive CPU. |
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*/ |
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static int armada_xp_cpu_kill(unsigned int cpu) |
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{ |
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return 1; |
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} |
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#endif |
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const struct smp_operations armada_xp_smp_ops __initconst = { |
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.smp_init_cpus = armada_xp_smp_init_cpus, |
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.smp_prepare_cpus = armada_xp_smp_prepare_cpus, |
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.smp_boot_secondary = armada_xp_boot_secondary, |
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.smp_secondary_init = armada_xp_secondary_init, |
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#ifdef CONFIG_HOTPLUG_CPU |
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.cpu_die = armada_xp_cpu_die, |
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.cpu_kill = armada_xp_cpu_kill, |
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#endif |
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}; |
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CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp", |
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&armada_xp_smp_ops); |
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#define MV98DX3236_CPU_RESUME_CTRL_REG 0x08 |
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#define MV98DX3236_CPU_RESUME_ADDR_REG 0x04 |
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static const struct of_device_id of_mv98dx3236_resume_table[] = { |
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{ |
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.compatible = "marvell,98dx3336-resume-ctrl", |
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}, |
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{ /* end of list */ }, |
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}; |
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static int mv98dx3236_resume_set_cpu_boot_addr(int hw_cpu, void *boot_addr) |
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{ |
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struct device_node *np; |
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void __iomem *base; |
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WARN_ON(hw_cpu != 1); |
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np = of_find_matching_node(NULL, of_mv98dx3236_resume_table); |
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if (!np) |
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return -ENODEV; |
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base = of_io_request_and_map(np, 0, of_node_full_name(np)); |
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of_node_put(np); |
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if (IS_ERR(base)) |
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return PTR_ERR(base); |
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writel(0, base + MV98DX3236_CPU_RESUME_CTRL_REG); |
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writel(__pa_symbol(boot_addr), base + MV98DX3236_CPU_RESUME_ADDR_REG); |
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iounmap(base); |
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return 0; |
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} |
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static int mv98dx3236_boot_secondary(unsigned int cpu, struct task_struct *idle) |
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{ |
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int ret, hw_cpu; |
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hw_cpu = cpu_logical_map(cpu); |
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mv98dx3236_resume_set_cpu_boot_addr(hw_cpu, |
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armada_xp_secondary_startup); |
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/* |
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* This is needed to wake up CPUs in the offline state after |
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* using CPU hotplug. |
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*/ |
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arch_send_wakeup_ipi_mask(cpumask_of(cpu)); |
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/* |
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* This is needed to take secondary CPUs out of reset on the |
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* initial boot. |
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*/ |
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ret = mvebu_cpu_reset_deassert(hw_cpu); |
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if (ret) { |
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pr_warn("unable to boot CPU: %d\n", ret); |
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return ret; |
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} |
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return 0; |
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} |
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static const struct smp_operations mv98dx3236_smp_ops __initconst = { |
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.smp_init_cpus = armada_xp_smp_init_cpus, |
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.smp_prepare_cpus = armada_xp_smp_prepare_cpus, |
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.smp_boot_secondary = mv98dx3236_boot_secondary, |
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.smp_secondary_init = armada_xp_secondary_init, |
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#ifdef CONFIG_HOTPLUG_CPU |
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.cpu_die = armada_xp_cpu_die, |
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.cpu_kill = armada_xp_cpu_kill, |
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#endif |
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}; |
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CPU_METHOD_OF_DECLARE(mv98dx3236_smp, "marvell,98dx3236-smp", |
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&mv98dx3236_smp_ops);
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