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605 lines
17 KiB
605 lines
17 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* ALSA driver for ICEnsemble VT17xx |
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* |
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* Lowlevel functions for WM8776 codec |
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* |
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* Copyright (c) 2012 Ondrej Zary <[email protected]> |
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*/ |
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#include <linux/delay.h> |
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#include <sound/core.h> |
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#include <sound/control.h> |
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#include <sound/tlv.h> |
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#include "wm8776.h" |
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/* low-level access */ |
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static void snd_wm8776_write(struct snd_wm8776 *wm, u16 addr, u16 data) |
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{ |
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u8 bus_addr = addr << 1 | data >> 8; /* addr + 9th data bit */ |
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u8 bus_data = data & 0xff; /* remaining 8 data bits */ |
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if (addr < WM8776_REG_RESET) |
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wm->regs[addr] = data; |
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wm->ops.write(wm, bus_addr, bus_data); |
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} |
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/* register-level functions */ |
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static void snd_wm8776_activate_ctl(struct snd_wm8776 *wm, |
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const char *ctl_name, |
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bool active) |
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{ |
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struct snd_card *card = wm->card; |
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struct snd_kcontrol *kctl; |
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struct snd_kcontrol_volatile *vd; |
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struct snd_ctl_elem_id elem_id; |
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unsigned int index_offset; |
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memset(&elem_id, 0, sizeof(elem_id)); |
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strscpy(elem_id.name, ctl_name, sizeof(elem_id.name)); |
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elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; |
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kctl = snd_ctl_find_id(card, &elem_id); |
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if (!kctl) |
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return; |
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index_offset = snd_ctl_get_ioff(kctl, &kctl->id); |
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vd = &kctl->vd[index_offset]; |
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if (active) |
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vd->access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; |
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else |
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vd->access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; |
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snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); |
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} |
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static void snd_wm8776_update_agc_ctl(struct snd_wm8776 *wm) |
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{ |
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int i, flags_on = 0, flags_off = 0; |
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switch (wm->agc_mode) { |
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case WM8776_AGC_OFF: |
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flags_off = WM8776_FLAG_LIM | WM8776_FLAG_ALC; |
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break; |
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case WM8776_AGC_LIM: |
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flags_off = WM8776_FLAG_ALC; |
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flags_on = WM8776_FLAG_LIM; |
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break; |
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case WM8776_AGC_ALC_R: |
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case WM8776_AGC_ALC_L: |
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case WM8776_AGC_ALC_STEREO: |
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flags_off = WM8776_FLAG_LIM; |
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flags_on = WM8776_FLAG_ALC; |
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break; |
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} |
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for (i = 0; i < WM8776_CTL_COUNT; i++) |
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if (wm->ctl[i].flags & flags_off) |
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snd_wm8776_activate_ctl(wm, wm->ctl[i].name, false); |
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else if (wm->ctl[i].flags & flags_on) |
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snd_wm8776_activate_ctl(wm, wm->ctl[i].name, true); |
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} |
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static void snd_wm8776_set_agc(struct snd_wm8776 *wm, u16 agc, u16 nothing) |
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{ |
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u16 alc1 = wm->regs[WM8776_REG_ALCCTRL1] & ~WM8776_ALC1_LCT_MASK; |
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u16 alc2 = wm->regs[WM8776_REG_ALCCTRL2] & ~WM8776_ALC2_LCEN; |
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switch (agc) { |
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case 0: /* Off */ |
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wm->agc_mode = WM8776_AGC_OFF; |
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break; |
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case 1: /* Limiter */ |
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alc2 |= WM8776_ALC2_LCEN; |
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wm->agc_mode = WM8776_AGC_LIM; |
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break; |
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case 2: /* ALC Right */ |
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alc1 |= WM8776_ALC1_LCSEL_ALCR; |
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alc2 |= WM8776_ALC2_LCEN; |
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wm->agc_mode = WM8776_AGC_ALC_R; |
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break; |
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case 3: /* ALC Left */ |
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alc1 |= WM8776_ALC1_LCSEL_ALCL; |
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alc2 |= WM8776_ALC2_LCEN; |
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wm->agc_mode = WM8776_AGC_ALC_L; |
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break; |
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case 4: /* ALC Stereo */ |
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alc1 |= WM8776_ALC1_LCSEL_ALCSTEREO; |
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alc2 |= WM8776_ALC2_LCEN; |
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wm->agc_mode = WM8776_AGC_ALC_STEREO; |
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break; |
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} |
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snd_wm8776_write(wm, WM8776_REG_ALCCTRL1, alc1); |
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snd_wm8776_write(wm, WM8776_REG_ALCCTRL2, alc2); |
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snd_wm8776_update_agc_ctl(wm); |
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} |
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static void snd_wm8776_get_agc(struct snd_wm8776 *wm, u16 *mode, u16 *nothing) |
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{ |
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*mode = wm->agc_mode; |
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} |
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/* mixer controls */ |
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static const DECLARE_TLV_DB_SCALE(wm8776_hp_tlv, -7400, 100, 1); |
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static const DECLARE_TLV_DB_SCALE(wm8776_dac_tlv, -12750, 50, 1); |
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static const DECLARE_TLV_DB_SCALE(wm8776_adc_tlv, -10350, 50, 1); |
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static const DECLARE_TLV_DB_SCALE(wm8776_lct_tlv, -1600, 100, 0); |
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static const DECLARE_TLV_DB_SCALE(wm8776_maxgain_tlv, 0, 400, 0); |
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static const DECLARE_TLV_DB_SCALE(wm8776_ngth_tlv, -7800, 600, 0); |
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static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_lim_tlv, -1200, 100, 0); |
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static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_alc_tlv, -2100, 400, 0); |
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static const struct snd_wm8776_ctl snd_wm8776_default_ctl[WM8776_CTL_COUNT] = { |
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[WM8776_CTL_DAC_VOL] = { |
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.name = "Master Playback Volume", |
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.type = SNDRV_CTL_ELEM_TYPE_INTEGER, |
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.tlv = wm8776_dac_tlv, |
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.reg1 = WM8776_REG_DACLVOL, |
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.reg2 = WM8776_REG_DACRVOL, |
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.mask1 = WM8776_DACVOL_MASK, |
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.mask2 = WM8776_DACVOL_MASK, |
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.max = 0xff, |
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.flags = WM8776_FLAG_STEREO | WM8776_FLAG_VOL_UPDATE, |
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}, |
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[WM8776_CTL_DAC_SW] = { |
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.name = "Master Playback Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_DACCTRL1, |
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.reg2 = WM8776_REG_DACCTRL1, |
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.mask1 = WM8776_DAC_PL_LL, |
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.mask2 = WM8776_DAC_PL_RR, |
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.flags = WM8776_FLAG_STEREO, |
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}, |
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[WM8776_CTL_DAC_ZC_SW] = { |
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.name = "Master Zero Cross Detect Playback Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_DACCTRL1, |
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.mask1 = WM8776_DAC_DZCEN, |
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}, |
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[WM8776_CTL_HP_VOL] = { |
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.name = "Headphone Playback Volume", |
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.type = SNDRV_CTL_ELEM_TYPE_INTEGER, |
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.tlv = wm8776_hp_tlv, |
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.reg1 = WM8776_REG_HPLVOL, |
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.reg2 = WM8776_REG_HPRVOL, |
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.mask1 = WM8776_HPVOL_MASK, |
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.mask2 = WM8776_HPVOL_MASK, |
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.min = 0x2f, |
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.max = 0x7f, |
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.flags = WM8776_FLAG_STEREO | WM8776_FLAG_VOL_UPDATE, |
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}, |
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[WM8776_CTL_HP_SW] = { |
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.name = "Headphone Playback Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_PWRDOWN, |
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.mask1 = WM8776_PWR_HPPD, |
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.flags = WM8776_FLAG_INVERT, |
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}, |
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[WM8776_CTL_HP_ZC_SW] = { |
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.name = "Headphone Zero Cross Detect Playback Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_HPLVOL, |
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.reg2 = WM8776_REG_HPRVOL, |
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.mask1 = WM8776_VOL_HPZCEN, |
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.mask2 = WM8776_VOL_HPZCEN, |
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.flags = WM8776_FLAG_STEREO, |
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}, |
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[WM8776_CTL_AUX_SW] = { |
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.name = "AUX Playback Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_OUTMUX, |
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.mask1 = WM8776_OUTMUX_AUX, |
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}, |
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[WM8776_CTL_BYPASS_SW] = { |
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.name = "Bypass Playback Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_OUTMUX, |
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.mask1 = WM8776_OUTMUX_BYPASS, |
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}, |
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[WM8776_CTL_DAC_IZD_SW] = { |
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.name = "Infinite Zero Detect Playback Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_DACCTRL1, |
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.mask1 = WM8776_DAC_IZD, |
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}, |
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[WM8776_CTL_PHASE_SW] = { |
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.name = "Phase Invert Playback Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_PHASESWAP, |
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.reg2 = WM8776_REG_PHASESWAP, |
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.mask1 = WM8776_PHASE_INVERTL, |
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.mask2 = WM8776_PHASE_INVERTR, |
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.flags = WM8776_FLAG_STEREO, |
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}, |
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[WM8776_CTL_DEEMPH_SW] = { |
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.name = "Deemphasis Playback Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_DACCTRL2, |
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.mask1 = WM8776_DAC2_DEEMPH, |
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}, |
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[WM8776_CTL_ADC_VOL] = { |
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.name = "Input Capture Volume", |
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.type = SNDRV_CTL_ELEM_TYPE_INTEGER, |
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.tlv = wm8776_adc_tlv, |
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.reg1 = WM8776_REG_ADCLVOL, |
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.reg2 = WM8776_REG_ADCRVOL, |
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.mask1 = WM8776_ADC_GAIN_MASK, |
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.mask2 = WM8776_ADC_GAIN_MASK, |
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.max = 0xff, |
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.flags = WM8776_FLAG_STEREO | WM8776_FLAG_VOL_UPDATE, |
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}, |
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[WM8776_CTL_ADC_SW] = { |
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.name = "Input Capture Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_ADCMUX, |
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.reg2 = WM8776_REG_ADCMUX, |
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.mask1 = WM8776_ADC_MUTEL, |
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.mask2 = WM8776_ADC_MUTER, |
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.flags = WM8776_FLAG_STEREO | WM8776_FLAG_INVERT, |
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}, |
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[WM8776_CTL_INPUT1_SW] = { |
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.name = "AIN1 Capture Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_ADCMUX, |
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.mask1 = WM8776_ADC_MUX_AIN1, |
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}, |
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[WM8776_CTL_INPUT2_SW] = { |
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.name = "AIN2 Capture Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_ADCMUX, |
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.mask1 = WM8776_ADC_MUX_AIN2, |
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}, |
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[WM8776_CTL_INPUT3_SW] = { |
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.name = "AIN3 Capture Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_ADCMUX, |
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.mask1 = WM8776_ADC_MUX_AIN3, |
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}, |
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[WM8776_CTL_INPUT4_SW] = { |
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.name = "AIN4 Capture Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_ADCMUX, |
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.mask1 = WM8776_ADC_MUX_AIN4, |
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}, |
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[WM8776_CTL_INPUT5_SW] = { |
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.name = "AIN5 Capture Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_ADCMUX, |
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.mask1 = WM8776_ADC_MUX_AIN5, |
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}, |
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[WM8776_CTL_AGC_SEL] = { |
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.name = "AGC Select Capture Enum", |
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.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED, |
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.enum_names = { "Off", "Limiter", "ALC Right", "ALC Left", |
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"ALC Stereo" }, |
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.max = 5, /* .enum_names item count */ |
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.set = snd_wm8776_set_agc, |
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.get = snd_wm8776_get_agc, |
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}, |
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[WM8776_CTL_LIM_THR] = { |
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.name = "Limiter Threshold Capture Volume", |
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.type = SNDRV_CTL_ELEM_TYPE_INTEGER, |
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.tlv = wm8776_lct_tlv, |
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.reg1 = WM8776_REG_ALCCTRL1, |
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.mask1 = WM8776_ALC1_LCT_MASK, |
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.max = 15, |
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.flags = WM8776_FLAG_LIM, |
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}, |
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[WM8776_CTL_LIM_ATK] = { |
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.name = "Limiter Attack Time Capture Enum", |
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.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED, |
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.enum_names = { "0.25 ms", "0.5 ms", "1 ms", "2 ms", "4 ms", |
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"8 ms", "16 ms", "32 ms", "64 ms", "128 ms", "256 ms" }, |
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.max = 11, /* .enum_names item count */ |
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.reg1 = WM8776_REG_ALCCTRL3, |
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.mask1 = WM8776_ALC3_ATK_MASK, |
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.flags = WM8776_FLAG_LIM, |
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}, |
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[WM8776_CTL_LIM_DCY] = { |
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.name = "Limiter Decay Time Capture Enum", |
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.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED, |
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.enum_names = { "1.2 ms", "2.4 ms", "4.8 ms", "9.6 ms", |
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"19.2 ms", "38.4 ms", "76.8 ms", "154 ms", "307 ms", |
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"614 ms", "1.23 s" }, |
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.max = 11, /* .enum_names item count */ |
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.reg1 = WM8776_REG_ALCCTRL3, |
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.mask1 = WM8776_ALC3_DCY_MASK, |
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.flags = WM8776_FLAG_LIM, |
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}, |
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[WM8776_CTL_LIM_TRANWIN] = { |
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.name = "Limiter Transient Window Capture Enum", |
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.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED, |
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.enum_names = { "0 us", "62.5 us", "125 us", "250 us", "500 us", |
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"1 ms", "2 ms", "4 ms" }, |
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.max = 8, /* .enum_names item count */ |
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.reg1 = WM8776_REG_LIMITER, |
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.mask1 = WM8776_LIM_TRANWIN_MASK, |
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.flags = WM8776_FLAG_LIM, |
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}, |
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[WM8776_CTL_LIM_MAXATTN] = { |
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.name = "Limiter Maximum Attenuation Capture Volume", |
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.type = SNDRV_CTL_ELEM_TYPE_INTEGER, |
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.tlv = wm8776_maxatten_lim_tlv, |
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.reg1 = WM8776_REG_LIMITER, |
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.mask1 = WM8776_LIM_MAXATTEN_MASK, |
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.min = 3, |
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.max = 12, |
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.flags = WM8776_FLAG_LIM | WM8776_FLAG_INVERT, |
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}, |
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[WM8776_CTL_ALC_TGT] = { |
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.name = "ALC Target Level Capture Volume", |
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.type = SNDRV_CTL_ELEM_TYPE_INTEGER, |
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.tlv = wm8776_lct_tlv, |
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.reg1 = WM8776_REG_ALCCTRL1, |
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.mask1 = WM8776_ALC1_LCT_MASK, |
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.max = 15, |
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.flags = WM8776_FLAG_ALC, |
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}, |
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[WM8776_CTL_ALC_ATK] = { |
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.name = "ALC Attack Time Capture Enum", |
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.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED, |
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.enum_names = { "8.40 ms", "16.8 ms", "33.6 ms", "67.2 ms", |
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"134 ms", "269 ms", "538 ms", "1.08 s", "2.15 s", |
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"4.3 s", "8.6 s" }, |
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.max = 11, /* .enum_names item count */ |
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.reg1 = WM8776_REG_ALCCTRL3, |
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.mask1 = WM8776_ALC3_ATK_MASK, |
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.flags = WM8776_FLAG_ALC, |
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}, |
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[WM8776_CTL_ALC_DCY] = { |
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.name = "ALC Decay Time Capture Enum", |
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.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED, |
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.enum_names = { "33.5 ms", "67.0 ms", "134 ms", "268 ms", |
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"536 ms", "1.07 s", "2.14 s", "4.29 s", "8.58 s", |
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"17.2 s", "34.3 s" }, |
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.max = 11, /* .enum_names item count */ |
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.reg1 = WM8776_REG_ALCCTRL3, |
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.mask1 = WM8776_ALC3_DCY_MASK, |
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.flags = WM8776_FLAG_ALC, |
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}, |
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[WM8776_CTL_ALC_MAXGAIN] = { |
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.name = "ALC Maximum Gain Capture Volume", |
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.type = SNDRV_CTL_ELEM_TYPE_INTEGER, |
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.tlv = wm8776_maxgain_tlv, |
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.reg1 = WM8776_REG_ALCCTRL1, |
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.mask1 = WM8776_ALC1_MAXGAIN_MASK, |
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.min = 1, |
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.max = 7, |
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.flags = WM8776_FLAG_ALC, |
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}, |
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[WM8776_CTL_ALC_MAXATTN] = { |
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.name = "ALC Maximum Attenuation Capture Volume", |
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.type = SNDRV_CTL_ELEM_TYPE_INTEGER, |
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.tlv = wm8776_maxatten_alc_tlv, |
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.reg1 = WM8776_REG_LIMITER, |
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.mask1 = WM8776_LIM_MAXATTEN_MASK, |
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.min = 10, |
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.max = 15, |
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.flags = WM8776_FLAG_ALC | WM8776_FLAG_INVERT, |
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}, |
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[WM8776_CTL_ALC_HLD] = { |
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.name = "ALC Hold Time Capture Enum", |
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.type = SNDRV_CTL_ELEM_TYPE_ENUMERATED, |
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.enum_names = { "0 ms", "2.67 ms", "5.33 ms", "10.6 ms", |
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"21.3 ms", "42.7 ms", "85.3 ms", "171 ms", "341 ms", |
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"683 ms", "1.37 s", "2.73 s", "5.46 s", "10.9 s", |
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"21.8 s", "43.7 s" }, |
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.max = 16, /* .enum_names item count */ |
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.reg1 = WM8776_REG_ALCCTRL2, |
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.mask1 = WM8776_ALC2_HOLD_MASK, |
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.flags = WM8776_FLAG_ALC, |
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}, |
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[WM8776_CTL_NGT_SW] = { |
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.name = "Noise Gate Capture Switch", |
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.type = SNDRV_CTL_ELEM_TYPE_BOOLEAN, |
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.reg1 = WM8776_REG_NOISEGATE, |
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.mask1 = WM8776_NGAT_ENABLE, |
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.flags = WM8776_FLAG_ALC, |
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}, |
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[WM8776_CTL_NGT_THR] = { |
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.name = "Noise Gate Threshold Capture Volume", |
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.type = SNDRV_CTL_ELEM_TYPE_INTEGER, |
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.tlv = wm8776_ngth_tlv, |
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.reg1 = WM8776_REG_NOISEGATE, |
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.mask1 = WM8776_NGAT_THR_MASK, |
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.max = 7, |
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.flags = WM8776_FLAG_ALC, |
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}, |
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}; |
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/* exported functions */ |
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|
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void snd_wm8776_init(struct snd_wm8776 *wm) |
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{ |
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int i; |
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static const u16 default_values[] = { |
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0x000, 0x100, 0x000, |
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0x000, 0x100, 0x000, |
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0x000, 0x090, 0x000, 0x000, |
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0x022, 0x022, 0x022, |
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0x008, 0x0cf, 0x0cf, 0x07b, 0x000, |
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0x032, 0x000, 0x0a6, 0x001, 0x001 |
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}; |
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memcpy(wm->ctl, snd_wm8776_default_ctl, sizeof(wm->ctl)); |
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snd_wm8776_write(wm, WM8776_REG_RESET, 0x00); /* reset */ |
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udelay(10); |
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/* load defaults */ |
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for (i = 0; i < ARRAY_SIZE(default_values); i++) |
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snd_wm8776_write(wm, i, default_values[i]); |
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} |
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void snd_wm8776_resume(struct snd_wm8776 *wm) |
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{ |
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int i; |
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for (i = 0; i < WM8776_REG_COUNT; i++) |
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snd_wm8776_write(wm, i, wm->regs[i]); |
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} |
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void snd_wm8776_set_power(struct snd_wm8776 *wm, u16 power) |
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{ |
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snd_wm8776_write(wm, WM8776_REG_PWRDOWN, power); |
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} |
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void snd_wm8776_volume_restore(struct snd_wm8776 *wm) |
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{ |
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u16 val = wm->regs[WM8776_REG_DACRVOL]; |
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/* restore volume after MCLK stopped */ |
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snd_wm8776_write(wm, WM8776_REG_DACRVOL, val | WM8776_VOL_UPDATE); |
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} |
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|
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/* mixer callbacks */ |
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static int snd_wm8776_volume_info(struct snd_kcontrol *kcontrol, |
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struct snd_ctl_elem_info *uinfo) |
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{ |
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struct snd_wm8776 *wm = snd_kcontrol_chip(kcontrol); |
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int n = kcontrol->private_value; |
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|
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
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uinfo->count = (wm->ctl[n].flags & WM8776_FLAG_STEREO) ? 2 : 1; |
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uinfo->value.integer.min = wm->ctl[n].min; |
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uinfo->value.integer.max = wm->ctl[n].max; |
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|
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return 0; |
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} |
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static int snd_wm8776_enum_info(struct snd_kcontrol *kcontrol, |
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struct snd_ctl_elem_info *uinfo) |
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{ |
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struct snd_wm8776 *wm = snd_kcontrol_chip(kcontrol); |
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int n = kcontrol->private_value; |
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return snd_ctl_enum_info(uinfo, 1, wm->ctl[n].max, |
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wm->ctl[n].enum_names); |
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} |
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static int snd_wm8776_ctl_get(struct snd_kcontrol *kcontrol, |
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struct snd_ctl_elem_value *ucontrol) |
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{ |
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struct snd_wm8776 *wm = snd_kcontrol_chip(kcontrol); |
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int n = kcontrol->private_value; |
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u16 val1, val2; |
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|
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if (wm->ctl[n].get) |
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wm->ctl[n].get(wm, &val1, &val2); |
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else { |
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val1 = wm->regs[wm->ctl[n].reg1] & wm->ctl[n].mask1; |
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val1 >>= __ffs(wm->ctl[n].mask1); |
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if (wm->ctl[n].flags & WM8776_FLAG_STEREO) { |
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val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2; |
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val2 >>= __ffs(wm->ctl[n].mask2); |
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if (wm->ctl[n].flags & WM8776_FLAG_VOL_UPDATE) |
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val2 &= ~WM8776_VOL_UPDATE; |
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} |
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} |
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if (wm->ctl[n].flags & WM8776_FLAG_INVERT) { |
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val1 = wm->ctl[n].max - (val1 - wm->ctl[n].min); |
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if (wm->ctl[n].flags & WM8776_FLAG_STEREO) |
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val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min); |
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} |
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ucontrol->value.integer.value[0] = val1; |
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if (wm->ctl[n].flags & WM8776_FLAG_STEREO) |
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ucontrol->value.integer.value[1] = val2; |
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return 0; |
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} |
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|
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static int snd_wm8776_ctl_put(struct snd_kcontrol *kcontrol, |
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struct snd_ctl_elem_value *ucontrol) |
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{ |
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struct snd_wm8776 *wm = snd_kcontrol_chip(kcontrol); |
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int n = kcontrol->private_value; |
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u16 val, regval1, regval2; |
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|
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/* this also works for enum because value is a union */ |
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regval1 = ucontrol->value.integer.value[0]; |
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regval2 = ucontrol->value.integer.value[1]; |
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if (wm->ctl[n].flags & WM8776_FLAG_INVERT) { |
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regval1 = wm->ctl[n].max - (regval1 - wm->ctl[n].min); |
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regval2 = wm->ctl[n].max - (regval2 - wm->ctl[n].min); |
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} |
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if (wm->ctl[n].set) |
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wm->ctl[n].set(wm, regval1, regval2); |
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else { |
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val = wm->regs[wm->ctl[n].reg1] & ~wm->ctl[n].mask1; |
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val |= regval1 << __ffs(wm->ctl[n].mask1); |
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/* both stereo controls in one register */ |
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if (wm->ctl[n].flags & WM8776_FLAG_STEREO && |
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wm->ctl[n].reg1 == wm->ctl[n].reg2) { |
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val &= ~wm->ctl[n].mask2; |
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val |= regval2 << __ffs(wm->ctl[n].mask2); |
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} |
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snd_wm8776_write(wm, wm->ctl[n].reg1, val); |
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/* stereo controls in different registers */ |
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if (wm->ctl[n].flags & WM8776_FLAG_STEREO && |
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wm->ctl[n].reg1 != wm->ctl[n].reg2) { |
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val = wm->regs[wm->ctl[n].reg2] & ~wm->ctl[n].mask2; |
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val |= regval2 << __ffs(wm->ctl[n].mask2); |
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if (wm->ctl[n].flags & WM8776_FLAG_VOL_UPDATE) |
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val |= WM8776_VOL_UPDATE; |
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snd_wm8776_write(wm, wm->ctl[n].reg2, val); |
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} |
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} |
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|
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return 0; |
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} |
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static int snd_wm8776_add_control(struct snd_wm8776 *wm, int num) |
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{ |
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struct snd_kcontrol_new cont; |
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struct snd_kcontrol *ctl; |
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|
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memset(&cont, 0, sizeof(cont)); |
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cont.iface = SNDRV_CTL_ELEM_IFACE_MIXER; |
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cont.private_value = num; |
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cont.name = wm->ctl[num].name; |
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cont.access = SNDRV_CTL_ELEM_ACCESS_READWRITE; |
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if (wm->ctl[num].flags & WM8776_FLAG_LIM || |
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wm->ctl[num].flags & WM8776_FLAG_ALC) |
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cont.access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; |
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cont.tlv.p = NULL; |
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cont.get = snd_wm8776_ctl_get; |
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cont.put = snd_wm8776_ctl_put; |
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|
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switch (wm->ctl[num].type) { |
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case SNDRV_CTL_ELEM_TYPE_INTEGER: |
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cont.info = snd_wm8776_volume_info; |
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cont.access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ; |
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cont.tlv.p = wm->ctl[num].tlv; |
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break; |
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case SNDRV_CTL_ELEM_TYPE_BOOLEAN: |
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wm->ctl[num].max = 1; |
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if (wm->ctl[num].flags & WM8776_FLAG_STEREO) |
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cont.info = snd_ctl_boolean_stereo_info; |
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else |
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cont.info = snd_ctl_boolean_mono_info; |
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break; |
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case SNDRV_CTL_ELEM_TYPE_ENUMERATED: |
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cont.info = snd_wm8776_enum_info; |
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break; |
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default: |
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return -EINVAL; |
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} |
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ctl = snd_ctl_new1(&cont, wm); |
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if (!ctl) |
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return -ENOMEM; |
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|
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return snd_ctl_add(wm->card, ctl); |
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} |
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|
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int snd_wm8776_build_controls(struct snd_wm8776 *wm) |
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{ |
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int err, i; |
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|
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for (i = 0; i < WM8776_CTL_COUNT; i++) |
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if (wm->ctl[i].name) { |
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err = snd_wm8776_add_control(wm, i); |
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if (err < 0) |
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return err; |
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} |
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|
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return 0; |
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}
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