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724 lines
17 KiB
724 lines
17 KiB
// SPDX-License-Identifier: GPL-2.0-only |
|
/* |
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* dice_stream.c - a part of driver for DICE based devices |
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* |
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* Copyright (c) Clemens Ladisch <[email protected]> |
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* Copyright (c) 2014 Takashi Sakamoto <[email protected]> |
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*/ |
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|
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#include "dice.h" |
|
|
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#define CALLBACK_TIMEOUT 200 |
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#define NOTIFICATION_TIMEOUT_MS (2 * MSEC_PER_SEC) |
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|
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struct reg_params { |
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unsigned int count; |
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unsigned int size; |
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}; |
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|
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const unsigned int snd_dice_rates[SND_DICE_RATES_COUNT] = { |
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/* mode 0 */ |
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[0] = 32000, |
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[1] = 44100, |
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[2] = 48000, |
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/* mode 1 */ |
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[3] = 88200, |
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[4] = 96000, |
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/* mode 2 */ |
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[5] = 176400, |
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[6] = 192000, |
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}; |
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|
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int snd_dice_stream_get_rate_mode(struct snd_dice *dice, unsigned int rate, |
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enum snd_dice_rate_mode *mode) |
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{ |
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/* Corresponding to each entry in snd_dice_rates. */ |
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static const enum snd_dice_rate_mode modes[] = { |
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[0] = SND_DICE_RATE_MODE_LOW, |
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[1] = SND_DICE_RATE_MODE_LOW, |
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[2] = SND_DICE_RATE_MODE_LOW, |
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[3] = SND_DICE_RATE_MODE_MIDDLE, |
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[4] = SND_DICE_RATE_MODE_MIDDLE, |
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[5] = SND_DICE_RATE_MODE_HIGH, |
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[6] = SND_DICE_RATE_MODE_HIGH, |
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}; |
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int i; |
|
|
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for (i = 0; i < ARRAY_SIZE(snd_dice_rates); i++) { |
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if (!(dice->clock_caps & BIT(i))) |
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continue; |
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if (snd_dice_rates[i] != rate) |
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continue; |
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|
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*mode = modes[i]; |
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return 0; |
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} |
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|
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return -EINVAL; |
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} |
|
|
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/* |
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* This operation has an effect to synchronize GLOBAL_STATUS/GLOBAL_SAMPLE_RATE |
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* to GLOBAL_STATUS. Especially, just after powering on, these are different. |
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*/ |
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static int ensure_phase_lock(struct snd_dice *dice, unsigned int rate) |
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{ |
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__be32 reg, nominal; |
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u32 data; |
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int i; |
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int err; |
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|
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err = snd_dice_transaction_read_global(dice, GLOBAL_CLOCK_SELECT, |
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®, sizeof(reg)); |
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if (err < 0) |
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return err; |
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|
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data = be32_to_cpu(reg); |
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|
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data &= ~CLOCK_RATE_MASK; |
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for (i = 0; i < ARRAY_SIZE(snd_dice_rates); ++i) { |
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if (snd_dice_rates[i] == rate) |
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break; |
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} |
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if (i == ARRAY_SIZE(snd_dice_rates)) |
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return -EINVAL; |
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data |= i << CLOCK_RATE_SHIFT; |
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|
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if (completion_done(&dice->clock_accepted)) |
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reinit_completion(&dice->clock_accepted); |
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|
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reg = cpu_to_be32(data); |
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err = snd_dice_transaction_write_global(dice, GLOBAL_CLOCK_SELECT, |
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®, sizeof(reg)); |
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if (err < 0) |
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return err; |
|
|
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if (wait_for_completion_timeout(&dice->clock_accepted, |
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msecs_to_jiffies(NOTIFICATION_TIMEOUT_MS)) == 0) { |
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/* |
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* Old versions of Dice firmware transfer no notification when |
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* the same clock status as current one is set. In this case, |
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* just check current clock status. |
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*/ |
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err = snd_dice_transaction_read_global(dice, GLOBAL_STATUS, |
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&nominal, sizeof(nominal)); |
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if (err < 0) |
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return err; |
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if (!(be32_to_cpu(nominal) & STATUS_SOURCE_LOCKED)) |
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return -ETIMEDOUT; |
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} |
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|
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return 0; |
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} |
|
|
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static int get_register_params(struct snd_dice *dice, |
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struct reg_params *tx_params, |
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struct reg_params *rx_params) |
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{ |
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__be32 reg[2]; |
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int err; |
|
|
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err = snd_dice_transaction_read_tx(dice, TX_NUMBER, reg, sizeof(reg)); |
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if (err < 0) |
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return err; |
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tx_params->count = |
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min_t(unsigned int, be32_to_cpu(reg[0]), MAX_STREAMS); |
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tx_params->size = be32_to_cpu(reg[1]) * 4; |
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|
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err = snd_dice_transaction_read_rx(dice, RX_NUMBER, reg, sizeof(reg)); |
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if (err < 0) |
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return err; |
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rx_params->count = |
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min_t(unsigned int, be32_to_cpu(reg[0]), MAX_STREAMS); |
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rx_params->size = be32_to_cpu(reg[1]) * 4; |
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|
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return 0; |
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} |
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|
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static void release_resources(struct snd_dice *dice) |
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{ |
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int i; |
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|
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for (i = 0; i < MAX_STREAMS; ++i) { |
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fw_iso_resources_free(&dice->tx_resources[i]); |
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fw_iso_resources_free(&dice->rx_resources[i]); |
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} |
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} |
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|
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static void stop_streams(struct snd_dice *dice, enum amdtp_stream_direction dir, |
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struct reg_params *params) |
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{ |
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__be32 reg; |
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unsigned int i; |
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|
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for (i = 0; i < params->count; i++) { |
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reg = cpu_to_be32((u32)-1); |
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if (dir == AMDTP_IN_STREAM) { |
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snd_dice_transaction_write_tx(dice, |
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params->size * i + TX_ISOCHRONOUS, |
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®, sizeof(reg)); |
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} else { |
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snd_dice_transaction_write_rx(dice, |
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params->size * i + RX_ISOCHRONOUS, |
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®, sizeof(reg)); |
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} |
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} |
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} |
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|
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static int keep_resources(struct snd_dice *dice, struct amdtp_stream *stream, |
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struct fw_iso_resources *resources, unsigned int rate, |
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unsigned int pcm_chs, unsigned int midi_ports) |
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{ |
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bool double_pcm_frames; |
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unsigned int i; |
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int err; |
|
|
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// At 176.4/192.0 kHz, Dice has a quirk to transfer two PCM frames in |
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// one data block of AMDTP packet. Thus sampling transfer frequency is |
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// a half of PCM sampling frequency, i.e. PCM frames at 192.0 kHz are |
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// transferred on AMDTP packets at 96 kHz. Two successive samples of a |
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// channel are stored consecutively in the packet. This quirk is called |
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// as 'Dual Wire'. |
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// For this quirk, blocking mode is required and PCM buffer size should |
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// be aligned to SYT_INTERVAL. |
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double_pcm_frames = rate > 96000; |
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if (double_pcm_frames) { |
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rate /= 2; |
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pcm_chs *= 2; |
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} |
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|
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err = amdtp_am824_set_parameters(stream, rate, pcm_chs, midi_ports, |
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double_pcm_frames); |
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if (err < 0) |
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return err; |
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|
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if (double_pcm_frames) { |
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pcm_chs /= 2; |
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|
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for (i = 0; i < pcm_chs; i++) { |
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amdtp_am824_set_pcm_position(stream, i, i * 2); |
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amdtp_am824_set_pcm_position(stream, i + pcm_chs, |
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i * 2 + 1); |
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} |
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} |
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|
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return fw_iso_resources_allocate(resources, |
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amdtp_stream_get_max_payload(stream), |
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fw_parent_device(dice->unit)->max_speed); |
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} |
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|
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static int keep_dual_resources(struct snd_dice *dice, unsigned int rate, |
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enum amdtp_stream_direction dir, |
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struct reg_params *params) |
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{ |
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enum snd_dice_rate_mode mode; |
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int i; |
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int err; |
|
|
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err = snd_dice_stream_get_rate_mode(dice, rate, &mode); |
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if (err < 0) |
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return err; |
|
|
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for (i = 0; i < params->count; ++i) { |
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__be32 reg[2]; |
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struct amdtp_stream *stream; |
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struct fw_iso_resources *resources; |
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unsigned int pcm_cache; |
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unsigned int pcm_chs; |
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unsigned int midi_ports; |
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|
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if (dir == AMDTP_IN_STREAM) { |
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stream = &dice->tx_stream[i]; |
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resources = &dice->tx_resources[i]; |
|
|
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pcm_cache = dice->tx_pcm_chs[i][mode]; |
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err = snd_dice_transaction_read_tx(dice, |
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params->size * i + TX_NUMBER_AUDIO, |
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reg, sizeof(reg)); |
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} else { |
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stream = &dice->rx_stream[i]; |
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resources = &dice->rx_resources[i]; |
|
|
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pcm_cache = dice->rx_pcm_chs[i][mode]; |
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err = snd_dice_transaction_read_rx(dice, |
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params->size * i + RX_NUMBER_AUDIO, |
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reg, sizeof(reg)); |
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} |
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if (err < 0) |
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return err; |
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pcm_chs = be32_to_cpu(reg[0]); |
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midi_ports = be32_to_cpu(reg[1]); |
|
|
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// These are important for developer of this driver. |
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if (pcm_chs != pcm_cache) { |
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dev_info(&dice->unit->device, |
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"cache mismatch: pcm: %u:%u, midi: %u\n", |
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pcm_chs, pcm_cache, midi_ports); |
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return -EPROTO; |
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} |
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|
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err = keep_resources(dice, stream, resources, rate, pcm_chs, |
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midi_ports); |
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if (err < 0) |
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return err; |
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} |
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|
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return 0; |
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} |
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|
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static void finish_session(struct snd_dice *dice, struct reg_params *tx_params, |
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struct reg_params *rx_params) |
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{ |
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stop_streams(dice, AMDTP_IN_STREAM, tx_params); |
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stop_streams(dice, AMDTP_OUT_STREAM, rx_params); |
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|
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snd_dice_transaction_clear_enable(dice); |
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} |
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|
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int snd_dice_stream_reserve_duplex(struct snd_dice *dice, unsigned int rate, |
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unsigned int events_per_period, |
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unsigned int events_per_buffer) |
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{ |
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unsigned int curr_rate; |
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int err; |
|
|
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// Check sampling transmission frequency. |
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err = snd_dice_transaction_get_rate(dice, &curr_rate); |
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if (err < 0) |
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return err; |
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if (rate == 0) |
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rate = curr_rate; |
|
|
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if (dice->substreams_counter == 0 || curr_rate != rate) { |
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struct reg_params tx_params, rx_params; |
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|
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amdtp_domain_stop(&dice->domain); |
|
|
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err = get_register_params(dice, &tx_params, &rx_params); |
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if (err < 0) |
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return err; |
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finish_session(dice, &tx_params, &rx_params); |
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|
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release_resources(dice); |
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|
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// Just after owning the unit (GLOBAL_OWNER), the unit can |
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// return invalid stream formats. Selecting clock parameters |
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// have an effect for the unit to refine it. |
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err = ensure_phase_lock(dice, rate); |
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if (err < 0) |
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return err; |
|
|
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// After changing sampling transfer frequency, the value of |
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// register can be changed. |
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err = get_register_params(dice, &tx_params, &rx_params); |
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if (err < 0) |
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return err; |
|
|
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err = keep_dual_resources(dice, rate, AMDTP_IN_STREAM, |
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&tx_params); |
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if (err < 0) |
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goto error; |
|
|
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err = keep_dual_resources(dice, rate, AMDTP_OUT_STREAM, |
|
&rx_params); |
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if (err < 0) |
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goto error; |
|
|
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err = amdtp_domain_set_events_per_period(&dice->domain, |
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events_per_period, events_per_buffer); |
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if (err < 0) |
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goto error; |
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} |
|
|
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return 0; |
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error: |
|
release_resources(dice); |
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return err; |
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} |
|
|
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static int start_streams(struct snd_dice *dice, enum amdtp_stream_direction dir, |
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unsigned int rate, struct reg_params *params) |
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{ |
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unsigned int max_speed = fw_parent_device(dice->unit)->max_speed; |
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int i; |
|
int err; |
|
|
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for (i = 0; i < params->count; i++) { |
|
struct amdtp_stream *stream; |
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struct fw_iso_resources *resources; |
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__be32 reg; |
|
|
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if (dir == AMDTP_IN_STREAM) { |
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stream = dice->tx_stream + i; |
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resources = dice->tx_resources + i; |
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} else { |
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stream = dice->rx_stream + i; |
|
resources = dice->rx_resources + i; |
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} |
|
|
|
reg = cpu_to_be32(resources->channel); |
|
if (dir == AMDTP_IN_STREAM) { |
|
err = snd_dice_transaction_write_tx(dice, |
|
params->size * i + TX_ISOCHRONOUS, |
|
®, sizeof(reg)); |
|
} else { |
|
err = snd_dice_transaction_write_rx(dice, |
|
params->size * i + RX_ISOCHRONOUS, |
|
®, sizeof(reg)); |
|
} |
|
if (err < 0) |
|
return err; |
|
|
|
if (dir == AMDTP_IN_STREAM) { |
|
reg = cpu_to_be32(max_speed); |
|
err = snd_dice_transaction_write_tx(dice, |
|
params->size * i + TX_SPEED, |
|
®, sizeof(reg)); |
|
if (err < 0) |
|
return err; |
|
} |
|
|
|
err = amdtp_domain_add_stream(&dice->domain, stream, |
|
resources->channel, max_speed); |
|
if (err < 0) |
|
return err; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
/* |
|
* MEMO: After this function, there're two states of streams: |
|
* - None streams are running. |
|
* - All streams are running. |
|
*/ |
|
int snd_dice_stream_start_duplex(struct snd_dice *dice) |
|
{ |
|
unsigned int generation = dice->rx_resources[0].generation; |
|
struct reg_params tx_params, rx_params; |
|
unsigned int i; |
|
unsigned int rate; |
|
enum snd_dice_rate_mode mode; |
|
int err; |
|
|
|
if (dice->substreams_counter == 0) |
|
return -EIO; |
|
|
|
err = get_register_params(dice, &tx_params, &rx_params); |
|
if (err < 0) |
|
return err; |
|
|
|
// Check error of packet streaming. |
|
for (i = 0; i < MAX_STREAMS; ++i) { |
|
if (amdtp_streaming_error(&dice->tx_stream[i]) || |
|
amdtp_streaming_error(&dice->rx_stream[i])) { |
|
amdtp_domain_stop(&dice->domain); |
|
finish_session(dice, &tx_params, &rx_params); |
|
break; |
|
} |
|
} |
|
|
|
if (generation != fw_parent_device(dice->unit)->card->generation) { |
|
for (i = 0; i < MAX_STREAMS; ++i) { |
|
if (i < tx_params.count) |
|
fw_iso_resources_update(dice->tx_resources + i); |
|
if (i < rx_params.count) |
|
fw_iso_resources_update(dice->rx_resources + i); |
|
} |
|
} |
|
|
|
// Check required streams are running or not. |
|
err = snd_dice_transaction_get_rate(dice, &rate); |
|
if (err < 0) |
|
return err; |
|
err = snd_dice_stream_get_rate_mode(dice, rate, &mode); |
|
if (err < 0) |
|
return err; |
|
for (i = 0; i < MAX_STREAMS; ++i) { |
|
if (dice->tx_pcm_chs[i][mode] > 0 && |
|
!amdtp_stream_running(&dice->tx_stream[i])) |
|
break; |
|
if (dice->rx_pcm_chs[i][mode] > 0 && |
|
!amdtp_stream_running(&dice->rx_stream[i])) |
|
break; |
|
} |
|
if (i < MAX_STREAMS) { |
|
// Start both streams. |
|
err = start_streams(dice, AMDTP_IN_STREAM, rate, &tx_params); |
|
if (err < 0) |
|
goto error; |
|
|
|
err = start_streams(dice, AMDTP_OUT_STREAM, rate, &rx_params); |
|
if (err < 0) |
|
goto error; |
|
|
|
err = snd_dice_transaction_set_enable(dice); |
|
if (err < 0) { |
|
dev_err(&dice->unit->device, |
|
"fail to enable interface\n"); |
|
goto error; |
|
} |
|
|
|
err = amdtp_domain_start(&dice->domain, 0); |
|
if (err < 0) |
|
goto error; |
|
|
|
for (i = 0; i < MAX_STREAMS; i++) { |
|
if ((i < tx_params.count && |
|
!amdtp_stream_wait_callback(&dice->tx_stream[i], |
|
CALLBACK_TIMEOUT)) || |
|
(i < rx_params.count && |
|
!amdtp_stream_wait_callback(&dice->rx_stream[i], |
|
CALLBACK_TIMEOUT))) { |
|
err = -ETIMEDOUT; |
|
goto error; |
|
} |
|
} |
|
} |
|
|
|
return 0; |
|
error: |
|
amdtp_domain_stop(&dice->domain); |
|
finish_session(dice, &tx_params, &rx_params); |
|
return err; |
|
} |
|
|
|
/* |
|
* MEMO: After this function, there're two states of streams: |
|
* - None streams are running. |
|
* - All streams are running. |
|
*/ |
|
void snd_dice_stream_stop_duplex(struct snd_dice *dice) |
|
{ |
|
struct reg_params tx_params, rx_params; |
|
|
|
if (dice->substreams_counter == 0) { |
|
if (get_register_params(dice, &tx_params, &rx_params) >= 0) |
|
finish_session(dice, &tx_params, &rx_params); |
|
|
|
amdtp_domain_stop(&dice->domain); |
|
release_resources(dice); |
|
} |
|
} |
|
|
|
static int init_stream(struct snd_dice *dice, enum amdtp_stream_direction dir, |
|
unsigned int index) |
|
{ |
|
struct amdtp_stream *stream; |
|
struct fw_iso_resources *resources; |
|
int err; |
|
|
|
if (dir == AMDTP_IN_STREAM) { |
|
stream = &dice->tx_stream[index]; |
|
resources = &dice->tx_resources[index]; |
|
} else { |
|
stream = &dice->rx_stream[index]; |
|
resources = &dice->rx_resources[index]; |
|
} |
|
|
|
err = fw_iso_resources_init(resources, dice->unit); |
|
if (err < 0) |
|
goto end; |
|
resources->channels_mask = 0x00000000ffffffffuLL; |
|
|
|
err = amdtp_am824_init(stream, dice->unit, dir, CIP_BLOCKING); |
|
if (err < 0) { |
|
amdtp_stream_destroy(stream); |
|
fw_iso_resources_destroy(resources); |
|
} |
|
end: |
|
return err; |
|
} |
|
|
|
/* |
|
* This function should be called before starting streams or after stopping |
|
* streams. |
|
*/ |
|
static void destroy_stream(struct snd_dice *dice, |
|
enum amdtp_stream_direction dir, |
|
unsigned int index) |
|
{ |
|
struct amdtp_stream *stream; |
|
struct fw_iso_resources *resources; |
|
|
|
if (dir == AMDTP_IN_STREAM) { |
|
stream = &dice->tx_stream[index]; |
|
resources = &dice->tx_resources[index]; |
|
} else { |
|
stream = &dice->rx_stream[index]; |
|
resources = &dice->rx_resources[index]; |
|
} |
|
|
|
amdtp_stream_destroy(stream); |
|
fw_iso_resources_destroy(resources); |
|
} |
|
|
|
int snd_dice_stream_init_duplex(struct snd_dice *dice) |
|
{ |
|
int i, err; |
|
|
|
for (i = 0; i < MAX_STREAMS; i++) { |
|
err = init_stream(dice, AMDTP_IN_STREAM, i); |
|
if (err < 0) { |
|
for (; i >= 0; i--) |
|
destroy_stream(dice, AMDTP_IN_STREAM, i); |
|
goto end; |
|
} |
|
} |
|
|
|
for (i = 0; i < MAX_STREAMS; i++) { |
|
err = init_stream(dice, AMDTP_OUT_STREAM, i); |
|
if (err < 0) { |
|
for (; i >= 0; i--) |
|
destroy_stream(dice, AMDTP_OUT_STREAM, i); |
|
for (i = 0; i < MAX_STREAMS; i++) |
|
destroy_stream(dice, AMDTP_IN_STREAM, i); |
|
goto end; |
|
} |
|
} |
|
|
|
err = amdtp_domain_init(&dice->domain); |
|
if (err < 0) { |
|
for (i = 0; i < MAX_STREAMS; ++i) { |
|
destroy_stream(dice, AMDTP_OUT_STREAM, i); |
|
destroy_stream(dice, AMDTP_IN_STREAM, i); |
|
} |
|
} |
|
end: |
|
return err; |
|
} |
|
|
|
void snd_dice_stream_destroy_duplex(struct snd_dice *dice) |
|
{ |
|
unsigned int i; |
|
|
|
for (i = 0; i < MAX_STREAMS; i++) { |
|
destroy_stream(dice, AMDTP_IN_STREAM, i); |
|
destroy_stream(dice, AMDTP_OUT_STREAM, i); |
|
} |
|
|
|
amdtp_domain_destroy(&dice->domain); |
|
} |
|
|
|
void snd_dice_stream_update_duplex(struct snd_dice *dice) |
|
{ |
|
struct reg_params tx_params, rx_params; |
|
|
|
/* |
|
* On a bus reset, the DICE firmware disables streaming and then goes |
|
* off contemplating its own navel for hundreds of milliseconds before |
|
* it can react to any of our attempts to reenable streaming. This |
|
* means that we lose synchronization anyway, so we force our streams |
|
* to stop so that the application can restart them in an orderly |
|
* manner. |
|
*/ |
|
dice->global_enabled = false; |
|
|
|
if (get_register_params(dice, &tx_params, &rx_params) == 0) { |
|
amdtp_domain_stop(&dice->domain); |
|
|
|
stop_streams(dice, AMDTP_IN_STREAM, &tx_params); |
|
stop_streams(dice, AMDTP_OUT_STREAM, &rx_params); |
|
} |
|
} |
|
|
|
int snd_dice_stream_detect_current_formats(struct snd_dice *dice) |
|
{ |
|
unsigned int rate; |
|
enum snd_dice_rate_mode mode; |
|
__be32 reg[2]; |
|
struct reg_params tx_params, rx_params; |
|
int i; |
|
int err; |
|
|
|
/* If extended protocol is available, detect detail spec. */ |
|
err = snd_dice_detect_extension_formats(dice); |
|
if (err >= 0) |
|
return err; |
|
|
|
/* |
|
* Available stream format is restricted at current mode of sampling |
|
* clock. |
|
*/ |
|
err = snd_dice_transaction_get_rate(dice, &rate); |
|
if (err < 0) |
|
return err; |
|
|
|
err = snd_dice_stream_get_rate_mode(dice, rate, &mode); |
|
if (err < 0) |
|
return err; |
|
|
|
/* |
|
* Just after owning the unit (GLOBAL_OWNER), the unit can return |
|
* invalid stream formats. Selecting clock parameters have an effect |
|
* for the unit to refine it. |
|
*/ |
|
err = ensure_phase_lock(dice, rate); |
|
if (err < 0) |
|
return err; |
|
|
|
err = get_register_params(dice, &tx_params, &rx_params); |
|
if (err < 0) |
|
return err; |
|
|
|
for (i = 0; i < tx_params.count; ++i) { |
|
err = snd_dice_transaction_read_tx(dice, |
|
tx_params.size * i + TX_NUMBER_AUDIO, |
|
reg, sizeof(reg)); |
|
if (err < 0) |
|
return err; |
|
dice->tx_pcm_chs[i][mode] = be32_to_cpu(reg[0]); |
|
dice->tx_midi_ports[i] = max_t(unsigned int, |
|
be32_to_cpu(reg[1]), dice->tx_midi_ports[i]); |
|
} |
|
for (i = 0; i < rx_params.count; ++i) { |
|
err = snd_dice_transaction_read_rx(dice, |
|
rx_params.size * i + RX_NUMBER_AUDIO, |
|
reg, sizeof(reg)); |
|
if (err < 0) |
|
return err; |
|
dice->rx_pcm_chs[i][mode] = be32_to_cpu(reg[0]); |
|
dice->rx_midi_ports[i] = max_t(unsigned int, |
|
be32_to_cpu(reg[1]), dice->rx_midi_ports[i]); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static void dice_lock_changed(struct snd_dice *dice) |
|
{ |
|
dice->dev_lock_changed = true; |
|
wake_up(&dice->hwdep_wait); |
|
} |
|
|
|
int snd_dice_stream_lock_try(struct snd_dice *dice) |
|
{ |
|
int err; |
|
|
|
spin_lock_irq(&dice->lock); |
|
|
|
if (dice->dev_lock_count < 0) { |
|
err = -EBUSY; |
|
goto out; |
|
} |
|
|
|
if (dice->dev_lock_count++ == 0) |
|
dice_lock_changed(dice); |
|
err = 0; |
|
out: |
|
spin_unlock_irq(&dice->lock); |
|
return err; |
|
} |
|
|
|
void snd_dice_stream_lock_release(struct snd_dice *dice) |
|
{ |
|
spin_lock_irq(&dice->lock); |
|
|
|
if (WARN_ON(dice->dev_lock_count <= 0)) |
|
goto out; |
|
|
|
if (--dice->dev_lock_count == 0) |
|
dice_lock_changed(dice); |
|
out: |
|
spin_unlock_irq(&dice->lock); |
|
}
|
|
|