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147 lines
3.6 KiB
147 lines
3.6 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Support for the w100 frame buffer. |
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* |
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* Copyright (c) 2004-2005 Richard Purdie |
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* Copyright (c) 2005 Ian Molton |
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*/ |
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#define W100_GPIO_PORT_A 0 |
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#define W100_GPIO_PORT_B 1 |
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#define CLK_SRC_XTAL 0 |
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#define CLK_SRC_PLL 1 |
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struct w100fb_par; |
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unsigned long w100fb_gpio_read(int port); |
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void w100fb_gpio_write(int port, unsigned long value); |
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unsigned long w100fb_get_hsynclen(struct device *dev); |
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/* LCD Specific Routines and Config */ |
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struct w100_tg_info { |
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void (*change)(struct w100fb_par*); |
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void (*suspend)(struct w100fb_par*); |
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void (*resume)(struct w100fb_par*); |
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}; |
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/* General Platform Specific w100 Register Values */ |
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struct w100_gen_regs { |
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unsigned long lcd_format; |
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unsigned long lcdd_cntl1; |
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unsigned long lcdd_cntl2; |
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unsigned long genlcd_cntl1; |
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unsigned long genlcd_cntl2; |
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unsigned long genlcd_cntl3; |
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}; |
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struct w100_gpio_regs { |
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unsigned long init_data1; |
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unsigned long init_data2; |
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unsigned long gpio_dir1; |
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unsigned long gpio_oe1; |
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unsigned long gpio_dir2; |
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unsigned long gpio_oe2; |
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}; |
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/* Optional External Memory Configuration */ |
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struct w100_mem_info { |
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unsigned long ext_cntl; |
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unsigned long sdram_mode_reg; |
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unsigned long ext_timing_cntl; |
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unsigned long io_cntl; |
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unsigned int size; |
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}; |
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struct w100_bm_mem_info { |
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unsigned long ext_mem_bw; |
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unsigned long offset; |
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unsigned long ext_timing_ctl; |
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unsigned long ext_cntl; |
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unsigned long mode_reg; |
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unsigned long io_cntl; |
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unsigned long config; |
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}; |
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/* LCD Mode definition */ |
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struct w100_mode { |
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unsigned int xres; |
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unsigned int yres; |
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unsigned short left_margin; |
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unsigned short right_margin; |
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unsigned short upper_margin; |
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unsigned short lower_margin; |
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unsigned long crtc_ss; |
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unsigned long crtc_ls; |
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unsigned long crtc_gs; |
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unsigned long crtc_vpos_gs; |
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unsigned long crtc_rev; |
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unsigned long crtc_dclk; |
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unsigned long crtc_gclk; |
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unsigned long crtc_goe; |
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unsigned long crtc_ps1_active; |
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char pll_freq; |
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char fast_pll_freq; |
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int sysclk_src; |
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int sysclk_divider; |
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int pixclk_src; |
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int pixclk_divider; |
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int pixclk_divider_rotated; |
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}; |
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struct w100_pll_info { |
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uint16_t freq; /* desired Fout for PLL (Mhz) */ |
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uint8_t M; /* input divider */ |
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uint8_t N_int; /* VCO multiplier */ |
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uint8_t N_fac; /* VCO multiplier fractional part */ |
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uint8_t tfgoal; |
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uint8_t lock_time; |
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}; |
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/* Initial Video mode orientation flags */ |
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#define INIT_MODE_ROTATED 0x1 |
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#define INIT_MODE_FLIPPED 0x2 |
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/* |
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* This structure describes the machine which we are running on. |
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* It is set by machine specific code and used in the probe routine |
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* of drivers/video/w100fb.c |
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*/ |
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struct w100fb_mach_info { |
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/* General Platform Specific Registers */ |
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struct w100_gen_regs *regs; |
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/* Table of modes the LCD is capable of */ |
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struct w100_mode *modelist; |
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unsigned int num_modes; |
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/* Hooks for any platform specific tg/lcd code (optional) */ |
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struct w100_tg_info *tg; |
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/* External memory definition (if present) */ |
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struct w100_mem_info *mem; |
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/* Additional External memory definition (if present) */ |
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struct w100_bm_mem_info *bm_mem; |
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/* GPIO definitions (optional) */ |
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struct w100_gpio_regs *gpio; |
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/* Initial Mode flags */ |
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unsigned int init_mode; |
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/* Xtal Frequency */ |
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unsigned int xtal_freq; |
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/* Enable Xtal input doubler (1 == enable) */ |
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unsigned int xtal_dbl; |
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}; |
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/* General frame buffer data structure */ |
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struct w100fb_par { |
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unsigned int chip_id; |
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unsigned int xres; |
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unsigned int yres; |
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unsigned int extmem_active; |
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unsigned int flip; |
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unsigned int blanked; |
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unsigned int fastpll_mode; |
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unsigned long hsync_len; |
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struct w100_mode *mode; |
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struct w100_pll_info *pll_table; |
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struct w100fb_mach_info *mach; |
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uint32_t *saved_intmem; |
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uint32_t *saved_extmem; |
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};
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