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204 lines
6.5 KiB
204 lines
6.5 KiB
/* |
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* Copyright 2005 Stephane Marchesin. |
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* All Rights Reserved. |
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* |
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* Permission is hereby granted, free of charge, to any person obtaining a |
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* copy of this software and associated documentation files (the "Software"), |
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* to deal in the Software without restriction, including without limitation |
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* the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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* and/or sell copies of the Software, and to permit persons to whom the |
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* Software is furnished to do so, subject to the following conditions: |
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* |
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* The above copyright notice and this permission notice (including the next |
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* paragraph) shall be included in all copies or substantial portions of the |
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* Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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*/ |
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#ifndef __NOUVEAU_DRM_H__ |
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#define __NOUVEAU_DRM_H__ |
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#define DRM_NOUVEAU_EVENT_NVIF 0x80000000 |
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#include "drm.h" |
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#if defined(__cplusplus) |
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extern "C" { |
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#endif |
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#define NOUVEAU_GEM_DOMAIN_CPU (1 << 0) |
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#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1) |
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#define NOUVEAU_GEM_DOMAIN_GART (1 << 2) |
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#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3) |
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#define NOUVEAU_GEM_DOMAIN_COHERENT (1 << 4) |
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#define NOUVEAU_GEM_TILE_COMP 0x00030000 /* nv50-only */ |
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#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00 |
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#define NOUVEAU_GEM_TILE_16BPP 0x00000001 |
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#define NOUVEAU_GEM_TILE_32BPP 0x00000002 |
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#define NOUVEAU_GEM_TILE_ZETA 0x00000004 |
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#define NOUVEAU_GEM_TILE_NONCONTIG 0x00000008 |
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struct drm_nouveau_gem_info { |
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__u32 handle; |
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__u32 domain; |
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__u64 size; |
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__u64 offset; |
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__u64 map_handle; |
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__u32 tile_mode; |
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__u32 tile_flags; |
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}; |
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struct drm_nouveau_gem_new { |
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struct drm_nouveau_gem_info info; |
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__u32 channel_hint; |
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__u32 align; |
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}; |
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#define NOUVEAU_GEM_MAX_BUFFERS 1024 |
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struct drm_nouveau_gem_pushbuf_bo_presumed { |
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__u32 valid; |
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__u32 domain; |
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__u64 offset; |
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}; |
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struct drm_nouveau_gem_pushbuf_bo { |
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__u64 user_priv; |
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__u32 handle; |
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__u32 read_domains; |
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__u32 write_domains; |
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__u32 valid_domains; |
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struct drm_nouveau_gem_pushbuf_bo_presumed presumed; |
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}; |
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#define NOUVEAU_GEM_RELOC_LOW (1 << 0) |
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#define NOUVEAU_GEM_RELOC_HIGH (1 << 1) |
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#define NOUVEAU_GEM_RELOC_OR (1 << 2) |
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#define NOUVEAU_GEM_MAX_RELOCS 1024 |
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struct drm_nouveau_gem_pushbuf_reloc { |
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__u32 reloc_bo_index; |
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__u32 reloc_bo_offset; |
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__u32 bo_index; |
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__u32 flags; |
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__u32 data; |
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__u32 vor; |
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__u32 tor; |
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}; |
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#define NOUVEAU_GEM_MAX_PUSH 512 |
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struct drm_nouveau_gem_pushbuf_push { |
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__u32 bo_index; |
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__u32 pad; |
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__u64 offset; |
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__u64 length; |
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}; |
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struct drm_nouveau_gem_pushbuf { |
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__u32 channel; |
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__u32 nr_buffers; |
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__u64 buffers; |
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__u32 nr_relocs; |
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__u32 nr_push; |
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__u64 relocs; |
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__u64 push; |
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__u32 suffix0; |
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__u32 suffix1; |
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#define NOUVEAU_GEM_PUSHBUF_SYNC (1ULL << 0) |
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__u64 vram_available; |
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__u64 gart_available; |
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}; |
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#define NOUVEAU_GEM_CPU_PREP_NOWAIT 0x00000001 |
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#define NOUVEAU_GEM_CPU_PREP_WRITE 0x00000004 |
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struct drm_nouveau_gem_cpu_prep { |
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__u32 handle; |
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__u32 flags; |
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}; |
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struct drm_nouveau_gem_cpu_fini { |
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__u32 handle; |
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}; |
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#define DRM_NOUVEAU_GETPARAM 0x00 /* deprecated */ |
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#define DRM_NOUVEAU_SETPARAM 0x01 /* deprecated */ |
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#define DRM_NOUVEAU_CHANNEL_ALLOC 0x02 /* deprecated */ |
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#define DRM_NOUVEAU_CHANNEL_FREE 0x03 /* deprecated */ |
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#define DRM_NOUVEAU_GROBJ_ALLOC 0x04 /* deprecated */ |
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#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x05 /* deprecated */ |
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#define DRM_NOUVEAU_GPUOBJ_FREE 0x06 /* deprecated */ |
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#define DRM_NOUVEAU_NVIF 0x07 |
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#define DRM_NOUVEAU_SVM_INIT 0x08 |
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#define DRM_NOUVEAU_SVM_BIND 0x09 |
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#define DRM_NOUVEAU_GEM_NEW 0x40 |
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#define DRM_NOUVEAU_GEM_PUSHBUF 0x41 |
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#define DRM_NOUVEAU_GEM_CPU_PREP 0x42 |
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#define DRM_NOUVEAU_GEM_CPU_FINI 0x43 |
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#define DRM_NOUVEAU_GEM_INFO 0x44 |
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struct drm_nouveau_svm_init { |
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__u64 unmanaged_addr; |
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__u64 unmanaged_size; |
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}; |
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struct drm_nouveau_svm_bind { |
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__u64 header; |
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__u64 va_start; |
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__u64 va_end; |
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__u64 npages; |
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__u64 stride; |
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__u64 result; |
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__u64 reserved0; |
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__u64 reserved1; |
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}; |
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#define NOUVEAU_SVM_BIND_COMMAND_SHIFT 0 |
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#define NOUVEAU_SVM_BIND_COMMAND_BITS 8 |
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#define NOUVEAU_SVM_BIND_COMMAND_MASK ((1 << 8) - 1) |
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#define NOUVEAU_SVM_BIND_PRIORITY_SHIFT 8 |
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#define NOUVEAU_SVM_BIND_PRIORITY_BITS 8 |
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#define NOUVEAU_SVM_BIND_PRIORITY_MASK ((1 << 8) - 1) |
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#define NOUVEAU_SVM_BIND_TARGET_SHIFT 16 |
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#define NOUVEAU_SVM_BIND_TARGET_BITS 32 |
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#define NOUVEAU_SVM_BIND_TARGET_MASK 0xffffffff |
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/* |
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* Below is use to validate ioctl argument, userspace can also use it to make |
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* sure that no bit are set beyond known fields for a given kernel version. |
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*/ |
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#define NOUVEAU_SVM_BIND_VALID_BITS 48 |
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#define NOUVEAU_SVM_BIND_VALID_MASK ((1ULL << NOUVEAU_SVM_BIND_VALID_BITS) - 1) |
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/* |
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* NOUVEAU_BIND_COMMAND__MIGRATE: synchronous migrate to target memory. |
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* result: number of page successfuly migrate to the target memory. |
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*/ |
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#define NOUVEAU_SVM_BIND_COMMAND__MIGRATE 0 |
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/* |
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* NOUVEAU_SVM_BIND_HEADER_TARGET__GPU_VRAM: target the GPU VRAM memory. |
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*/ |
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#define NOUVEAU_SVM_BIND_TARGET__GPU_VRAM (1UL << 31) |
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#define DRM_IOCTL_NOUVEAU_SVM_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SVM_INIT, struct drm_nouveau_svm_init) |
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#define DRM_IOCTL_NOUVEAU_SVM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SVM_BIND, struct drm_nouveau_svm_bind) |
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#define DRM_IOCTL_NOUVEAU_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_gem_new) |
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#define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_PUSHBUF, struct drm_nouveau_gem_pushbuf) |
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#define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_PREP, struct drm_nouveau_gem_cpu_prep) |
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#define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_FINI, struct drm_nouveau_gem_cpu_fini) |
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#define DRM_IOCTL_NOUVEAU_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_INFO, struct drm_nouveau_gem_info) |
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#if defined(__cplusplus) |
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} |
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#endif |
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#endif /* __NOUVEAU_DRM_H__ */
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