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21 lines
465 B
21 lines
465 B
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* PLL clock driver for TI Davinci SoCs |
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* |
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* Copyright (C) 2018 David Lechner <[email protected]> |
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*/ |
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#ifndef __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ |
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#define __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ |
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#include <linux/regmap.h> |
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/** |
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* davinci_pll_platform_data |
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* @cfgchip: CFGCHIP syscon regmap |
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*/ |
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struct davinci_pll_platform_data { |
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struct regmap *cfgchip; |
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}; |
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#endif /* __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ */
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