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386 lines
9.9 KiB
386 lines
9.9 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* Copyright © 2000-2010 David Woodhouse <[email protected]> et al. |
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*/ |
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#ifndef __MTD_CFI_H__ |
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#define __MTD_CFI_H__ |
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#include <linux/delay.h> |
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#include <linux/types.h> |
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#include <linux/bug.h> |
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#include <linux/interrupt.h> |
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#include <linux/mtd/flashchip.h> |
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#include <linux/mtd/map.h> |
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#include <linux/mtd/cfi_endian.h> |
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#include <linux/mtd/xip.h> |
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#ifdef CONFIG_MTD_CFI_I1 |
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#define cfi_interleave(cfi) 1 |
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#define cfi_interleave_is_1(cfi) (cfi_interleave(cfi) == 1) |
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#else |
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#define cfi_interleave_is_1(cfi) (0) |
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#endif |
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#ifdef CONFIG_MTD_CFI_I2 |
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# ifdef cfi_interleave |
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# undef cfi_interleave |
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# define cfi_interleave(cfi) ((cfi)->interleave) |
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# else |
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# define cfi_interleave(cfi) 2 |
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# endif |
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#define cfi_interleave_is_2(cfi) (cfi_interleave(cfi) == 2) |
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#else |
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#define cfi_interleave_is_2(cfi) (0) |
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#endif |
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#ifdef CONFIG_MTD_CFI_I4 |
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# ifdef cfi_interleave |
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# undef cfi_interleave |
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# define cfi_interleave(cfi) ((cfi)->interleave) |
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# else |
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# define cfi_interleave(cfi) 4 |
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# endif |
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#define cfi_interleave_is_4(cfi) (cfi_interleave(cfi) == 4) |
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#else |
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#define cfi_interleave_is_4(cfi) (0) |
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#endif |
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#ifdef CONFIG_MTD_CFI_I8 |
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# ifdef cfi_interleave |
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# undef cfi_interleave |
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# define cfi_interleave(cfi) ((cfi)->interleave) |
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# else |
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# define cfi_interleave(cfi) 8 |
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# endif |
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#define cfi_interleave_is_8(cfi) (cfi_interleave(cfi) == 8) |
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#else |
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#define cfi_interleave_is_8(cfi) (0) |
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#endif |
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#ifndef cfi_interleave |
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#warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. |
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static inline int cfi_interleave(void *cfi) |
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{ |
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BUG(); |
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return 0; |
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} |
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#endif |
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static inline int cfi_interleave_supported(int i) |
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{ |
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switch (i) { |
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#ifdef CONFIG_MTD_CFI_I1 |
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case 1: |
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#endif |
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#ifdef CONFIG_MTD_CFI_I2 |
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case 2: |
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#endif |
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#ifdef CONFIG_MTD_CFI_I4 |
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case 4: |
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#endif |
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#ifdef CONFIG_MTD_CFI_I8 |
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case 8: |
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#endif |
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return 1; |
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default: |
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return 0; |
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} |
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} |
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/* NB: these values must represents the number of bytes needed to meet the |
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* device type (x8, x16, x32). Eg. a 32 bit device is 4 x 8 bytes. |
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* These numbers are used in calculations. |
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*/ |
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#define CFI_DEVICETYPE_X8 (8 / 8) |
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#define CFI_DEVICETYPE_X16 (16 / 8) |
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#define CFI_DEVICETYPE_X32 (32 / 8) |
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#define CFI_DEVICETYPE_X64 (64 / 8) |
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/* Device Interface Code Assignments from the "Common Flash Memory Interface |
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* Publication 100" dated December 1, 2001. |
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*/ |
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#define CFI_INTERFACE_X8_ASYNC 0x0000 |
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#define CFI_INTERFACE_X16_ASYNC 0x0001 |
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#define CFI_INTERFACE_X8_BY_X16_ASYNC 0x0002 |
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#define CFI_INTERFACE_X32_ASYNC 0x0003 |
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#define CFI_INTERFACE_X16_BY_X32_ASYNC 0x0005 |
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#define CFI_INTERFACE_NOT_ALLOWED 0xffff |
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/* NB: We keep these structures in memory in HOST byteorder, except |
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* where individually noted. |
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*/ |
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/* Basic Query Structure */ |
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struct cfi_ident { |
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uint8_t qry[3]; |
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uint16_t P_ID; |
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uint16_t P_ADR; |
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uint16_t A_ID; |
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uint16_t A_ADR; |
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uint8_t VccMin; |
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uint8_t VccMax; |
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uint8_t VppMin; |
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uint8_t VppMax; |
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uint8_t WordWriteTimeoutTyp; |
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uint8_t BufWriteTimeoutTyp; |
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uint8_t BlockEraseTimeoutTyp; |
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uint8_t ChipEraseTimeoutTyp; |
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uint8_t WordWriteTimeoutMax; |
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uint8_t BufWriteTimeoutMax; |
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uint8_t BlockEraseTimeoutMax; |
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uint8_t ChipEraseTimeoutMax; |
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uint8_t DevSize; |
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uint16_t InterfaceDesc; |
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uint16_t MaxBufWriteSize; |
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uint8_t NumEraseRegions; |
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uint32_t EraseRegionInfo[]; /* Not host ordered */ |
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} __packed; |
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/* Extended Query Structure for both PRI and ALT */ |
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struct cfi_extquery { |
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uint8_t pri[3]; |
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uint8_t MajorVersion; |
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uint8_t MinorVersion; |
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} __packed; |
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/* Vendor-Specific PRI for Intel/Sharp Extended Command Set (0x0001) */ |
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struct cfi_pri_intelext { |
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uint8_t pri[3]; |
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uint8_t MajorVersion; |
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uint8_t MinorVersion; |
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uint32_t FeatureSupport; /* if bit 31 is set then an additional uint32_t feature |
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block follows - FIXME - not currently supported */ |
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uint8_t SuspendCmdSupport; |
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uint16_t BlkStatusRegMask; |
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uint8_t VccOptimal; |
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uint8_t VppOptimal; |
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uint8_t NumProtectionFields; |
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uint16_t ProtRegAddr; |
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uint8_t FactProtRegSize; |
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uint8_t UserProtRegSize; |
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uint8_t extra[]; |
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} __packed; |
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struct cfi_intelext_otpinfo { |
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uint32_t ProtRegAddr; |
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uint16_t FactGroups; |
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uint8_t FactProtRegSize; |
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uint16_t UserGroups; |
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uint8_t UserProtRegSize; |
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} __packed; |
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struct cfi_intelext_blockinfo { |
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uint16_t NumIdentBlocks; |
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uint16_t BlockSize; |
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uint16_t MinBlockEraseCycles; |
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uint8_t BitsPerCell; |
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uint8_t BlockCap; |
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} __packed; |
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struct cfi_intelext_regioninfo { |
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uint16_t NumIdentPartitions; |
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uint8_t NumOpAllowed; |
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uint8_t NumOpAllowedSimProgMode; |
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uint8_t NumOpAllowedSimEraMode; |
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uint8_t NumBlockTypes; |
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struct cfi_intelext_blockinfo BlockTypes[1]; |
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} __packed; |
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struct cfi_intelext_programming_regioninfo { |
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uint8_t ProgRegShift; |
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uint8_t Reserved1; |
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uint8_t ControlValid; |
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uint8_t Reserved2; |
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uint8_t ControlInvalid; |
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uint8_t Reserved3; |
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} __packed; |
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/* Vendor-Specific PRI for AMD/Fujitsu Extended Command Set (0x0002) */ |
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struct cfi_pri_amdstd { |
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uint8_t pri[3]; |
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uint8_t MajorVersion; |
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uint8_t MinorVersion; |
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uint8_t SiliconRevision; /* bits 1-0: Address Sensitive Unlock */ |
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uint8_t EraseSuspend; |
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uint8_t BlkProt; |
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uint8_t TmpBlkUnprotect; |
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uint8_t BlkProtUnprot; |
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uint8_t SimultaneousOps; |
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uint8_t BurstMode; |
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uint8_t PageMode; |
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uint8_t VppMin; |
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uint8_t VppMax; |
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uint8_t TopBottom; |
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/* Below field are added from version 1.5 */ |
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uint8_t ProgramSuspend; |
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uint8_t UnlockBypass; |
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uint8_t SecureSiliconSector; |
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uint8_t SoftwareFeatures; |
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#define CFI_POLL_STATUS_REG BIT(0) |
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#define CFI_POLL_DQ BIT(1) |
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} __packed; |
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/* Vendor-Specific PRI for Atmel chips (command set 0x0002) */ |
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struct cfi_pri_atmel { |
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uint8_t pri[3]; |
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uint8_t MajorVersion; |
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uint8_t MinorVersion; |
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uint8_t Features; |
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uint8_t BottomBoot; |
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uint8_t BurstMode; |
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uint8_t PageMode; |
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} __packed; |
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struct cfi_pri_query { |
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uint8_t NumFields; |
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uint32_t ProtField[1]; /* Not host ordered */ |
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} __packed; |
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struct cfi_bri_query { |
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uint8_t PageModeReadCap; |
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uint8_t NumFields; |
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uint32_t ConfField[1]; /* Not host ordered */ |
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} __packed; |
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#define P_ID_NONE 0x0000 |
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#define P_ID_INTEL_EXT 0x0001 |
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#define P_ID_AMD_STD 0x0002 |
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#define P_ID_INTEL_STD 0x0003 |
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#define P_ID_AMD_EXT 0x0004 |
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#define P_ID_WINBOND 0x0006 |
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#define P_ID_ST_ADV 0x0020 |
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#define P_ID_MITSUBISHI_STD 0x0100 |
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#define P_ID_MITSUBISHI_EXT 0x0101 |
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#define P_ID_SST_PAGE 0x0102 |
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#define P_ID_SST_OLD 0x0701 |
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#define P_ID_INTEL_PERFORMANCE 0x0200 |
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#define P_ID_INTEL_DATA 0x0210 |
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#define P_ID_RESERVED 0xffff |
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#define CFI_MODE_CFI 1 |
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#define CFI_MODE_JEDEC 0 |
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struct cfi_private { |
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uint16_t cmdset; |
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void *cmdset_priv; |
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int interleave; |
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int device_type; |
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int cfi_mode; /* Are we a JEDEC device pretending to be CFI? */ |
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int addr_unlock1; |
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int addr_unlock2; |
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struct mtd_info *(*cmdset_setup)(struct map_info *); |
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struct cfi_ident *cfiq; /* For now only one. We insist that all devs |
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must be of the same type. */ |
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int mfr, id; |
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int numchips; |
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map_word sector_erase_cmd; |
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unsigned long chipshift; /* Because they're of the same type */ |
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const char *im_name; /* inter_module name for cmdset_setup */ |
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struct flchip chips[]; /* per-chip data structure for each chip */ |
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}; |
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uint32_t cfi_build_cmd_addr(uint32_t cmd_ofs, |
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struct map_info *map, struct cfi_private *cfi); |
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map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cfi_private *cfi); |
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#define CMD(x) cfi_build_cmd((x), map, cfi) |
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unsigned long cfi_merge_status(map_word val, struct map_info *map, |
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struct cfi_private *cfi); |
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#define MERGESTATUS(x) cfi_merge_status((x), map, cfi) |
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uint32_t cfi_send_gen_cmd(u_char cmd, uint32_t cmd_addr, uint32_t base, |
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struct map_info *map, struct cfi_private *cfi, |
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int type, map_word *prev_val); |
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static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr) |
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{ |
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map_word val = map_read(map, addr); |
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if (map_bankwidth_is_1(map)) { |
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return val.x[0]; |
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} else if (map_bankwidth_is_2(map)) { |
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return cfi16_to_cpu(map, val.x[0]); |
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} else { |
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/* No point in a 64-bit byteswap since that would just be |
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swapping the responses from different chips, and we are |
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only interested in one chip (a representative sample) */ |
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return cfi32_to_cpu(map, val.x[0]); |
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} |
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} |
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static inline uint16_t cfi_read_query16(struct map_info *map, uint32_t addr) |
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{ |
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map_word val = map_read(map, addr); |
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if (map_bankwidth_is_1(map)) { |
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return val.x[0] & 0xff; |
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} else if (map_bankwidth_is_2(map)) { |
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return cfi16_to_cpu(map, val.x[0]); |
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} else { |
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/* No point in a 64-bit byteswap since that would just be |
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swapping the responses from different chips, and we are |
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only interested in one chip (a representative sample) */ |
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return cfi32_to_cpu(map, val.x[0]); |
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} |
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} |
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void cfi_udelay(int us); |
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int __xipram cfi_qry_present(struct map_info *map, __u32 base, |
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struct cfi_private *cfi); |
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int __xipram cfi_qry_mode_on(uint32_t base, struct map_info *map, |
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struct cfi_private *cfi); |
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void __xipram cfi_qry_mode_off(uint32_t base, struct map_info *map, |
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struct cfi_private *cfi); |
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struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t size, |
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const char* name); |
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struct cfi_fixup { |
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uint16_t mfr; |
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uint16_t id; |
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void (*fixup)(struct mtd_info *mtd); |
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}; |
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#define CFI_MFR_ANY 0xFFFF |
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#define CFI_ID_ANY 0xFFFF |
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#define CFI_MFR_CONTINUATION 0x007F |
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#define CFI_MFR_AMD 0x0001 |
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#define CFI_MFR_AMIC 0x0037 |
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#define CFI_MFR_ATMEL 0x001F |
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#define CFI_MFR_EON 0x001C |
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#define CFI_MFR_FUJITSU 0x0004 |
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#define CFI_MFR_HYUNDAI 0x00AD |
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#define CFI_MFR_INTEL 0x0089 |
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#define CFI_MFR_MACRONIX 0x00C2 |
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#define CFI_MFR_NEC 0x0010 |
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#define CFI_MFR_PMC 0x009D |
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#define CFI_MFR_SAMSUNG 0x00EC |
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#define CFI_MFR_SHARP 0x00B0 |
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#define CFI_MFR_SST 0x00BF |
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#define CFI_MFR_ST 0x0020 /* STMicroelectronics */ |
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#define CFI_MFR_MICRON 0x002C /* Micron */ |
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#define CFI_MFR_TOSHIBA 0x0098 |
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#define CFI_MFR_WINBOND 0x00DA |
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void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup* fixups); |
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typedef int (*varsize_frob_t)(struct map_info *map, struct flchip *chip, |
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unsigned long adr, int len, void *thunk); |
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int cfi_varsize_frob(struct mtd_info *mtd, varsize_frob_t frob, |
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loff_t ofs, size_t len, void *thunk); |
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#endif /* __MTD_CFI_H__ */
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