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289 lines
8.2 KiB
289 lines
8.2 KiB
/* |
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* linux/mfd/tps65217.h |
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* |
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* Functions to access TPS65217 power management chip. |
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* |
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* Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation version 2. |
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* |
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any |
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* kind, whether express or implied; without even the implied warranty |
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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#ifndef __LINUX_MFD_TPS65217_H |
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#define __LINUX_MFD_TPS65217_H |
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#include <linux/i2c.h> |
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#include <linux/regulator/driver.h> |
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#include <linux/regulator/machine.h> |
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/* TPS chip id list */ |
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#define TPS65217 0xF0 |
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/* I2C ID for TPS65217 part */ |
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#define TPS65217_I2C_ID 0x24 |
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/* All register addresses */ |
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#define TPS65217_REG_CHIPID 0X00 |
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#define TPS65217_REG_PPATH 0X01 |
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#define TPS65217_REG_INT 0X02 |
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#define TPS65217_REG_CHGCONFIG0 0X03 |
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#define TPS65217_REG_CHGCONFIG1 0X04 |
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#define TPS65217_REG_CHGCONFIG2 0X05 |
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#define TPS65217_REG_CHGCONFIG3 0X06 |
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#define TPS65217_REG_WLEDCTRL1 0X07 |
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#define TPS65217_REG_WLEDCTRL2 0X08 |
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#define TPS65217_REG_MUXCTRL 0X09 |
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#define TPS65217_REG_STATUS 0X0A |
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#define TPS65217_REG_PASSWORD 0X0B |
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#define TPS65217_REG_PGOOD 0X0C |
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#define TPS65217_REG_DEFPG 0X0D |
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#define TPS65217_REG_DEFDCDC1 0X0E |
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#define TPS65217_REG_DEFDCDC2 0X0F |
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#define TPS65217_REG_DEFDCDC3 0X10 |
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#define TPS65217_REG_DEFSLEW 0X11 |
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#define TPS65217_REG_DEFLDO1 0X12 |
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#define TPS65217_REG_DEFLDO2 0X13 |
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#define TPS65217_REG_DEFLS1 0X14 |
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#define TPS65217_REG_DEFLS2 0X15 |
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#define TPS65217_REG_ENABLE 0X16 |
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#define TPS65217_REG_DEFUVLO 0X18 |
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#define TPS65217_REG_SEQ1 0X19 |
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#define TPS65217_REG_SEQ2 0X1A |
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#define TPS65217_REG_SEQ3 0X1B |
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#define TPS65217_REG_SEQ4 0X1C |
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#define TPS65217_REG_SEQ5 0X1D |
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#define TPS65217_REG_SEQ6 0X1E |
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#define TPS65217_REG_MAX TPS65217_REG_SEQ6 |
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/* Register field definitions */ |
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#define TPS65217_CHIPID_CHIP_MASK 0xF0 |
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#define TPS65217_CHIPID_REV_MASK 0x0F |
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#define TPS65217_PPATH_ACSINK_ENABLE BIT(7) |
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#define TPS65217_PPATH_USBSINK_ENABLE BIT(6) |
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#define TPS65217_PPATH_AC_PW_ENABLE BIT(5) |
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#define TPS65217_PPATH_USB_PW_ENABLE BIT(4) |
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#define TPS65217_PPATH_AC_CURRENT_MASK 0x0C |
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#define TPS65217_PPATH_USB_CURRENT_MASK 0x03 |
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#define TPS65217_INT_PBM BIT(6) |
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#define TPS65217_INT_ACM BIT(5) |
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#define TPS65217_INT_USBM BIT(4) |
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#define TPS65217_INT_PBI BIT(2) |
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#define TPS65217_INT_ACI BIT(1) |
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#define TPS65217_INT_USBI BIT(0) |
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#define TPS65217_INT_SHIFT 4 |
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#define TPS65217_INT_MASK (TPS65217_INT_PBM | TPS65217_INT_ACM | \ |
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TPS65217_INT_USBM) |
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#define TPS65217_CHGCONFIG0_TREG BIT(7) |
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#define TPS65217_CHGCONFIG0_DPPM BIT(6) |
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#define TPS65217_CHGCONFIG0_TSUSP BIT(5) |
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#define TPS65217_CHGCONFIG0_TERMI BIT(4) |
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#define TPS65217_CHGCONFIG0_ACTIVE BIT(3) |
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#define TPS65217_CHGCONFIG0_CHGTOUT BIT(2) |
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#define TPS65217_CHGCONFIG0_PCHGTOUT BIT(1) |
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#define TPS65217_CHGCONFIG0_BATTEMP BIT(0) |
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#define TPS65217_CHGCONFIG1_TMR_MASK 0xC0 |
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#define TPS65217_CHGCONFIG1_TMR_ENABLE BIT(5) |
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#define TPS65217_CHGCONFIG1_NTC_TYPE BIT(4) |
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#define TPS65217_CHGCONFIG1_RESET BIT(3) |
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#define TPS65217_CHGCONFIG1_TERM BIT(2) |
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#define TPS65217_CHGCONFIG1_SUSP BIT(1) |
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#define TPS65217_CHGCONFIG1_CHG_EN BIT(0) |
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#define TPS65217_CHGCONFIG2_DYNTMR BIT(7) |
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#define TPS65217_CHGCONFIG2_VPREGHG BIT(6) |
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#define TPS65217_CHGCONFIG2_VOREG_MASK 0x30 |
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#define TPS65217_CHGCONFIG3_ICHRG_MASK 0xC0 |
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#define TPS65217_CHGCONFIG3_DPPMTH_MASK 0x30 |
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#define TPS65217_CHGCONFIG2_PCHRGT BIT(3) |
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#define TPS65217_CHGCONFIG2_TERMIF 0x06 |
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#define TPS65217_CHGCONFIG2_TRANGE BIT(0) |
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#define TPS65217_WLEDCTRL1_ISINK_ENABLE BIT(3) |
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#define TPS65217_WLEDCTRL1_ISEL BIT(2) |
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#define TPS65217_WLEDCTRL1_FDIM_MASK 0x03 |
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#define TPS65217_WLEDCTRL2_DUTY_MASK 0x7F |
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#define TPS65217_MUXCTRL_MUX_MASK 0x07 |
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#define TPS65217_STATUS_OFF BIT(7) |
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#define TPS65217_STATUS_ACPWR BIT(3) |
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#define TPS65217_STATUS_USBPWR BIT(2) |
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#define TPS65217_STATUS_PB BIT(0) |
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#define TPS65217_PASSWORD_REGS_UNLOCK 0x7D |
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#define TPS65217_PGOOD_LDO3_PG BIT(6) |
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#define TPS65217_PGOOD_LDO4_PG BIT(5) |
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#define TPS65217_PGOOD_DC1_PG BIT(4) |
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#define TPS65217_PGOOD_DC2_PG BIT(3) |
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#define TPS65217_PGOOD_DC3_PG BIT(2) |
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#define TPS65217_PGOOD_LDO1_PG BIT(1) |
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#define TPS65217_PGOOD_LDO2_PG BIT(0) |
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#define TPS65217_DEFPG_LDO1PGM BIT(3) |
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#define TPS65217_DEFPG_LDO2PGM BIT(2) |
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#define TPS65217_DEFPG_PGDLY_MASK 0x03 |
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#define TPS65217_DEFDCDCX_XADJX BIT(7) |
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#define TPS65217_DEFDCDCX_DCDC_MASK 0x3F |
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#define TPS65217_DEFSLEW_GO BIT(7) |
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#define TPS65217_DEFSLEW_GODSBL BIT(6) |
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#define TPS65217_DEFSLEW_PFM_EN1 BIT(5) |
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#define TPS65217_DEFSLEW_PFM_EN2 BIT(4) |
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#define TPS65217_DEFSLEW_PFM_EN3 BIT(3) |
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#define TPS65217_DEFSLEW_SLEW_MASK 0x07 |
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#define TPS65217_DEFLDO1_LDO1_MASK 0x0F |
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#define TPS65217_DEFLDO2_TRACK BIT(6) |
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#define TPS65217_DEFLDO2_LDO2_MASK 0x3F |
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#define TPS65217_DEFLDO3_LDO3_EN BIT(5) |
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#define TPS65217_DEFLDO3_LDO3_MASK 0x1F |
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#define TPS65217_DEFLDO4_LDO4_EN BIT(5) |
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#define TPS65217_DEFLDO4_LDO4_MASK 0x1F |
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#define TPS65217_ENABLE_LS1_EN BIT(6) |
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#define TPS65217_ENABLE_LS2_EN BIT(5) |
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#define TPS65217_ENABLE_DC1_EN BIT(4) |
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#define TPS65217_ENABLE_DC2_EN BIT(3) |
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#define TPS65217_ENABLE_DC3_EN BIT(2) |
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#define TPS65217_ENABLE_LDO1_EN BIT(1) |
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#define TPS65217_ENABLE_LDO2_EN BIT(0) |
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#define TPS65217_DEFUVLO_UVLOHYS BIT(2) |
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#define TPS65217_DEFUVLO_UVLO_MASK 0x03 |
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#define TPS65217_SEQ1_DC1_SEQ_MASK 0xF0 |
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#define TPS65217_SEQ1_DC2_SEQ_MASK 0x0F |
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#define TPS65217_SEQ2_DC3_SEQ_MASK 0xF0 |
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#define TPS65217_SEQ2_LDO1_SEQ_MASK 0x0F |
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#define TPS65217_SEQ3_LDO2_SEQ_MASK 0xF0 |
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#define TPS65217_SEQ3_LDO3_SEQ_MASK 0x0F |
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#define TPS65217_SEQ4_LDO4_SEQ_MASK 0xF0 |
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#define TPS65217_SEQ5_DLY1_MASK 0xC0 |
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#define TPS65217_SEQ5_DLY2_MASK 0x30 |
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#define TPS65217_SEQ5_DLY3_MASK 0x0C |
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#define TPS65217_SEQ5_DLY4_MASK 0x03 |
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#define TPS65217_SEQ6_DLY5_MASK 0xC0 |
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#define TPS65217_SEQ6_DLY6_MASK 0x30 |
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#define TPS65217_SEQ6_SEQUP BIT(2) |
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#define TPS65217_SEQ6_SEQDWN BIT(1) |
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#define TPS65217_SEQ6_INSTDWN BIT(0) |
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#define TPS65217_MAX_REGISTER 0x1E |
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#define TPS65217_PROTECT_NONE 0 |
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#define TPS65217_PROTECT_L1 1 |
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#define TPS65217_PROTECT_L2 2 |
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enum tps65217_regulator_id { |
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/* DCDC's */ |
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TPS65217_DCDC_1, |
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TPS65217_DCDC_2, |
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TPS65217_DCDC_3, |
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/* LDOs */ |
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TPS65217_LDO_1, |
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TPS65217_LDO_2, |
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TPS65217_LDO_3, |
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TPS65217_LDO_4, |
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}; |
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#define TPS65217_MAX_REG_ID TPS65217_LDO_4 |
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/* Number of step-down converters available */ |
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#define TPS65217_NUM_DCDC 3 |
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/* Number of LDO voltage regulators available */ |
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#define TPS65217_NUM_LDO 4 |
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/* Number of total regulators available */ |
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#define TPS65217_NUM_REGULATOR (TPS65217_NUM_DCDC + TPS65217_NUM_LDO) |
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enum tps65217_bl_isel { |
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TPS65217_BL_ISET1 = 1, |
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TPS65217_BL_ISET2, |
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}; |
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enum tps65217_bl_fdim { |
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TPS65217_BL_FDIM_100HZ, |
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TPS65217_BL_FDIM_200HZ, |
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TPS65217_BL_FDIM_500HZ, |
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TPS65217_BL_FDIM_1000HZ, |
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}; |
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struct tps65217_bl_pdata { |
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enum tps65217_bl_isel isel; |
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enum tps65217_bl_fdim fdim; |
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int dft_brightness; |
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}; |
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/* Interrupt numbers */ |
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#define TPS65217_IRQ_USB 0 |
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#define TPS65217_IRQ_AC 1 |
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#define TPS65217_IRQ_PB 2 |
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#define TPS65217_NUM_IRQ 3 |
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/** |
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* struct tps65217_board - packages regulator init data |
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* @tps65217_regulator_data: regulator initialization values |
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* |
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* Board data may be used to initialize regulator. |
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*/ |
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struct tps65217_board { |
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struct regulator_init_data *tps65217_init_data[TPS65217_NUM_REGULATOR]; |
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struct device_node *of_node[TPS65217_NUM_REGULATOR]; |
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struct tps65217_bl_pdata *bl_pdata; |
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}; |
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/** |
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* struct tps65217 - tps65217 sub-driver chip access routines |
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* |
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* Device data may be used to access the TPS65217 chip |
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*/ |
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struct tps65217 { |
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struct device *dev; |
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struct tps65217_board *pdata; |
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struct regulator_desc desc[TPS65217_NUM_REGULATOR]; |
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struct regmap *regmap; |
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u8 *strobes; |
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struct irq_domain *irq_domain; |
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struct mutex irq_lock; |
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u8 irq_mask; |
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int irq; |
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}; |
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static inline struct tps65217 *dev_to_tps65217(struct device *dev) |
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{ |
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return dev_get_drvdata(dev); |
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} |
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int tps65217_reg_read(struct tps65217 *tps, unsigned int reg, |
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unsigned int *val); |
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int tps65217_reg_write(struct tps65217 *tps, unsigned int reg, |
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unsigned int val, unsigned int level); |
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int tps65217_set_bits(struct tps65217 *tps, unsigned int reg, |
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unsigned int mask, unsigned int val, unsigned int level); |
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int tps65217_clear_bits(struct tps65217 *tps, unsigned int reg, |
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unsigned int mask, unsigned int level); |
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#endif /* __LINUX_MFD_TPS65217_H */
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