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119 lines
4.5 KiB
119 lines
4.5 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* Atmel SMC (Static Memory Controller) register offsets and bit definitions. |
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* |
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* Copyright (C) 2014 Atmel |
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* Copyright (C) 2014 Free Electrons |
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* |
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* Author: Boris Brezillon <[email protected]> |
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*/ |
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#ifndef _LINUX_MFD_SYSCON_ATMEL_SMC_H_ |
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#define _LINUX_MFD_SYSCON_ATMEL_SMC_H_ |
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#include <linux/kernel.h> |
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#include <linux/of.h> |
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#include <linux/regmap.h> |
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#define ATMEL_SMC_SETUP(cs) (((cs) * 0x10)) |
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#define ATMEL_HSMC_SETUP(layout, cs) \ |
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((layout)->timing_regs_offset + ((cs) * 0x14)) |
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#define ATMEL_SMC_PULSE(cs) (((cs) * 0x10) + 0x4) |
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#define ATMEL_HSMC_PULSE(layout, cs) \ |
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((layout)->timing_regs_offset + ((cs) * 0x14) + 0x4) |
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#define ATMEL_SMC_CYCLE(cs) (((cs) * 0x10) + 0x8) |
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#define ATMEL_HSMC_CYCLE(layout, cs) \ |
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((layout)->timing_regs_offset + ((cs) * 0x14) + 0x8) |
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#define ATMEL_SMC_NWE_SHIFT 0 |
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#define ATMEL_SMC_NCS_WR_SHIFT 8 |
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#define ATMEL_SMC_NRD_SHIFT 16 |
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#define ATMEL_SMC_NCS_RD_SHIFT 24 |
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#define ATMEL_SMC_MODE(cs) (((cs) * 0x10) + 0xc) |
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#define ATMEL_HSMC_MODE(layout, cs) \ |
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((layout)->timing_regs_offset + ((cs) * 0x14) + 0x10) |
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#define ATMEL_SMC_MODE_READMODE_MASK BIT(0) |
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#define ATMEL_SMC_MODE_READMODE_NCS (0 << 0) |
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#define ATMEL_SMC_MODE_READMODE_NRD (1 << 0) |
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#define ATMEL_SMC_MODE_WRITEMODE_MASK BIT(1) |
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#define ATMEL_SMC_MODE_WRITEMODE_NCS (0 << 1) |
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#define ATMEL_SMC_MODE_WRITEMODE_NWE (1 << 1) |
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#define ATMEL_SMC_MODE_EXNWMODE_MASK GENMASK(5, 4) |
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#define ATMEL_SMC_MODE_EXNWMODE_DISABLE (0 << 4) |
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#define ATMEL_SMC_MODE_EXNWMODE_FROZEN (2 << 4) |
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#define ATMEL_SMC_MODE_EXNWMODE_READY (3 << 4) |
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#define ATMEL_SMC_MODE_BAT_MASK BIT(8) |
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#define ATMEL_SMC_MODE_BAT_SELECT (0 << 8) |
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#define ATMEL_SMC_MODE_BAT_WRITE (1 << 8) |
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#define ATMEL_SMC_MODE_DBW_MASK GENMASK(13, 12) |
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#define ATMEL_SMC_MODE_DBW_8 (0 << 12) |
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#define ATMEL_SMC_MODE_DBW_16 (1 << 12) |
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#define ATMEL_SMC_MODE_DBW_32 (2 << 12) |
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#define ATMEL_SMC_MODE_TDF_MASK GENMASK(19, 16) |
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#define ATMEL_SMC_MODE_TDF(x) (((x) - 1) << 16) |
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#define ATMEL_SMC_MODE_TDF_MAX 16 |
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#define ATMEL_SMC_MODE_TDF_MIN 1 |
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#define ATMEL_SMC_MODE_TDFMODE_OPTIMIZED BIT(20) |
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#define ATMEL_SMC_MODE_PMEN BIT(24) |
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#define ATMEL_SMC_MODE_PS_MASK GENMASK(29, 28) |
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#define ATMEL_SMC_MODE_PS_4 (0 << 28) |
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#define ATMEL_SMC_MODE_PS_8 (1 << 28) |
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#define ATMEL_SMC_MODE_PS_16 (2 << 28) |
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#define ATMEL_SMC_MODE_PS_32 (3 << 28) |
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#define ATMEL_HSMC_TIMINGS(layout, cs) \ |
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((layout)->timing_regs_offset + ((cs) * 0x14) + 0xc) |
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#define ATMEL_HSMC_TIMINGS_OCMS BIT(12) |
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#define ATMEL_HSMC_TIMINGS_RBNSEL(x) ((x) << 28) |
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#define ATMEL_HSMC_TIMINGS_NFSEL BIT(31) |
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#define ATMEL_HSMC_TIMINGS_TCLR_SHIFT 0 |
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#define ATMEL_HSMC_TIMINGS_TADL_SHIFT 4 |
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#define ATMEL_HSMC_TIMINGS_TAR_SHIFT 8 |
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#define ATMEL_HSMC_TIMINGS_TRR_SHIFT 16 |
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#define ATMEL_HSMC_TIMINGS_TWB_SHIFT 24 |
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struct atmel_hsmc_reg_layout { |
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unsigned int timing_regs_offset; |
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}; |
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/** |
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* struct atmel_smc_cs_conf - SMC CS config as described in the datasheet. |
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* @setup: NCS/NWE/NRD setup timings (not applicable to at91rm9200) |
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* @pulse: NCS/NWE/NRD pulse timings (not applicable to at91rm9200) |
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* @cycle: NWE/NRD cycle timings (not applicable to at91rm9200) |
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* @timings: advanced NAND related timings (only applicable to HSMC) |
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* @mode: all kind of config parameters (see the fields definition above). |
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* The mode fields are different on at91rm9200 |
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*/ |
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struct atmel_smc_cs_conf { |
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u32 setup; |
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u32 pulse; |
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u32 cycle; |
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u32 timings; |
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u32 mode; |
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}; |
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void atmel_smc_cs_conf_init(struct atmel_smc_cs_conf *conf); |
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int atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf *conf, |
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unsigned int shift, |
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unsigned int ncycles); |
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int atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf *conf, |
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unsigned int shift, unsigned int ncycles); |
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int atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf *conf, |
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unsigned int shift, unsigned int ncycles); |
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int atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf, |
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unsigned int shift, unsigned int ncycles); |
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void atmel_smc_cs_conf_apply(struct regmap *regmap, int cs, |
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const struct atmel_smc_cs_conf *conf); |
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void atmel_hsmc_cs_conf_apply(struct regmap *regmap, |
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const struct atmel_hsmc_reg_layout *reglayout, |
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int cs, const struct atmel_smc_cs_conf *conf); |
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void atmel_smc_cs_conf_get(struct regmap *regmap, int cs, |
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struct atmel_smc_cs_conf *conf); |
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void atmel_hsmc_cs_conf_get(struct regmap *regmap, |
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const struct atmel_hsmc_reg_layout *reglayout, |
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int cs, struct atmel_smc_cs_conf *conf); |
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const struct atmel_hsmc_reg_layout * |
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atmel_hsmc_get_reg_layout(struct device_node *np); |
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#endif /* _LINUX_MFD_SYSCON_ATMEL_SMC_H_ */
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