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254 lines
8.0 KiB
254 lines
8.0 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef __IO_PGTABLE_H |
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#define __IO_PGTABLE_H |
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#include <linux/bitops.h> |
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#include <linux/iommu.h> |
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/* |
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* Public API for use by IOMMU drivers |
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*/ |
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enum io_pgtable_fmt { |
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ARM_32_LPAE_S1, |
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ARM_32_LPAE_S2, |
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ARM_64_LPAE_S1, |
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ARM_64_LPAE_S2, |
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ARM_V7S, |
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ARM_MALI_LPAE, |
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AMD_IOMMU_V1, |
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IO_PGTABLE_NUM_FMTS, |
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}; |
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/** |
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* struct iommu_flush_ops - IOMMU callbacks for TLB and page table management. |
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* |
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* @tlb_flush_all: Synchronously invalidate the entire TLB context. |
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* @tlb_flush_walk: Synchronously invalidate all intermediate TLB state |
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* (sometimes referred to as the "walk cache") for a virtual |
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* address range. |
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* @tlb_add_page: Optional callback to queue up leaf TLB invalidation for a |
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* single page. IOMMUs that cannot batch TLB invalidation |
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* operations efficiently will typically issue them here, but |
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* others may decide to update the iommu_iotlb_gather structure |
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* and defer the invalidation until iommu_iotlb_sync() instead. |
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* |
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* Note that these can all be called in atomic context and must therefore |
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* not block. |
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*/ |
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struct iommu_flush_ops { |
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void (*tlb_flush_all)(void *cookie); |
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void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule, |
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void *cookie); |
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void (*tlb_add_page)(struct iommu_iotlb_gather *gather, |
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unsigned long iova, size_t granule, void *cookie); |
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}; |
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/** |
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* struct io_pgtable_cfg - Configuration data for a set of page tables. |
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* |
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* @quirks: A bitmap of hardware quirks that require some special |
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* action by the low-level page table allocator. |
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* @pgsize_bitmap: A bitmap of page sizes supported by this set of page |
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* tables. |
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* @ias: Input address (iova) size, in bits. |
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* @oas: Output address (paddr) size, in bits. |
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* @coherent_walk A flag to indicate whether or not page table walks made |
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* by the IOMMU are coherent with the CPU caches. |
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* @tlb: TLB management callbacks for this set of tables. |
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* @iommu_dev: The device representing the DMA configuration for the |
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* page table walker. |
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*/ |
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struct io_pgtable_cfg { |
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/* |
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* IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in |
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* stage 1 PTEs, for hardware which insists on validating them |
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* even in non-secure state where they should normally be ignored. |
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* |
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* IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and |
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* IOMMU_NOEXEC flags and map everything with full access, for |
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* hardware which does not implement the permissions of a given |
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* format, and/or requires some format-specific default value. |
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* |
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* IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend |
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* to support up to 35 bits PA where the bit32, bit33 and bit34 are |
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* encoded in the bit9, bit4 and bit5 of the PTE respectively. |
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* |
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* IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs |
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* on unmap, for DMA domains using the flush queue mechanism for |
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* delayed invalidation. |
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* |
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* IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table |
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* for use in the upper half of a split address space. |
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* |
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* IO_PGTABLE_QUIRK_ARM_OUTER_WBWA: Override the outer-cacheability |
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* attributes set in the TCR for a non-coherent page-table walker. |
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*/ |
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#define IO_PGTABLE_QUIRK_ARM_NS BIT(0) |
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#define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) |
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#define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3) |
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#define IO_PGTABLE_QUIRK_NON_STRICT BIT(4) |
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#define IO_PGTABLE_QUIRK_ARM_TTBR1 BIT(5) |
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#define IO_PGTABLE_QUIRK_ARM_OUTER_WBWA BIT(6) |
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unsigned long quirks; |
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unsigned long pgsize_bitmap; |
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unsigned int ias; |
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unsigned int oas; |
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bool coherent_walk; |
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const struct iommu_flush_ops *tlb; |
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struct device *iommu_dev; |
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/* Low-level data specific to the table format */ |
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union { |
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struct { |
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u64 ttbr; |
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struct { |
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u32 ips:3; |
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u32 tg:2; |
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u32 sh:2; |
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u32 orgn:2; |
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u32 irgn:2; |
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u32 tsz:6; |
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} tcr; |
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u64 mair; |
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} arm_lpae_s1_cfg; |
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struct { |
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u64 vttbr; |
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struct { |
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u32 ps:3; |
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u32 tg:2; |
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u32 sh:2; |
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u32 orgn:2; |
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u32 irgn:2; |
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u32 sl:2; |
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u32 tsz:6; |
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} vtcr; |
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} arm_lpae_s2_cfg; |
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struct { |
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u32 ttbr; |
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u32 tcr; |
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u32 nmrr; |
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u32 prrr; |
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} arm_v7s_cfg; |
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struct { |
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u64 transtab; |
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u64 memattr; |
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} arm_mali_lpae_cfg; |
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}; |
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}; |
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/** |
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* struct io_pgtable_ops - Page table manipulation API for IOMMU drivers. |
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* |
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* @map: Map a physically contiguous memory region. |
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* @unmap: Unmap a physically contiguous memory region. |
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* @iova_to_phys: Translate iova to physical address. |
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* |
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* These functions map directly onto the iommu_ops member functions with |
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* the same names. |
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*/ |
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struct io_pgtable_ops { |
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int (*map)(struct io_pgtable_ops *ops, unsigned long iova, |
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phys_addr_t paddr, size_t size, int prot, gfp_t gfp); |
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size_t (*unmap)(struct io_pgtable_ops *ops, unsigned long iova, |
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size_t size, struct iommu_iotlb_gather *gather); |
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phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops, |
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unsigned long iova); |
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}; |
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/** |
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* alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU. |
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* |
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* @fmt: The page table format. |
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* @cfg: The page table configuration. This will be modified to represent |
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* the configuration actually provided by the allocator (e.g. the |
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* pgsize_bitmap may be restricted). |
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* @cookie: An opaque token provided by the IOMMU driver and passed back to |
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* the callback routines in cfg->tlb. |
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*/ |
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struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt, |
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struct io_pgtable_cfg *cfg, |
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void *cookie); |
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/** |
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* free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller |
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* *must* ensure that the page table is no longer |
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* live, but the TLB can be dirty. |
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* |
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* @ops: The ops returned from alloc_io_pgtable_ops. |
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*/ |
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void free_io_pgtable_ops(struct io_pgtable_ops *ops); |
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/* |
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* Internal structures for page table allocator implementations. |
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*/ |
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/** |
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* struct io_pgtable - Internal structure describing a set of page tables. |
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* |
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* @fmt: The page table format. |
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* @cookie: An opaque token provided by the IOMMU driver and passed back to |
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* any callback routines. |
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* @cfg: A copy of the page table configuration. |
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* @ops: The page table operations in use for this set of page tables. |
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*/ |
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struct io_pgtable { |
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enum io_pgtable_fmt fmt; |
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void *cookie; |
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struct io_pgtable_cfg cfg; |
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struct io_pgtable_ops ops; |
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}; |
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#define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops) |
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struct io_pgtable_domain_attr { |
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unsigned long quirks; |
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}; |
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static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop) |
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{ |
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if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_all) |
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iop->cfg.tlb->tlb_flush_all(iop->cookie); |
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} |
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static inline void |
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io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova, |
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size_t size, size_t granule) |
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{ |
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if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_walk) |
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iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie); |
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} |
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static inline void |
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io_pgtable_tlb_add_page(struct io_pgtable *iop, |
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struct iommu_iotlb_gather * gather, unsigned long iova, |
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size_t granule) |
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{ |
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if (iop->cfg.tlb && iop->cfg.tlb->tlb_add_page) |
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iop->cfg.tlb->tlb_add_page(gather, iova, granule, iop->cookie); |
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} |
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/** |
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* struct io_pgtable_init_fns - Alloc/free a set of page tables for a |
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* particular format. |
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* |
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* @alloc: Allocate a set of page tables described by cfg. |
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* @free: Free the page tables associated with iop. |
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*/ |
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struct io_pgtable_init_fns { |
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struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie); |
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void (*free)(struct io_pgtable *iop); |
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}; |
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extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns; |
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extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns; |
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extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns; |
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extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns; |
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extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns; |
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extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns; |
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extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v1_init_fns; |
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#endif /* __IO_PGTABLE_H */
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