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111 lines
2.6 KiB
111 lines
2.6 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef __HPET__ |
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#define __HPET__ 1 |
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#include <uapi/linux/hpet.h> |
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/* |
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* Offsets into HPET Registers |
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*/ |
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struct hpet { |
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u64 hpet_cap; /* capabilities */ |
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u64 res0; /* reserved */ |
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u64 hpet_config; /* configuration */ |
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u64 res1; /* reserved */ |
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u64 hpet_isr; /* interrupt status reg */ |
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u64 res2[25]; /* reserved */ |
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union { /* main counter */ |
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u64 _hpet_mc64; |
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u32 _hpet_mc32; |
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unsigned long _hpet_mc; |
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} _u0; |
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u64 res3; /* reserved */ |
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struct hpet_timer { |
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u64 hpet_config; /* configuration/cap */ |
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union { /* timer compare register */ |
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u64 _hpet_hc64; |
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u32 _hpet_hc32; |
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unsigned long _hpet_compare; |
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} _u1; |
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u64 hpet_fsb[2]; /* FSB route */ |
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} hpet_timers[1]; |
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}; |
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#define hpet_mc _u0._hpet_mc |
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#define hpet_compare _u1._hpet_compare |
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#define HPET_MAX_TIMERS (32) |
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#define HPET_MAX_IRQ (32) |
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/* |
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* HPET general capabilities register |
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*/ |
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#define HPET_COUNTER_CLK_PERIOD_MASK (0xffffffff00000000ULL) |
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#define HPET_COUNTER_CLK_PERIOD_SHIFT (32UL) |
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#define HPET_VENDOR_ID_MASK (0x00000000ffff0000ULL) |
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#define HPET_VENDOR_ID_SHIFT (16ULL) |
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#define HPET_LEG_RT_CAP_MASK (0x8000) |
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#define HPET_COUNTER_SIZE_MASK (0x2000) |
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#define HPET_NUM_TIM_CAP_MASK (0x1f00) |
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#define HPET_NUM_TIM_CAP_SHIFT (8ULL) |
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/* |
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* HPET general configuration register |
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*/ |
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#define HPET_LEG_RT_CNF_MASK (2UL) |
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#define HPET_ENABLE_CNF_MASK (1UL) |
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/* |
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* Timer configuration register |
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*/ |
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#define Tn_INT_ROUTE_CAP_MASK (0xffffffff00000000ULL) |
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#define Tn_INT_ROUTE_CAP_SHIFT (32UL) |
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#define Tn_FSB_INT_DELCAP_MASK (0x8000UL) |
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#define Tn_FSB_INT_DELCAP_SHIFT (15) |
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#define Tn_FSB_EN_CNF_MASK (0x4000UL) |
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#define Tn_FSB_EN_CNF_SHIFT (14) |
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#define Tn_INT_ROUTE_CNF_MASK (0x3e00UL) |
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#define Tn_INT_ROUTE_CNF_SHIFT (9) |
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#define Tn_32MODE_CNF_MASK (0x0100UL) |
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#define Tn_VAL_SET_CNF_MASK (0x0040UL) |
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#define Tn_SIZE_CAP_MASK (0x0020UL) |
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#define Tn_PER_INT_CAP_MASK (0x0010UL) |
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#define Tn_TYPE_CNF_MASK (0x0008UL) |
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#define Tn_INT_ENB_CNF_MASK (0x0004UL) |
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#define Tn_INT_TYPE_CNF_MASK (0x0002UL) |
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/* |
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* Timer FSB Interrupt Route Register |
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*/ |
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#define Tn_FSB_INT_ADDR_MASK (0xffffffff00000000ULL) |
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#define Tn_FSB_INT_ADDR_SHIFT (32UL) |
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#define Tn_FSB_INT_VAL_MASK (0x00000000ffffffffULL) |
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/* |
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* exported interfaces |
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*/ |
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struct hpet_data { |
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unsigned long hd_phys_address; |
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void __iomem *hd_address; |
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unsigned short hd_nirqs; |
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unsigned int hd_state; /* timer allocated */ |
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unsigned int hd_irq[HPET_MAX_TIMERS]; |
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}; |
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static inline void hpet_reserve_timer(struct hpet_data *hd, int timer) |
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{ |
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hd->hd_state |= (1 << timer); |
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return; |
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} |
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int hpet_alloc(struct hpet_data *); |
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#endif /* !__HPET__ */
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