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446 lines
12 KiB
446 lines
12 KiB
/* |
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* intel_quark_dts_thermal.c |
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* |
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* This file is provided under a dual BSD/GPLv2 license. When using or |
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* redistributing this file, you may do so under either license. |
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* |
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* GPL LICENSE SUMMARY |
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* |
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* Copyright(c) 2015 Intel Corporation. |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of version 2 of the GNU General Public License as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* General Public License for more details. |
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* |
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* Contact Information: |
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* Ong Boon Leong <[email protected]> |
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* Intel Malaysia, Penang |
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* |
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* BSD LICENSE |
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* |
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* Copyright(c) 2015 Intel Corporation. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* * Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* * Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* * Neither the name of Intel Corporation nor the names of its |
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* contributors may be used to endorse or promote products derived |
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* from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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* Quark DTS thermal driver is implemented by referencing |
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* intel_soc_dts_thermal.c. |
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*/ |
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
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#include <linux/module.h> |
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#include <linux/slab.h> |
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#include <linux/interrupt.h> |
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#include <linux/thermal.h> |
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#include <asm/cpu_device_id.h> |
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#include <asm/iosf_mbi.h> |
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/* DTS reset is programmed via QRK_MBI_UNIT_SOC */ |
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#define QRK_DTS_REG_OFFSET_RESET 0x34 |
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#define QRK_DTS_RESET_BIT BIT(0) |
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/* DTS enable is programmed via QRK_MBI_UNIT_RMU */ |
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#define QRK_DTS_REG_OFFSET_ENABLE 0xB0 |
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#define QRK_DTS_ENABLE_BIT BIT(15) |
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/* Temperature Register is read via QRK_MBI_UNIT_RMU */ |
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#define QRK_DTS_REG_OFFSET_TEMP 0xB1 |
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#define QRK_DTS_MASK_TEMP 0xFF |
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#define QRK_DTS_OFFSET_TEMP 0 |
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#define QRK_DTS_OFFSET_REL_TEMP 16 |
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#define QRK_DTS_TEMP_BASE 50 |
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/* Programmable Trip Point Register is configured via QRK_MBI_UNIT_RMU */ |
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#define QRK_DTS_REG_OFFSET_PTPS 0xB2 |
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#define QRK_DTS_MASK_TP_THRES 0xFF |
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#define QRK_DTS_SHIFT_TP 8 |
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#define QRK_DTS_ID_TP_CRITICAL 0 |
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#define QRK_DTS_SAFE_TP_THRES 105 |
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/* Thermal Sensor Register Lock */ |
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#define QRK_DTS_REG_OFFSET_LOCK 0x71 |
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#define QRK_DTS_LOCK_BIT BIT(5) |
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/* Quark DTS has 2 trip points: hot & catastrophic */ |
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#define QRK_MAX_DTS_TRIPS 2 |
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/* If DTS not locked, all trip points are configurable */ |
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#define QRK_DTS_WR_MASK_SET 0x3 |
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/* If DTS locked, all trip points are not configurable */ |
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#define QRK_DTS_WR_MASK_CLR 0 |
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#define DEFAULT_POLL_DELAY 2000 |
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struct soc_sensor_entry { |
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bool locked; |
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u32 store_ptps; |
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u32 store_dts_enable; |
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struct thermal_zone_device *tzone; |
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}; |
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static struct soc_sensor_entry *soc_dts; |
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static int polling_delay = DEFAULT_POLL_DELAY; |
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module_param(polling_delay, int, 0644); |
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MODULE_PARM_DESC(polling_delay, |
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"Polling interval for checking trip points (in milliseconds)"); |
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static DEFINE_MUTEX(dts_update_mutex); |
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static int soc_dts_enable(struct thermal_zone_device *tzd) |
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{ |
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u32 out; |
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struct soc_sensor_entry *aux_entry = tzd->devdata; |
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int ret; |
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ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, |
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QRK_DTS_REG_OFFSET_ENABLE, &out); |
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if (ret) |
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return ret; |
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if (out & QRK_DTS_ENABLE_BIT) |
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return 0; |
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if (!aux_entry->locked) { |
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out |= QRK_DTS_ENABLE_BIT; |
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ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, |
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QRK_DTS_REG_OFFSET_ENABLE, out); |
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if (ret) |
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return ret; |
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} else { |
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pr_info("DTS is locked. Cannot enable DTS\n"); |
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ret = -EPERM; |
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} |
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return ret; |
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} |
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static int soc_dts_disable(struct thermal_zone_device *tzd) |
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{ |
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u32 out; |
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struct soc_sensor_entry *aux_entry = tzd->devdata; |
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int ret; |
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ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, |
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QRK_DTS_REG_OFFSET_ENABLE, &out); |
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if (ret) |
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return ret; |
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if (!(out & QRK_DTS_ENABLE_BIT)) |
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return 0; |
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if (!aux_entry->locked) { |
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out &= ~QRK_DTS_ENABLE_BIT; |
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ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, |
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QRK_DTS_REG_OFFSET_ENABLE, out); |
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if (ret) |
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return ret; |
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} else { |
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pr_info("DTS is locked. Cannot disable DTS\n"); |
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ret = -EPERM; |
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} |
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return ret; |
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} |
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static int _get_trip_temp(int trip, int *temp) |
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{ |
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int status; |
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u32 out; |
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mutex_lock(&dts_update_mutex); |
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status = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, |
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QRK_DTS_REG_OFFSET_PTPS, &out); |
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mutex_unlock(&dts_update_mutex); |
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if (status) |
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return status; |
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/* |
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* Thermal Sensor Programmable Trip Point Register has 8-bit |
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* fields for critical (catastrophic) and hot set trip point |
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* thresholds. The threshold value is always offset by its |
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* temperature base (50 degree Celsius). |
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*/ |
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*temp = (out >> (trip * QRK_DTS_SHIFT_TP)) & QRK_DTS_MASK_TP_THRES; |
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*temp -= QRK_DTS_TEMP_BASE; |
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return 0; |
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} |
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static inline int sys_get_trip_temp(struct thermal_zone_device *tzd, |
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int trip, int *temp) |
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{ |
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return _get_trip_temp(trip, temp); |
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} |
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static inline int sys_get_crit_temp(struct thermal_zone_device *tzd, int *temp) |
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{ |
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return _get_trip_temp(QRK_DTS_ID_TP_CRITICAL, temp); |
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} |
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static int update_trip_temp(struct soc_sensor_entry *aux_entry, |
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int trip, int temp) |
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{ |
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u32 out; |
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u32 temp_out; |
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u32 store_ptps; |
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int ret; |
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mutex_lock(&dts_update_mutex); |
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if (aux_entry->locked) { |
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ret = -EPERM; |
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goto failed; |
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} |
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ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, |
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QRK_DTS_REG_OFFSET_PTPS, &store_ptps); |
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if (ret) |
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goto failed; |
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/* |
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* Protection against unsafe trip point thresdhold value. |
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* As Quark X1000 data-sheet does not provide any recommendation |
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* regarding the safe trip point threshold value to use, we choose |
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* the safe value according to the threshold value set by UEFI BIOS. |
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*/ |
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if (temp > QRK_DTS_SAFE_TP_THRES) |
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temp = QRK_DTS_SAFE_TP_THRES; |
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/* |
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* Thermal Sensor Programmable Trip Point Register has 8-bit |
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* fields for critical (catastrophic) and hot set trip point |
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* thresholds. The threshold value is always offset by its |
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* temperature base (50 degree Celsius). |
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*/ |
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temp_out = temp + QRK_DTS_TEMP_BASE; |
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out = (store_ptps & ~(QRK_DTS_MASK_TP_THRES << |
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(trip * QRK_DTS_SHIFT_TP))); |
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out |= (temp_out & QRK_DTS_MASK_TP_THRES) << |
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(trip * QRK_DTS_SHIFT_TP); |
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ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, |
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QRK_DTS_REG_OFFSET_PTPS, out); |
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failed: |
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mutex_unlock(&dts_update_mutex); |
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return ret; |
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} |
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static inline int sys_set_trip_temp(struct thermal_zone_device *tzd, int trip, |
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int temp) |
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{ |
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return update_trip_temp(tzd->devdata, trip, temp); |
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} |
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static int sys_get_trip_type(struct thermal_zone_device *thermal, |
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int trip, enum thermal_trip_type *type) |
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{ |
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if (trip) |
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*type = THERMAL_TRIP_HOT; |
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else |
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*type = THERMAL_TRIP_CRITICAL; |
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return 0; |
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} |
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static int sys_get_curr_temp(struct thermal_zone_device *tzd, |
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int *temp) |
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{ |
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u32 out; |
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int ret; |
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mutex_lock(&dts_update_mutex); |
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ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, |
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QRK_DTS_REG_OFFSET_TEMP, &out); |
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mutex_unlock(&dts_update_mutex); |
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if (ret) |
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return ret; |
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/* |
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* Thermal Sensor Temperature Register has 8-bit field |
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* for temperature value (offset by temperature base |
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* 50 degree Celsius). |
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*/ |
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out = (out >> QRK_DTS_OFFSET_TEMP) & QRK_DTS_MASK_TEMP; |
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*temp = out - QRK_DTS_TEMP_BASE; |
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return 0; |
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} |
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static int sys_change_mode(struct thermal_zone_device *tzd, |
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enum thermal_device_mode mode) |
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{ |
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int ret; |
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mutex_lock(&dts_update_mutex); |
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if (mode == THERMAL_DEVICE_ENABLED) |
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ret = soc_dts_enable(tzd); |
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else |
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ret = soc_dts_disable(tzd); |
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mutex_unlock(&dts_update_mutex); |
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return ret; |
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} |
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static struct thermal_zone_device_ops tzone_ops = { |
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.get_temp = sys_get_curr_temp, |
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.get_trip_temp = sys_get_trip_temp, |
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.get_trip_type = sys_get_trip_type, |
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.set_trip_temp = sys_set_trip_temp, |
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.get_crit_temp = sys_get_crit_temp, |
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.change_mode = sys_change_mode, |
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}; |
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static void free_soc_dts(struct soc_sensor_entry *aux_entry) |
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{ |
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if (aux_entry) { |
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if (!aux_entry->locked) { |
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mutex_lock(&dts_update_mutex); |
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iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, |
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QRK_DTS_REG_OFFSET_ENABLE, |
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aux_entry->store_dts_enable); |
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iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, |
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QRK_DTS_REG_OFFSET_PTPS, |
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aux_entry->store_ptps); |
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mutex_unlock(&dts_update_mutex); |
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} |
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thermal_zone_device_unregister(aux_entry->tzone); |
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kfree(aux_entry); |
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} |
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} |
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static struct soc_sensor_entry *alloc_soc_dts(void) |
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{ |
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struct soc_sensor_entry *aux_entry; |
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int err; |
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u32 out; |
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int wr_mask; |
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aux_entry = kzalloc(sizeof(*aux_entry), GFP_KERNEL); |
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if (!aux_entry) { |
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err = -ENOMEM; |
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return ERR_PTR(-ENOMEM); |
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} |
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/* Check if DTS register is locked */ |
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err = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, |
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QRK_DTS_REG_OFFSET_LOCK, &out); |
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if (err) |
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goto err_ret; |
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if (out & QRK_DTS_LOCK_BIT) { |
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aux_entry->locked = true; |
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wr_mask = QRK_DTS_WR_MASK_CLR; |
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} else { |
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aux_entry->locked = false; |
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wr_mask = QRK_DTS_WR_MASK_SET; |
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} |
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/* Store DTS default state if DTS registers are not locked */ |
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if (!aux_entry->locked) { |
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/* Store DTS default enable for restore on exit */ |
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err = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, |
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QRK_DTS_REG_OFFSET_ENABLE, |
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&aux_entry->store_dts_enable); |
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if (err) |
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goto err_ret; |
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/* Store DTS default PTPS register for restore on exit */ |
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err = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, |
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QRK_DTS_REG_OFFSET_PTPS, |
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&aux_entry->store_ptps); |
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if (err) |
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goto err_ret; |
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} |
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aux_entry->tzone = thermal_zone_device_register("quark_dts", |
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QRK_MAX_DTS_TRIPS, |
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wr_mask, |
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aux_entry, &tzone_ops, NULL, 0, polling_delay); |
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if (IS_ERR(aux_entry->tzone)) { |
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err = PTR_ERR(aux_entry->tzone); |
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goto err_ret; |
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} |
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err = thermal_zone_device_enable(aux_entry->tzone); |
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if (err) |
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goto err_aux_status; |
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return aux_entry; |
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err_aux_status: |
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thermal_zone_device_unregister(aux_entry->tzone); |
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err_ret: |
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kfree(aux_entry); |
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return ERR_PTR(err); |
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} |
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static const struct x86_cpu_id qrk_thermal_ids[] __initconst = { |
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X86_MATCH_VENDOR_FAM_MODEL(INTEL, 5, INTEL_FAM5_QUARK_X1000, NULL), |
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{} |
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}; |
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MODULE_DEVICE_TABLE(x86cpu, qrk_thermal_ids); |
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static int __init intel_quark_thermal_init(void) |
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{ |
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int err = 0; |
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if (!x86_match_cpu(qrk_thermal_ids) || !iosf_mbi_available()) |
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return -ENODEV; |
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soc_dts = alloc_soc_dts(); |
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if (IS_ERR(soc_dts)) { |
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err = PTR_ERR(soc_dts); |
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goto err_free; |
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} |
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return 0; |
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err_free: |
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free_soc_dts(soc_dts); |
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return err; |
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} |
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static void __exit intel_quark_thermal_exit(void) |
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{ |
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free_soc_dts(soc_dts); |
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} |
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module_init(intel_quark_thermal_init) |
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module_exit(intel_quark_thermal_exit) |
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MODULE_DESCRIPTION("Intel Quark DTS Thermal Driver"); |
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MODULE_AUTHOR("Ong Boon Leong <[email protected]>"); |
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MODULE_LICENSE("Dual BSD/GPL");
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