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96 lines
2.9 KiB
96 lines
2.9 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Renesas R-Car H3 System Controller |
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* |
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* Copyright (C) 2016-2017 Glider bvba |
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*/ |
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#include <linux/bits.h> |
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#include <linux/kernel.h> |
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#include <linux/sys_soc.h> |
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#include <dt-bindings/power/r8a7795-sysc.h> |
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#include "rcar-sysc.h" |
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static struct rcar_sysc_area r8a7795_areas[] __initdata = { |
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{ "always-on", 0, 0, R8A7795_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, |
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{ "ca57-scu", 0x1c0, 0, R8A7795_PD_CA57_SCU, R8A7795_PD_ALWAYS_ON, |
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PD_SCU }, |
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{ "ca57-cpu0", 0x80, 0, R8A7795_PD_CA57_CPU0, R8A7795_PD_CA57_SCU, |
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PD_CPU_NOCR }, |
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{ "ca57-cpu1", 0x80, 1, R8A7795_PD_CA57_CPU1, R8A7795_PD_CA57_SCU, |
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PD_CPU_NOCR }, |
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{ "ca57-cpu2", 0x80, 2, R8A7795_PD_CA57_CPU2, R8A7795_PD_CA57_SCU, |
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PD_CPU_NOCR }, |
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{ "ca57-cpu3", 0x80, 3, R8A7795_PD_CA57_CPU3, R8A7795_PD_CA57_SCU, |
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PD_CPU_NOCR }, |
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{ "ca53-scu", 0x140, 0, R8A7795_PD_CA53_SCU, R8A7795_PD_ALWAYS_ON, |
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PD_SCU }, |
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{ "ca53-cpu0", 0x200, 0, R8A7795_PD_CA53_CPU0, R8A7795_PD_CA53_SCU, |
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PD_CPU_NOCR }, |
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{ "ca53-cpu1", 0x200, 1, R8A7795_PD_CA53_CPU1, R8A7795_PD_CA53_SCU, |
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PD_CPU_NOCR }, |
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{ "ca53-cpu2", 0x200, 2, R8A7795_PD_CA53_CPU2, R8A7795_PD_CA53_SCU, |
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PD_CPU_NOCR }, |
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{ "ca53-cpu3", 0x200, 3, R8A7795_PD_CA53_CPU3, R8A7795_PD_CA53_SCU, |
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PD_CPU_NOCR }, |
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{ "a3vp", 0x340, 0, R8A7795_PD_A3VP, R8A7795_PD_ALWAYS_ON }, |
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{ "cr7", 0x240, 0, R8A7795_PD_CR7, R8A7795_PD_ALWAYS_ON }, |
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{ "a3vc", 0x380, 0, R8A7795_PD_A3VC, R8A7795_PD_ALWAYS_ON }, |
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/* A2VC0 exists on ES1.x only */ |
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{ "a2vc0", 0x3c0, 0, R8A7795_PD_A2VC0, R8A7795_PD_A3VC }, |
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{ "a2vc1", 0x3c0, 1, R8A7795_PD_A2VC1, R8A7795_PD_A3VC }, |
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{ "3dg-a", 0x100, 0, R8A7795_PD_3DG_A, R8A7795_PD_ALWAYS_ON }, |
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{ "3dg-b", 0x100, 1, R8A7795_PD_3DG_B, R8A7795_PD_3DG_A }, |
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{ "3dg-c", 0x100, 2, R8A7795_PD_3DG_C, R8A7795_PD_3DG_B }, |
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{ "3dg-d", 0x100, 3, R8A7795_PD_3DG_D, R8A7795_PD_3DG_C }, |
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{ "3dg-e", 0x100, 4, R8A7795_PD_3DG_E, R8A7795_PD_3DG_D }, |
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{ "a3ir", 0x180, 0, R8A7795_PD_A3IR, R8A7795_PD_ALWAYS_ON }, |
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}; |
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/* |
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* Fixups for R-Car H3 revisions |
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*/ |
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#define HAS_A2VC0 BIT(0) /* Power domain A2VC0 is present */ |
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#define NO_EXTMASK BIT(1) /* Missing SYSCEXTMASK register */ |
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static const struct soc_device_attribute r8a7795_quirks_match[] __initconst = { |
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{ |
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.soc_id = "r8a7795", .revision = "ES1.*", |
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.data = (void *)(HAS_A2VC0 | NO_EXTMASK), |
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}, { |
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.soc_id = "r8a7795", .revision = "ES2.*", |
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.data = (void *)(NO_EXTMASK), |
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}, |
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{ /* sentinel */ } |
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}; |
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static int __init r8a7795_sysc_init(void) |
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{ |
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const struct soc_device_attribute *attr; |
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u32 quirks = 0; |
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attr = soc_device_match(r8a7795_quirks_match); |
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if (attr) |
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quirks = (uintptr_t)attr->data; |
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if (!(quirks & HAS_A2VC0)) |
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rcar_sysc_nullify(r8a7795_areas, ARRAY_SIZE(r8a7795_areas), |
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R8A7795_PD_A2VC0); |
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if (quirks & NO_EXTMASK) |
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r8a7795_sysc_info.extmask_val = 0; |
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return 0; |
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} |
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struct rcar_sysc_info r8a7795_sysc_info __initdata = { |
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.init = r8a7795_sysc_init, |
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.areas = r8a7795_areas, |
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.num_areas = ARRAY_SIZE(r8a7795_areas), |
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.extmask_offs = 0x2f8, |
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.extmask_val = BIT(0), |
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};
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