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718 lines
18 KiB
718 lines
18 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* Power domain driver for Broadcom BCM2835 |
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* |
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* Copyright (C) 2018 Broadcom |
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*/ |
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#include <dt-bindings/soc/bcm2835-pm.h> |
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#include <linux/clk.h> |
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#include <linux/delay.h> |
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#include <linux/io.h> |
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#include <linux/mfd/bcm2835-pm.h> |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#include <linux/pm_domain.h> |
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#include <linux/reset-controller.h> |
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#include <linux/types.h> |
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#define PM_GNRIC 0x00 |
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#define PM_AUDIO 0x04 |
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#define PM_STATUS 0x18 |
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#define PM_RSTC 0x1c |
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#define PM_RSTS 0x20 |
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#define PM_WDOG 0x24 |
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#define PM_PADS0 0x28 |
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#define PM_PADS2 0x2c |
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#define PM_PADS3 0x30 |
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#define PM_PADS4 0x34 |
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#define PM_PADS5 0x38 |
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#define PM_PADS6 0x3c |
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#define PM_CAM0 0x44 |
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#define PM_CAM0_LDOHPEN BIT(2) |
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#define PM_CAM0_LDOLPEN BIT(1) |
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#define PM_CAM0_CTRLEN BIT(0) |
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#define PM_CAM1 0x48 |
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#define PM_CAM1_LDOHPEN BIT(2) |
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#define PM_CAM1_LDOLPEN BIT(1) |
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#define PM_CAM1_CTRLEN BIT(0) |
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#define PM_CCP2TX 0x4c |
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#define PM_CCP2TX_LDOEN BIT(1) |
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#define PM_CCP2TX_CTRLEN BIT(0) |
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#define PM_DSI0 0x50 |
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#define PM_DSI0_LDOHPEN BIT(2) |
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#define PM_DSI0_LDOLPEN BIT(1) |
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#define PM_DSI0_CTRLEN BIT(0) |
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#define PM_DSI1 0x54 |
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#define PM_DSI1_LDOHPEN BIT(2) |
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#define PM_DSI1_LDOLPEN BIT(1) |
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#define PM_DSI1_CTRLEN BIT(0) |
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#define PM_HDMI 0x58 |
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#define PM_HDMI_RSTDR BIT(19) |
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#define PM_HDMI_LDOPD BIT(1) |
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#define PM_HDMI_CTRLEN BIT(0) |
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#define PM_USB 0x5c |
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/* The power gates must be enabled with this bit before enabling the LDO in the |
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* USB block. |
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*/ |
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#define PM_USB_CTRLEN BIT(0) |
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#define PM_PXLDO 0x60 |
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#define PM_PXBG 0x64 |
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#define PM_DFT 0x68 |
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#define PM_SMPS 0x6c |
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#define PM_XOSC 0x70 |
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#define PM_SPAREW 0x74 |
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#define PM_SPARER 0x78 |
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#define PM_AVS_RSTDR 0x7c |
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#define PM_AVS_STAT 0x80 |
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#define PM_AVS_EVENT 0x84 |
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#define PM_AVS_INTEN 0x88 |
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#define PM_DUMMY 0xfc |
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#define PM_IMAGE 0x108 |
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#define PM_GRAFX 0x10c |
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#define PM_PROC 0x110 |
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#define PM_ENAB BIT(12) |
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#define PM_ISPRSTN BIT(8) |
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#define PM_H264RSTN BIT(7) |
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#define PM_PERIRSTN BIT(6) |
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#define PM_V3DRSTN BIT(6) |
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#define PM_ISFUNC BIT(5) |
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#define PM_MRDONE BIT(4) |
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#define PM_MEMREP BIT(3) |
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#define PM_ISPOW BIT(2) |
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#define PM_POWOK BIT(1) |
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#define PM_POWUP BIT(0) |
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#define PM_INRUSH_SHIFT 13 |
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#define PM_INRUSH_3_5_MA 0 |
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#define PM_INRUSH_5_MA 1 |
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#define PM_INRUSH_10_MA 2 |
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#define PM_INRUSH_20_MA 3 |
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#define PM_INRUSH_MASK (3 << PM_INRUSH_SHIFT) |
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#define PM_PASSWORD 0x5a000000 |
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#define PM_WDOG_TIME_SET 0x000fffff |
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#define PM_RSTC_WRCFG_CLR 0xffffffcf |
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#define PM_RSTS_HADWRH_SET 0x00000040 |
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#define PM_RSTC_WRCFG_SET 0x00000030 |
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#define PM_RSTC_WRCFG_FULL_RESET 0x00000020 |
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#define PM_RSTC_RESET 0x00000102 |
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#define PM_READ(reg) readl(power->base + (reg)) |
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#define PM_WRITE(reg, val) writel(PM_PASSWORD | (val), power->base + (reg)) |
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#define ASB_BRDG_VERSION 0x00 |
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#define ASB_CPR_CTRL 0x04 |
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#define ASB_V3D_S_CTRL 0x08 |
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#define ASB_V3D_M_CTRL 0x0c |
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#define ASB_ISP_S_CTRL 0x10 |
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#define ASB_ISP_M_CTRL 0x14 |
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#define ASB_H264_S_CTRL 0x18 |
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#define ASB_H264_M_CTRL 0x1c |
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#define ASB_REQ_STOP BIT(0) |
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#define ASB_ACK BIT(1) |
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#define ASB_EMPTY BIT(2) |
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#define ASB_FULL BIT(3) |
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#define ASB_AXI_BRDG_ID 0x20 |
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#define ASB_READ(reg) readl(power->asb + (reg)) |
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#define ASB_WRITE(reg, val) writel(PM_PASSWORD | (val), power->asb + (reg)) |
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struct bcm2835_power_domain { |
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struct generic_pm_domain base; |
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struct bcm2835_power *power; |
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u32 domain; |
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struct clk *clk; |
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}; |
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struct bcm2835_power { |
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struct device *dev; |
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/* PM registers. */ |
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void __iomem *base; |
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/* AXI Async bridge registers. */ |
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void __iomem *asb; |
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bool is_2711; |
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struct genpd_onecell_data pd_xlate; |
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struct bcm2835_power_domain domains[BCM2835_POWER_DOMAIN_COUNT]; |
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struct reset_controller_dev reset; |
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}; |
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static int bcm2835_asb_enable(struct bcm2835_power *power, u32 reg) |
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{ |
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u64 start; |
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if (!reg) |
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return 0; |
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start = ktime_get_ns(); |
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/* Enable the module's async AXI bridges. */ |
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ASB_WRITE(reg, ASB_READ(reg) & ~ASB_REQ_STOP); |
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while (ASB_READ(reg) & ASB_ACK) { |
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cpu_relax(); |
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if (ktime_get_ns() - start >= 1000) |
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return -ETIMEDOUT; |
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} |
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return 0; |
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} |
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static int bcm2835_asb_disable(struct bcm2835_power *power, u32 reg) |
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{ |
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u64 start; |
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if (!reg) |
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return 0; |
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start = ktime_get_ns(); |
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/* Enable the module's async AXI bridges. */ |
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ASB_WRITE(reg, ASB_READ(reg) | ASB_REQ_STOP); |
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while (!(ASB_READ(reg) & ASB_ACK)) { |
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cpu_relax(); |
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if (ktime_get_ns() - start >= 1000) |
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return -ETIMEDOUT; |
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} |
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return 0; |
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} |
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static int bcm2835_power_power_off(struct bcm2835_power_domain *pd, u32 pm_reg) |
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{ |
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struct bcm2835_power *power = pd->power; |
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/* 2711 has no power domains above the reset controller. */ |
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if (power->is_2711) |
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return 0; |
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/* Enable functional isolation */ |
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISFUNC); |
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/* Enable electrical isolation */ |
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISPOW); |
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/* Open the power switches. */ |
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_POWUP); |
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return 0; |
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} |
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static int bcm2835_power_power_on(struct bcm2835_power_domain *pd, u32 pm_reg) |
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{ |
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struct bcm2835_power *power = pd->power; |
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struct device *dev = power->dev; |
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u64 start; |
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int ret; |
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int inrush; |
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bool powok; |
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/* 2711 has no power domains above the reset controller. */ |
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if (power->is_2711) |
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return 0; |
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/* If it was already powered on by the fw, leave it that way. */ |
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if (PM_READ(pm_reg) & PM_POWUP) |
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return 0; |
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/* Enable power. Allowing too much current at once may result |
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* in POWOK never getting set, so start low and ramp it up as |
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* necessary to succeed. |
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*/ |
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powok = false; |
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for (inrush = PM_INRUSH_3_5_MA; inrush <= PM_INRUSH_20_MA; inrush++) { |
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PM_WRITE(pm_reg, |
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(PM_READ(pm_reg) & ~PM_INRUSH_MASK) | |
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(inrush << PM_INRUSH_SHIFT) | |
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PM_POWUP); |
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start = ktime_get_ns(); |
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while (!(powok = !!(PM_READ(pm_reg) & PM_POWOK))) { |
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cpu_relax(); |
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if (ktime_get_ns() - start >= 3000) |
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break; |
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} |
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} |
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if (!powok) { |
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dev_err(dev, "Timeout waiting for %s power OK\n", |
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pd->base.name); |
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ret = -ETIMEDOUT; |
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goto err_disable_powup; |
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} |
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/* Disable electrical isolation */ |
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PM_WRITE(pm_reg, PM_READ(pm_reg) | PM_ISPOW); |
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/* Repair memory */ |
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PM_WRITE(pm_reg, PM_READ(pm_reg) | PM_MEMREP); |
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start = ktime_get_ns(); |
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while (!(PM_READ(pm_reg) & PM_MRDONE)) { |
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cpu_relax(); |
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if (ktime_get_ns() - start >= 1000) { |
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dev_err(dev, "Timeout waiting for %s memory repair\n", |
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pd->base.name); |
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ret = -ETIMEDOUT; |
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goto err_disable_ispow; |
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} |
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} |
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/* Disable functional isolation */ |
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PM_WRITE(pm_reg, PM_READ(pm_reg) | PM_ISFUNC); |
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return 0; |
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err_disable_ispow: |
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISPOW); |
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err_disable_powup: |
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~(PM_POWUP | PM_INRUSH_MASK)); |
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return ret; |
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} |
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static int bcm2835_asb_power_on(struct bcm2835_power_domain *pd, |
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u32 pm_reg, |
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u32 asb_m_reg, |
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u32 asb_s_reg, |
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u32 reset_flags) |
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{ |
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struct bcm2835_power *power = pd->power; |
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int ret; |
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ret = clk_prepare_enable(pd->clk); |
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if (ret) { |
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dev_err(power->dev, "Failed to enable clock for %s\n", |
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pd->base.name); |
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return ret; |
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} |
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/* Wait 32 clocks for reset to propagate, 1 us will be enough */ |
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udelay(1); |
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clk_disable_unprepare(pd->clk); |
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/* Deassert the resets. */ |
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PM_WRITE(pm_reg, PM_READ(pm_reg) | reset_flags); |
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ret = clk_prepare_enable(pd->clk); |
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if (ret) { |
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dev_err(power->dev, "Failed to enable clock for %s\n", |
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pd->base.name); |
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goto err_enable_resets; |
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} |
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ret = bcm2835_asb_enable(power, asb_m_reg); |
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if (ret) { |
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dev_err(power->dev, "Failed to enable ASB master for %s\n", |
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pd->base.name); |
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goto err_disable_clk; |
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} |
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ret = bcm2835_asb_enable(power, asb_s_reg); |
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if (ret) { |
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dev_err(power->dev, "Failed to enable ASB slave for %s\n", |
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pd->base.name); |
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goto err_disable_asb_master; |
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} |
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return 0; |
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err_disable_asb_master: |
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bcm2835_asb_disable(power, asb_m_reg); |
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err_disable_clk: |
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clk_disable_unprepare(pd->clk); |
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err_enable_resets: |
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~reset_flags); |
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return ret; |
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} |
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static int bcm2835_asb_power_off(struct bcm2835_power_domain *pd, |
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u32 pm_reg, |
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u32 asb_m_reg, |
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u32 asb_s_reg, |
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u32 reset_flags) |
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{ |
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struct bcm2835_power *power = pd->power; |
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int ret; |
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ret = bcm2835_asb_disable(power, asb_s_reg); |
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if (ret) { |
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dev_warn(power->dev, "Failed to disable ASB slave for %s\n", |
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pd->base.name); |
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return ret; |
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} |
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ret = bcm2835_asb_disable(power, asb_m_reg); |
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if (ret) { |
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dev_warn(power->dev, "Failed to disable ASB master for %s\n", |
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pd->base.name); |
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bcm2835_asb_enable(power, asb_s_reg); |
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return ret; |
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} |
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clk_disable_unprepare(pd->clk); |
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/* Assert the resets. */ |
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~reset_flags); |
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return 0; |
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} |
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static int bcm2835_power_pd_power_on(struct generic_pm_domain *domain) |
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{ |
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struct bcm2835_power_domain *pd = |
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container_of(domain, struct bcm2835_power_domain, base); |
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struct bcm2835_power *power = pd->power; |
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switch (pd->domain) { |
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case BCM2835_POWER_DOMAIN_GRAFX: |
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return bcm2835_power_power_on(pd, PM_GRAFX); |
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case BCM2835_POWER_DOMAIN_GRAFX_V3D: |
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return bcm2835_asb_power_on(pd, PM_GRAFX, |
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ASB_V3D_M_CTRL, ASB_V3D_S_CTRL, |
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PM_V3DRSTN); |
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case BCM2835_POWER_DOMAIN_IMAGE: |
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return bcm2835_power_power_on(pd, PM_IMAGE); |
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case BCM2835_POWER_DOMAIN_IMAGE_PERI: |
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return bcm2835_asb_power_on(pd, PM_IMAGE, |
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0, 0, |
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PM_PERIRSTN); |
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case BCM2835_POWER_DOMAIN_IMAGE_ISP: |
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return bcm2835_asb_power_on(pd, PM_IMAGE, |
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ASB_ISP_M_CTRL, ASB_ISP_S_CTRL, |
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PM_ISPRSTN); |
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case BCM2835_POWER_DOMAIN_IMAGE_H264: |
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return bcm2835_asb_power_on(pd, PM_IMAGE, |
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ASB_H264_M_CTRL, ASB_H264_S_CTRL, |
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PM_H264RSTN); |
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case BCM2835_POWER_DOMAIN_USB: |
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PM_WRITE(PM_USB, PM_USB_CTRLEN); |
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return 0; |
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case BCM2835_POWER_DOMAIN_DSI0: |
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PM_WRITE(PM_DSI0, PM_DSI0_CTRLEN); |
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PM_WRITE(PM_DSI0, PM_DSI0_CTRLEN | PM_DSI0_LDOHPEN); |
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return 0; |
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case BCM2835_POWER_DOMAIN_DSI1: |
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PM_WRITE(PM_DSI1, PM_DSI1_CTRLEN); |
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PM_WRITE(PM_DSI1, PM_DSI1_CTRLEN | PM_DSI1_LDOHPEN); |
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return 0; |
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case BCM2835_POWER_DOMAIN_CCP2TX: |
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PM_WRITE(PM_CCP2TX, PM_CCP2TX_CTRLEN); |
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PM_WRITE(PM_CCP2TX, PM_CCP2TX_CTRLEN | PM_CCP2TX_LDOEN); |
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return 0; |
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case BCM2835_POWER_DOMAIN_HDMI: |
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PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) | PM_HDMI_RSTDR); |
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PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) | PM_HDMI_CTRLEN); |
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PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) & ~PM_HDMI_LDOPD); |
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usleep_range(100, 200); |
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PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) & ~PM_HDMI_RSTDR); |
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return 0; |
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default: |
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dev_err(power->dev, "Invalid domain %d\n", pd->domain); |
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return -EINVAL; |
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} |
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} |
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static int bcm2835_power_pd_power_off(struct generic_pm_domain *domain) |
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{ |
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struct bcm2835_power_domain *pd = |
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container_of(domain, struct bcm2835_power_domain, base); |
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struct bcm2835_power *power = pd->power; |
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switch (pd->domain) { |
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case BCM2835_POWER_DOMAIN_GRAFX: |
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return bcm2835_power_power_off(pd, PM_GRAFX); |
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case BCM2835_POWER_DOMAIN_GRAFX_V3D: |
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return bcm2835_asb_power_off(pd, PM_GRAFX, |
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ASB_V3D_M_CTRL, ASB_V3D_S_CTRL, |
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PM_V3DRSTN); |
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case BCM2835_POWER_DOMAIN_IMAGE: |
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return bcm2835_power_power_off(pd, PM_IMAGE); |
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case BCM2835_POWER_DOMAIN_IMAGE_PERI: |
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return bcm2835_asb_power_off(pd, PM_IMAGE, |
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0, 0, |
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PM_PERIRSTN); |
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case BCM2835_POWER_DOMAIN_IMAGE_ISP: |
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return bcm2835_asb_power_off(pd, PM_IMAGE, |
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ASB_ISP_M_CTRL, ASB_ISP_S_CTRL, |
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PM_ISPRSTN); |
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case BCM2835_POWER_DOMAIN_IMAGE_H264: |
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return bcm2835_asb_power_off(pd, PM_IMAGE, |
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ASB_H264_M_CTRL, ASB_H264_S_CTRL, |
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PM_H264RSTN); |
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case BCM2835_POWER_DOMAIN_USB: |
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PM_WRITE(PM_USB, 0); |
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return 0; |
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case BCM2835_POWER_DOMAIN_DSI0: |
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PM_WRITE(PM_DSI0, PM_DSI0_CTRLEN); |
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PM_WRITE(PM_DSI0, 0); |
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return 0; |
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case BCM2835_POWER_DOMAIN_DSI1: |
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PM_WRITE(PM_DSI1, PM_DSI1_CTRLEN); |
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PM_WRITE(PM_DSI1, 0); |
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return 0; |
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case BCM2835_POWER_DOMAIN_CCP2TX: |
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PM_WRITE(PM_CCP2TX, PM_CCP2TX_CTRLEN); |
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PM_WRITE(PM_CCP2TX, 0); |
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return 0; |
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case BCM2835_POWER_DOMAIN_HDMI: |
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PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) | PM_HDMI_LDOPD); |
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PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) & ~PM_HDMI_CTRLEN); |
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return 0; |
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default: |
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dev_err(power->dev, "Invalid domain %d\n", pd->domain); |
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return -EINVAL; |
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} |
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} |
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static int |
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bcm2835_init_power_domain(struct bcm2835_power *power, |
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int pd_xlate_index, const char *name) |
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{ |
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struct device *dev = power->dev; |
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struct bcm2835_power_domain *dom = &power->domains[pd_xlate_index]; |
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dom->clk = devm_clk_get(dev->parent, name); |
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if (IS_ERR(dom->clk)) { |
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int ret = PTR_ERR(dom->clk); |
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if (ret == -EPROBE_DEFER) |
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return ret; |
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/* Some domains don't have a clk, so make sure that we |
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* don't deref an error pointer later. |
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*/ |
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dom->clk = NULL; |
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} |
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dom->base.name = name; |
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dom->base.power_on = bcm2835_power_pd_power_on; |
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dom->base.power_off = bcm2835_power_pd_power_off; |
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dom->domain = pd_xlate_index; |
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dom->power = power; |
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/* XXX: on/off at boot? */ |
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pm_genpd_init(&dom->base, NULL, true); |
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power->pd_xlate.domains[pd_xlate_index] = &dom->base; |
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return 0; |
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} |
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|
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/** bcm2835_reset_reset - Resets a block that has a reset line in the |
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* PM block. |
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* |
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* The consumer of the reset controller must have the power domain up |
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* -- there's no reset ability with the power domain down. To reset |
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* the sub-block, we just disable its access to memory through the |
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* ASB, reset, and re-enable. |
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*/ |
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static int bcm2835_reset_reset(struct reset_controller_dev *rcdev, |
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unsigned long id) |
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{ |
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struct bcm2835_power *power = container_of(rcdev, struct bcm2835_power, |
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reset); |
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struct bcm2835_power_domain *pd; |
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int ret; |
|
|
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switch (id) { |
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case BCM2835_RESET_V3D: |
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pd = &power->domains[BCM2835_POWER_DOMAIN_GRAFX_V3D]; |
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break; |
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case BCM2835_RESET_H264: |
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pd = &power->domains[BCM2835_POWER_DOMAIN_IMAGE_H264]; |
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break; |
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case BCM2835_RESET_ISP: |
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pd = &power->domains[BCM2835_POWER_DOMAIN_IMAGE_ISP]; |
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break; |
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default: |
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dev_err(power->dev, "Bad reset id %ld\n", id); |
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return -EINVAL; |
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} |
|
|
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ret = bcm2835_power_pd_power_off(&pd->base); |
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if (ret) |
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return ret; |
|
|
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return bcm2835_power_pd_power_on(&pd->base); |
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} |
|
|
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static int bcm2835_reset_status(struct reset_controller_dev *rcdev, |
|
unsigned long id) |
|
{ |
|
struct bcm2835_power *power = container_of(rcdev, struct bcm2835_power, |
|
reset); |
|
|
|
switch (id) { |
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case BCM2835_RESET_V3D: |
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return !PM_READ(PM_GRAFX & PM_V3DRSTN); |
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case BCM2835_RESET_H264: |
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return !PM_READ(PM_IMAGE & PM_H264RSTN); |
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case BCM2835_RESET_ISP: |
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return !PM_READ(PM_IMAGE & PM_ISPRSTN); |
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default: |
|
return -EINVAL; |
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} |
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} |
|
|
|
static const struct reset_control_ops bcm2835_reset_ops = { |
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.reset = bcm2835_reset_reset, |
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.status = bcm2835_reset_status, |
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}; |
|
|
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static const char *const power_domain_names[] = { |
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[BCM2835_POWER_DOMAIN_GRAFX] = "grafx", |
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[BCM2835_POWER_DOMAIN_GRAFX_V3D] = "v3d", |
|
|
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[BCM2835_POWER_DOMAIN_IMAGE] = "image", |
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[BCM2835_POWER_DOMAIN_IMAGE_PERI] = "peri_image", |
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[BCM2835_POWER_DOMAIN_IMAGE_H264] = "h264", |
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[BCM2835_POWER_DOMAIN_IMAGE_ISP] = "isp", |
|
|
|
[BCM2835_POWER_DOMAIN_USB] = "usb", |
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[BCM2835_POWER_DOMAIN_DSI0] = "dsi0", |
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[BCM2835_POWER_DOMAIN_DSI1] = "dsi1", |
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[BCM2835_POWER_DOMAIN_CAM0] = "cam0", |
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[BCM2835_POWER_DOMAIN_CAM1] = "cam1", |
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[BCM2835_POWER_DOMAIN_CCP2TX] = "ccp2tx", |
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[BCM2835_POWER_DOMAIN_HDMI] = "hdmi", |
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}; |
|
|
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static int bcm2835_power_probe(struct platform_device *pdev) |
|
{ |
|
struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent); |
|
struct device *dev = &pdev->dev; |
|
struct bcm2835_power *power; |
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static const struct { |
|
int parent, child; |
|
} domain_deps[] = { |
|
{ BCM2835_POWER_DOMAIN_GRAFX, BCM2835_POWER_DOMAIN_GRAFX_V3D }, |
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{ BCM2835_POWER_DOMAIN_IMAGE, BCM2835_POWER_DOMAIN_IMAGE_PERI }, |
|
{ BCM2835_POWER_DOMAIN_IMAGE, BCM2835_POWER_DOMAIN_IMAGE_H264 }, |
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{ BCM2835_POWER_DOMAIN_IMAGE, BCM2835_POWER_DOMAIN_IMAGE_ISP }, |
|
{ BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_USB }, |
|
{ BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM0 }, |
|
{ BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM1 }, |
|
}; |
|
int ret = 0, i; |
|
u32 id; |
|
|
|
power = devm_kzalloc(dev, sizeof(*power), GFP_KERNEL); |
|
if (!power) |
|
return -ENOMEM; |
|
platform_set_drvdata(pdev, power); |
|
|
|
power->dev = dev; |
|
power->base = pm->base; |
|
power->asb = pm->asb; |
|
|
|
/* 2711 hack: the new RPiVid ASB took over V3D, which is our |
|
* only consumer of this driver so far. The old ASB seems to |
|
* still be present with ISP and H264 bits but no V3D, but I |
|
* don't know if that's real or not. The V3D is in the same |
|
* place in the new ASB as the old one, so just poke the new |
|
* one for now. |
|
*/ |
|
if (pm->rpivid_asb) { |
|
power->asb = pm->rpivid_asb; |
|
power->is_2711 = true; |
|
} |
|
|
|
id = ASB_READ(ASB_AXI_BRDG_ID); |
|
if (id != 0x62726467 /* "BRDG" */) { |
|
dev_err(dev, "ASB register ID returned 0x%08x\n", id); |
|
return -ENODEV; |
|
} |
|
|
|
power->pd_xlate.domains = devm_kcalloc(dev, |
|
ARRAY_SIZE(power_domain_names), |
|
sizeof(*power->pd_xlate.domains), |
|
GFP_KERNEL); |
|
if (!power->pd_xlate.domains) |
|
return -ENOMEM; |
|
|
|
power->pd_xlate.num_domains = ARRAY_SIZE(power_domain_names); |
|
|
|
for (i = 0; i < ARRAY_SIZE(power_domain_names); i++) { |
|
ret = bcm2835_init_power_domain(power, i, power_domain_names[i]); |
|
if (ret) |
|
goto fail; |
|
} |
|
|
|
for (i = 0; i < ARRAY_SIZE(domain_deps); i++) { |
|
pm_genpd_add_subdomain(&power->domains[domain_deps[i].parent].base, |
|
&power->domains[domain_deps[i].child].base); |
|
} |
|
|
|
power->reset.owner = THIS_MODULE; |
|
power->reset.nr_resets = BCM2835_RESET_COUNT; |
|
power->reset.ops = &bcm2835_reset_ops; |
|
power->reset.of_node = dev->parent->of_node; |
|
|
|
ret = devm_reset_controller_register(dev, &power->reset); |
|
if (ret) |
|
goto fail; |
|
|
|
of_genpd_add_provider_onecell(dev->parent->of_node, &power->pd_xlate); |
|
|
|
dev_info(dev, "Broadcom BCM2835 power domains driver"); |
|
return 0; |
|
|
|
fail: |
|
for (i = 0; i < ARRAY_SIZE(power_domain_names); i++) { |
|
struct generic_pm_domain *dom = &power->domains[i].base; |
|
|
|
if (dom->name) |
|
pm_genpd_remove(dom); |
|
} |
|
return ret; |
|
} |
|
|
|
static int bcm2835_power_remove(struct platform_device *pdev) |
|
{ |
|
return 0; |
|
} |
|
|
|
static struct platform_driver bcm2835_power_driver = { |
|
.probe = bcm2835_power_probe, |
|
.remove = bcm2835_power_remove, |
|
.driver = { |
|
.name = "bcm2835-power", |
|
}, |
|
}; |
|
module_platform_driver(bcm2835_power_driver); |
|
|
|
MODULE_AUTHOR("Eric Anholt <[email protected]>"); |
|
MODULE_DESCRIPTION("Driver for Broadcom BCM2835 PM power domains and reset"); |
|
MODULE_LICENSE("GPL");
|
|
|