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262 lines
6.4 KiB
262 lines
6.4 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (c) 2019 Intel Corporation. |
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* Lei Chuanhua <[email protected]> |
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*/ |
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#include <linux/bitfield.h> |
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#include <linux/init.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include <linux/reboot.h> |
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#include <linux/regmap.h> |
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#include <linux/reset-controller.h> |
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#define RCU_RST_STAT 0x0024 |
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#define RCU_RST_REQ 0x0048 |
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#define REG_OFFSET_MASK GENMASK(31, 16) |
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#define BIT_OFFSET_MASK GENMASK(15, 8) |
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#define STAT_BIT_OFFSET_MASK GENMASK(7, 0) |
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#define to_reset_data(x) container_of(x, struct intel_reset_data, rcdev) |
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struct intel_reset_soc { |
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bool legacy; |
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u32 reset_cell_count; |
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}; |
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struct intel_reset_data { |
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struct reset_controller_dev rcdev; |
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struct notifier_block restart_nb; |
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const struct intel_reset_soc *soc_data; |
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struct regmap *regmap; |
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struct device *dev; |
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u32 reboot_id; |
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}; |
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static const struct regmap_config intel_rcu_regmap_config = { |
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.name = "intel-reset", |
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.reg_bits = 32, |
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.reg_stride = 4, |
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.val_bits = 32, |
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.fast_io = true, |
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}; |
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/* |
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* Reset status register offset relative to |
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* the reset control register(X) is X + 4 |
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*/ |
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static u32 id_to_reg_and_bit_offsets(struct intel_reset_data *data, |
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unsigned long id, u32 *rst_req, |
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u32 *req_bit, u32 *stat_bit) |
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{ |
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*rst_req = FIELD_GET(REG_OFFSET_MASK, id); |
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*req_bit = FIELD_GET(BIT_OFFSET_MASK, id); |
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if (data->soc_data->legacy) |
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*stat_bit = FIELD_GET(STAT_BIT_OFFSET_MASK, id); |
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else |
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*stat_bit = *req_bit; |
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if (data->soc_data->legacy && *rst_req == RCU_RST_REQ) |
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return RCU_RST_STAT; |
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else |
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return *rst_req + 0x4; |
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} |
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static int intel_set_clr_bits(struct intel_reset_data *data, unsigned long id, |
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bool set) |
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{ |
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u32 rst_req, req_bit, rst_stat, stat_bit, val; |
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int ret; |
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rst_stat = id_to_reg_and_bit_offsets(data, id, &rst_req, |
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&req_bit, &stat_bit); |
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val = set ? BIT(req_bit) : 0; |
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ret = regmap_update_bits(data->regmap, rst_req, BIT(req_bit), val); |
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if (ret) |
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return ret; |
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return regmap_read_poll_timeout(data->regmap, rst_stat, val, |
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set == !!(val & BIT(stat_bit)), 20, |
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200); |
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} |
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static int intel_assert_device(struct reset_controller_dev *rcdev, |
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unsigned long id) |
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{ |
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struct intel_reset_data *data = to_reset_data(rcdev); |
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int ret; |
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ret = intel_set_clr_bits(data, id, true); |
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if (ret) |
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dev_err(data->dev, "Reset assert failed %d\n", ret); |
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return ret; |
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} |
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static int intel_deassert_device(struct reset_controller_dev *rcdev, |
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unsigned long id) |
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{ |
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struct intel_reset_data *data = to_reset_data(rcdev); |
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int ret; |
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ret = intel_set_clr_bits(data, id, false); |
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if (ret) |
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dev_err(data->dev, "Reset deassert failed %d\n", ret); |
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return ret; |
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} |
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static int intel_reset_status(struct reset_controller_dev *rcdev, |
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unsigned long id) |
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{ |
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struct intel_reset_data *data = to_reset_data(rcdev); |
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u32 rst_req, req_bit, rst_stat, stat_bit, val; |
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int ret; |
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rst_stat = id_to_reg_and_bit_offsets(data, id, &rst_req, |
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&req_bit, &stat_bit); |
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ret = regmap_read(data->regmap, rst_stat, &val); |
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if (ret) |
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return ret; |
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return !!(val & BIT(stat_bit)); |
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} |
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static const struct reset_control_ops intel_reset_ops = { |
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.assert = intel_assert_device, |
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.deassert = intel_deassert_device, |
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.status = intel_reset_status, |
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}; |
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static int intel_reset_xlate(struct reset_controller_dev *rcdev, |
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const struct of_phandle_args *spec) |
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{ |
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struct intel_reset_data *data = to_reset_data(rcdev); |
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u32 id; |
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if (spec->args[1] > 31) |
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return -EINVAL; |
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id = FIELD_PREP(REG_OFFSET_MASK, spec->args[0]); |
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id |= FIELD_PREP(BIT_OFFSET_MASK, spec->args[1]); |
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if (data->soc_data->legacy) { |
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if (spec->args[2] > 31) |
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return -EINVAL; |
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id |= FIELD_PREP(STAT_BIT_OFFSET_MASK, spec->args[2]); |
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} |
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return id; |
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} |
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static int intel_reset_restart_handler(struct notifier_block *nb, |
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unsigned long action, void *data) |
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{ |
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struct intel_reset_data *reset_data; |
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reset_data = container_of(nb, struct intel_reset_data, restart_nb); |
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intel_assert_device(&reset_data->rcdev, reset_data->reboot_id); |
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return NOTIFY_DONE; |
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} |
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static int intel_reset_probe(struct platform_device *pdev) |
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{ |
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struct device_node *np = pdev->dev.of_node; |
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struct device *dev = &pdev->dev; |
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struct intel_reset_data *data; |
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void __iomem *base; |
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u32 rb_id[3]; |
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int ret; |
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data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); |
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if (!data) |
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return -ENOMEM; |
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data->soc_data = of_device_get_match_data(dev); |
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if (!data->soc_data) |
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return -ENODEV; |
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base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(base)) |
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return PTR_ERR(base); |
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data->regmap = devm_regmap_init_mmio(dev, base, |
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&intel_rcu_regmap_config); |
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if (IS_ERR(data->regmap)) { |
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dev_err(dev, "regmap initialization failed\n"); |
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return PTR_ERR(data->regmap); |
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} |
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ret = device_property_read_u32_array(dev, "intel,global-reset", rb_id, |
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data->soc_data->reset_cell_count); |
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if (ret) { |
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dev_err(dev, "Failed to get global reset offset!\n"); |
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return ret; |
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} |
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data->dev = dev; |
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data->rcdev.of_node = np; |
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data->rcdev.owner = dev->driver->owner; |
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data->rcdev.ops = &intel_reset_ops; |
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data->rcdev.of_xlate = intel_reset_xlate; |
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data->rcdev.of_reset_n_cells = data->soc_data->reset_cell_count; |
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ret = devm_reset_controller_register(&pdev->dev, &data->rcdev); |
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if (ret) |
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return ret; |
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data->reboot_id = FIELD_PREP(REG_OFFSET_MASK, rb_id[0]); |
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data->reboot_id |= FIELD_PREP(BIT_OFFSET_MASK, rb_id[1]); |
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if (data->soc_data->legacy) |
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data->reboot_id |= FIELD_PREP(STAT_BIT_OFFSET_MASK, rb_id[2]); |
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data->restart_nb.notifier_call = intel_reset_restart_handler; |
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data->restart_nb.priority = 128; |
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register_restart_handler(&data->restart_nb); |
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return 0; |
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} |
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static const struct intel_reset_soc xrx200_data = { |
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.legacy = true, |
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.reset_cell_count = 3, |
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}; |
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static const struct intel_reset_soc lgm_data = { |
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.legacy = false, |
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.reset_cell_count = 2, |
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}; |
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static const struct of_device_id intel_reset_match[] = { |
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{ .compatible = "intel,rcu-lgm", .data = &lgm_data }, |
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{ .compatible = "intel,rcu-xrx200", .data = &xrx200_data }, |
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{} |
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}; |
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static struct platform_driver intel_reset_driver = { |
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.probe = intel_reset_probe, |
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.driver = { |
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.name = "intel-reset", |
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.of_match_table = intel_reset_match, |
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}, |
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}; |
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static int __init intel_reset_init(void) |
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{ |
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return platform_driver_register(&intel_reset_driver); |
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} |
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/* |
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* RCU is system core entity which is in Always On Domain whose clocks |
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* or resource initialization happens in system core initialization. |
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* Also, it is required for most of the platform or architecture |
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* specific devices to perform reset operation as part of initialization. |
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* So perform RCU as post core initialization. |
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*/ |
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postcore_initcall(intel_reset_init);
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