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430 lines
11 KiB
430 lines
11 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Marvell PXA2xx family pin control |
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* |
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* Copyright (C) 2015 Robert Jarzmik |
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*/ |
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#include <linux/bitops.h> |
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#include <linux/io.h> |
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#include <linux/of.h> |
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#include <linux/of_address.h> |
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#include <linux/module.h> |
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#include <linux/pinctrl/machine.h> |
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#include <linux/pinctrl/pinconf.h> |
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#include <linux/pinctrl/pinconf-generic.h> |
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#include <linux/pinctrl/pinmux.h> |
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#include <linux/pinctrl/pinctrl.h> |
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#include <linux/platform_device.h> |
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#include <linux/slab.h> |
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#include "../pinctrl-utils.h" |
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#include "pinctrl-pxa2xx.h" |
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static int pxa2xx_pctrl_get_groups_count(struct pinctrl_dev *pctldev) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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return pctl->ngroups; |
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} |
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static const char *pxa2xx_pctrl_get_group_name(struct pinctrl_dev *pctldev, |
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unsigned tgroup) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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struct pxa_pinctrl_group *group = pctl->groups + tgroup; |
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return group->name; |
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} |
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static int pxa2xx_pctrl_get_group_pins(struct pinctrl_dev *pctldev, |
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unsigned tgroup, |
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const unsigned **pins, |
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unsigned *num_pins) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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struct pxa_pinctrl_group *group = pctl->groups + tgroup; |
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*pins = (unsigned *)&group->pin; |
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*num_pins = 1; |
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return 0; |
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} |
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static const struct pinctrl_ops pxa2xx_pctl_ops = { |
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#ifdef CONFIG_OF |
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.dt_node_to_map = pinconf_generic_dt_node_to_map_all, |
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.dt_free_map = pinctrl_utils_free_map, |
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#endif |
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.get_groups_count = pxa2xx_pctrl_get_groups_count, |
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.get_group_name = pxa2xx_pctrl_get_group_name, |
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.get_group_pins = pxa2xx_pctrl_get_group_pins, |
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}; |
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static struct pxa_desc_function * |
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pxa_desc_by_func_group(struct pxa_pinctrl *pctl, const char *pin_name, |
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const char *func_name) |
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{ |
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int i; |
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struct pxa_desc_function *df; |
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for (i = 0; i < pctl->npins; i++) { |
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const struct pxa_desc_pin *pin = pctl->ppins + i; |
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if (!strcmp(pin->pin.name, pin_name)) |
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for (df = pin->functions; df->name; df++) |
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if (!strcmp(df->name, func_name)) |
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return df; |
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} |
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return NULL; |
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} |
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static int pxa2xx_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, |
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struct pinctrl_gpio_range *range, |
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unsigned pin, |
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bool input) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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unsigned long flags; |
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uint32_t val; |
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void __iomem *gpdr; |
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gpdr = pctl->base_gpdr[pin / 32]; |
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dev_dbg(pctl->dev, "set_direction(pin=%d): dir=%d\n", |
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pin, !input); |
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spin_lock_irqsave(&pctl->lock, flags); |
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val = readl_relaxed(gpdr); |
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val = (val & ~BIT(pin % 32)) | (input ? 0 : BIT(pin % 32)); |
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writel_relaxed(val, gpdr); |
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spin_unlock_irqrestore(&pctl->lock, flags); |
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return 0; |
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} |
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static const char *pxa2xx_pmx_get_func_name(struct pinctrl_dev *pctldev, |
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unsigned function) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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struct pxa_pinctrl_function *pf = pctl->functions + function; |
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return pf->name; |
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} |
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static int pxa2xx_get_functions_count(struct pinctrl_dev *pctldev) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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return pctl->nfuncs; |
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} |
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static int pxa2xx_pmx_get_func_groups(struct pinctrl_dev *pctldev, |
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unsigned function, |
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const char * const **groups, |
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unsigned * const num_groups) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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struct pxa_pinctrl_function *pf = pctl->functions + function; |
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*groups = pf->groups; |
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*num_groups = pf->ngroups; |
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return 0; |
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} |
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static int pxa2xx_pmx_set_mux(struct pinctrl_dev *pctldev, unsigned function, |
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unsigned tgroup) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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struct pxa_pinctrl_group *group = pctl->groups + tgroup; |
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struct pxa_desc_function *df; |
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int pin, shift; |
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unsigned long flags; |
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void __iomem *gafr, *gpdr; |
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u32 val; |
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df = pxa_desc_by_func_group(pctl, group->name, |
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(pctl->functions + function)->name); |
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if (!df) |
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return -EINVAL; |
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pin = group->pin; |
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gafr = pctl->base_gafr[pin / 16]; |
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gpdr = pctl->base_gpdr[pin / 32]; |
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shift = (pin % 16) << 1; |
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dev_dbg(pctl->dev, "set_mux(pin=%d): af=%d dir=%d\n", |
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pin, df->muxval >> 1, df->muxval & 0x1); |
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spin_lock_irqsave(&pctl->lock, flags); |
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val = readl_relaxed(gafr); |
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val = (val & ~(0x3 << shift)) | ((df->muxval >> 1) << shift); |
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writel_relaxed(val, gafr); |
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val = readl_relaxed(gpdr); |
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val = (val & ~BIT(pin % 32)) | ((df->muxval & 1) ? BIT(pin % 32) : 0); |
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writel_relaxed(val, gpdr); |
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spin_unlock_irqrestore(&pctl->lock, flags); |
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return 0; |
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} |
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static const struct pinmux_ops pxa2xx_pinmux_ops = { |
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.get_functions_count = pxa2xx_get_functions_count, |
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.get_function_name = pxa2xx_pmx_get_func_name, |
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.get_function_groups = pxa2xx_pmx_get_func_groups, |
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.set_mux = pxa2xx_pmx_set_mux, |
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.gpio_set_direction = pxa2xx_pmx_gpio_set_direction, |
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}; |
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static int pxa2xx_pconf_group_get(struct pinctrl_dev *pctldev, |
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unsigned group, |
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unsigned long *config) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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struct pxa_pinctrl_group *g = pctl->groups + group; |
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unsigned long flags; |
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unsigned pin = g->pin; |
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void __iomem *pgsr = pctl->base_pgsr[pin / 32]; |
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u32 val; |
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spin_lock_irqsave(&pctl->lock, flags); |
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val = readl_relaxed(pgsr) & BIT(pin % 32); |
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*config = val ? PIN_CONFIG_LOW_POWER_MODE : 0; |
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spin_unlock_irqrestore(&pctl->lock, flags); |
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dev_dbg(pctl->dev, "get sleep gpio state(pin=%d) %d\n", |
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pin, !!val); |
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return 0; |
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} |
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static int pxa2xx_pconf_group_set(struct pinctrl_dev *pctldev, |
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unsigned group, |
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unsigned long *configs, |
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unsigned num_configs) |
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{ |
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struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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struct pxa_pinctrl_group *g = pctl->groups + group; |
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unsigned long flags; |
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unsigned pin = g->pin; |
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void __iomem *pgsr = pctl->base_pgsr[pin / 32]; |
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int i, is_set = 0; |
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u32 val; |
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for (i = 0; i < num_configs; i++) { |
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switch (pinconf_to_config_param(configs[i])) { |
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case PIN_CONFIG_LOW_POWER_MODE: |
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is_set = pinconf_to_config_argument(configs[i]); |
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break; |
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default: |
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return -EINVAL; |
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} |
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} |
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dev_dbg(pctl->dev, "set sleep gpio state(pin=%d) %d\n", |
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pin, is_set); |
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spin_lock_irqsave(&pctl->lock, flags); |
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val = readl_relaxed(pgsr); |
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val = (val & ~BIT(pin % 32)) | (is_set ? BIT(pin % 32) : 0); |
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writel_relaxed(val, pgsr); |
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spin_unlock_irqrestore(&pctl->lock, flags); |
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return 0; |
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} |
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static const struct pinconf_ops pxa2xx_pconf_ops = { |
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.pin_config_group_get = pxa2xx_pconf_group_get, |
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.pin_config_group_set = pxa2xx_pconf_group_set, |
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.is_generic = true, |
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}; |
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static struct pinctrl_desc pxa2xx_pinctrl_desc = { |
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.confops = &pxa2xx_pconf_ops, |
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.pctlops = &pxa2xx_pctl_ops, |
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.pmxops = &pxa2xx_pinmux_ops, |
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}; |
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static const struct pxa_pinctrl_function * |
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pxa2xx_find_function(struct pxa_pinctrl *pctl, const char *fname, |
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const struct pxa_pinctrl_function *functions) |
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{ |
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const struct pxa_pinctrl_function *func; |
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for (func = functions; func->name; func++) |
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if (!strcmp(fname, func->name)) |
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return func; |
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return NULL; |
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} |
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static int pxa2xx_build_functions(struct pxa_pinctrl *pctl) |
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{ |
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int i; |
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struct pxa_pinctrl_function *functions; |
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struct pxa_desc_function *df; |
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/* |
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* Each pin can have at most 6 alternate functions, and 2 gpio functions |
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* which are common to each pin. As there are more than 2 pins without |
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* alternate function, 6 * npins is an absolute high limit of the number |
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* of functions. |
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*/ |
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functions = devm_kcalloc(pctl->dev, pctl->npins * 6, |
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sizeof(*functions), GFP_KERNEL); |
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if (!functions) |
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return -ENOMEM; |
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for (i = 0; i < pctl->npins; i++) |
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for (df = pctl->ppins[i].functions; df->name; df++) |
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if (!pxa2xx_find_function(pctl, df->name, functions)) |
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(functions + pctl->nfuncs++)->name = df->name; |
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pctl->functions = devm_kmemdup(pctl->dev, functions, |
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pctl->nfuncs * sizeof(*functions), |
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GFP_KERNEL); |
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if (!pctl->functions) |
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return -ENOMEM; |
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devm_kfree(pctl->dev, functions); |
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return 0; |
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} |
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static int pxa2xx_build_groups(struct pxa_pinctrl *pctl) |
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{ |
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int i, j, ngroups; |
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struct pxa_pinctrl_function *func; |
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struct pxa_desc_function *df; |
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char **gtmp; |
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gtmp = devm_kmalloc_array(pctl->dev, pctl->npins, sizeof(*gtmp), |
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GFP_KERNEL); |
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if (!gtmp) |
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return -ENOMEM; |
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for (i = 0; i < pctl->nfuncs; i++) { |
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ngroups = 0; |
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for (j = 0; j < pctl->npins; j++) |
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for (df = pctl->ppins[j].functions; df->name; |
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df++) |
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if (!strcmp(pctl->functions[i].name, |
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df->name)) |
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gtmp[ngroups++] = (char *) |
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pctl->ppins[j].pin.name; |
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func = pctl->functions + i; |
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func->ngroups = ngroups; |
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func->groups = |
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devm_kmalloc_array(pctl->dev, ngroups, |
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sizeof(char *), GFP_KERNEL); |
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if (!func->groups) |
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return -ENOMEM; |
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memcpy(func->groups, gtmp, ngroups * sizeof(*gtmp)); |
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} |
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devm_kfree(pctl->dev, gtmp); |
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return 0; |
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} |
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static int pxa2xx_build_state(struct pxa_pinctrl *pctl, |
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const struct pxa_desc_pin *ppins, int npins) |
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{ |
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struct pxa_pinctrl_group *group; |
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struct pinctrl_pin_desc *pins; |
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int ret, i; |
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pctl->npins = npins; |
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pctl->ppins = ppins; |
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pctl->ngroups = npins; |
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pctl->desc.npins = npins; |
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pins = devm_kcalloc(pctl->dev, npins, sizeof(*pins), GFP_KERNEL); |
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if (!pins) |
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return -ENOMEM; |
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pctl->desc.pins = pins; |
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for (i = 0; i < npins; i++) |
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pins[i] = ppins[i].pin; |
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pctl->groups = devm_kmalloc_array(pctl->dev, pctl->ngroups, |
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sizeof(*pctl->groups), GFP_KERNEL); |
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if (!pctl->groups) |
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return -ENOMEM; |
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for (i = 0; i < npins; i++) { |
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group = pctl->groups + i; |
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group->name = ppins[i].pin.name; |
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group->pin = ppins[i].pin.number; |
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} |
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ret = pxa2xx_build_functions(pctl); |
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if (ret) |
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return ret; |
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ret = pxa2xx_build_groups(pctl); |
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if (ret) |
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return ret; |
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return 0; |
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} |
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int pxa2xx_pinctrl_init(struct platform_device *pdev, |
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const struct pxa_desc_pin *ppins, int npins, |
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void __iomem *base_gafr[], void __iomem *base_gpdr[], |
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void __iomem *base_pgsr[]) |
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{ |
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struct pxa_pinctrl *pctl; |
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int ret, i, maxpin = 0; |
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for (i = 0; i < npins; i++) |
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maxpin = max_t(int, ppins[i].pin.number, maxpin); |
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pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); |
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if (!pctl) |
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return -ENOMEM; |
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pctl->base_gafr = devm_kcalloc(&pdev->dev, roundup(maxpin, 16), |
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sizeof(*pctl->base_gafr), GFP_KERNEL); |
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pctl->base_gpdr = devm_kcalloc(&pdev->dev, roundup(maxpin, 32), |
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sizeof(*pctl->base_gpdr), GFP_KERNEL); |
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pctl->base_pgsr = devm_kcalloc(&pdev->dev, roundup(maxpin, 32), |
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sizeof(*pctl->base_pgsr), GFP_KERNEL); |
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if (!pctl->base_gafr || !pctl->base_gpdr || !pctl->base_pgsr) |
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return -ENOMEM; |
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platform_set_drvdata(pdev, pctl); |
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spin_lock_init(&pctl->lock); |
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pctl->dev = &pdev->dev; |
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pctl->desc = pxa2xx_pinctrl_desc; |
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pctl->desc.name = dev_name(&pdev->dev); |
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pctl->desc.owner = THIS_MODULE; |
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for (i = 0; i < roundup(maxpin, 16); i += 16) |
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pctl->base_gafr[i / 16] = base_gafr[i / 16]; |
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for (i = 0; i < roundup(maxpin, 32); i += 32) { |
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pctl->base_gpdr[i / 32] = base_gpdr[i / 32]; |
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pctl->base_pgsr[i / 32] = base_pgsr[i / 32]; |
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} |
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ret = pxa2xx_build_state(pctl, ppins, npins); |
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if (ret) |
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return ret; |
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pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->desc, pctl); |
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if (IS_ERR(pctl->pctl_dev)) { |
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dev_err(&pdev->dev, "couldn't register pinctrl driver\n"); |
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return PTR_ERR(pctl->pctl_dev); |
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} |
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dev_info(&pdev->dev, "initialized pxa2xx pinctrl driver\n"); |
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return 0; |
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} |
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EXPORT_SYMBOL_GPL(pxa2xx_pinctrl_init); |
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MODULE_AUTHOR("Robert Jarzmik <[email protected]>"); |
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MODULE_DESCRIPTION("Marvell PXA2xx pinctrl driver"); |
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MODULE_LICENSE("GPL v2");
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